An All‐Solid‐State Flexible Piezoelectric High‐k Film Functioning as Both a Generator and In Situ Storage Unit

An all‐solid‐state flexible generator–capacitor polymer composite film converts low‐frequency biomechanical energy into stored electric energy. This design, which combines the functionality of a generator with a capacitor, is realized by employing poly(vinylidene fluoride‐co‐hexafluoropropylene) (PVDF‐HFP) in the simultaneous dual role of piezoelectric generator and polymer matrices of the flexible capacitor. Proper surface modification of the reduced graphene oxide (rGO) fillers in the polymeric matrices is indispensable in achieving the superior energy storage performance of the composite film. The heightened dielectric performance stems from enhanced compatibility of the rGO fillers and PVDF‐HFP matrices, and a microcapacitor model properly explains the dielectric behaviors. A device that is easily fabricated using our film allows timely decoupled motion energy harvest and output of the motion‐generated electricity. This report opens new design possibilities in the fields of motion sensors, information storage and high‐voltage output by accumulating low‐frequency random biological motions.     

High-mobility pentacene phototransistor with nanostructured SiO2 gate dielectric synthesized by sol-gel method

We have fabricated a pentacene based phototransistor by employing a modified nanostructured SiO₂ gate dielectric. The photosensing properties of the pentacene thin film transistor fabricated on n-Si substrate with nanostructured SiO₂ as gate dielectric have been investigated. The photocurrent of the transistor increases with an increase in illumination intensity. This suggests that the pentacene thin film transistor behaves as a phototransistor with p-channel characteristics. The photosensitivity and responsivity values of the transistor are 630.4 and 0.10 A/W, respectively at the off state under AM 1.5 light illumination. The field effect mobility of the pentacene phototransistor was also found to be 2.96 cm²/Vs. The nanostructured surface of the gate possibly is the cause of the high-mobility value of the phototransistor due to light scattering from the increased surface area.     

A low voltage and small hysteresis C_(60) thin film transistor

Organic thin film transistors with C_(60) as an n-type semiconductor have been fabricated.A tantalum pentoxide(Ta_2O_5)/poly-methylmethacrylate(PMMA) double-layer structured gate dielectric was used.The Ta_2O_5 layer was prepared by using a simple solution-based and economical anodization technique.Our results demonstrate that double gate insulators can combine the advantage of Ta_2O_5 with high dielectric constant and polymer insulator for a better interface with the organic semiconductor.The performanc...     

Test structures for dielectric spectroscopy of thin films at microwave frequencies

This work describes the application of two different test structures to execute broadband microwave measurements of the dielectric constant of ceramic thin films. Coplanar waveguide probes and vector network analyzer were used to measure the dielectric constant versus frequency of thin films of lead zirconate titanate and zirconium titanate, fabricated by sol gel methods. One-step lithography was used to produce planar metal-insulator-metal and interdigitated capacitor test patterns. The two test structures are compared for zirconium titanate films. The metal-insulator-metal method has been applied also to a lead zirconate titanate film and to show the capability of computing the dielectric tunability.     

Novel fingerprint scanning arrays using polysilicon TFT's on glassand polymer substrates

Novel fingerprint scanning arrays based upon capacitance sensing have been made. Each sensor element consists of a capacitor electrode and two poly-Si thin film transistors for addressing and read out. The devices were fabricated on glass, polyimide and polyethersulphone substrates using a low temperature (<250°C) process     

Experimental and Theoretical Study of Optical Antennas Formed from ZnO Nanorods Coated with a Thin Silver Film

A new design of an optical antenna formed from a ZnO nanorod coated with a thin metallic film is proposed. Arrays of ZnO nanorods coated with a thin silver film and highly oriented perpendicular to the substrate have been fabricated using carbothermal synthesis and magnetron sputtering. The problems of diffraction of electromagnetic waves by a single metal–dielectric nanooscillator located at the interface between dielectrics and on a 2D periodic array have been solved. Calculated electrodynamic characteristics of the optical nanoantennas of different lengths have been compared with experimental data. A new optical metal–dielectric diffraction grating absorbing almost 100% of the energy falling onto it at the resonance of the surface wave propagating along the metal (solid state plasma)/dielectric interface has been theoretically investigated.     

Enhancement of Electrical Properties of Ferroelectric Polymers by Polyaniline Nanofibers with Controllable Conductivities

Conductive nanofibers are adopted to enhance the electric properties of ferroelectric polymers. Polyaniline (PANI) nanofibers doped by protonic acids have a high dispersion stability in vinylidene fluoride‐trifluoroethylene copolymers [P(VDF‐TrFE)] and lead to percolative nanocomposites with enhanced electric responses. About a 50‐fold rise in the dielectric constant of the ferroelectric polymer matrix has been achieved. Percolation thresholds of the nanocomposites are relevant to doping levels of PANI nanofibers and can be as low as 2.9 wt% for fully doped nanofibers. The interface between the conductive nanofiber and the polymer matrix plays a crucial role in the dielectric enhancement of the nanocomposites in the vicinity of the percolation threshold. Compared with other dopants, perfluorosulfonic acid resin is better at improving the performance of the nanofibers in that it serves as a surface passivation layer for the conductive fillers and suppresses leakage current at low frequency. The nanofibers drastically reduce the electric field strength required to switch spontaneous polarization of P(VDF‐TrFE). The nanocomposites can be utilized for potential applications as high energy density capacitors, thin‐film transistors, and non‐volatile ferroelectric memories.     

Ferroelectric characteristic of group IV elements added SrBi2Ta2O9 thin films

The SrBi₂Ta₂O₉ (SBT) thin film added IV group elements was fabricated on the Pt/Ti/SiO₂/Si substrate by the metal–organic decomposition (MOD) method, the Pt electrode was deposited on the SBT thin film by the DC spattering method. The electric properties of the ferroelectric capacitor were measured. The remanent polarization and the relative dielectric constant of the SBT thin film have decreased, according to the amount of IV group elements addition. The IV group elements added SBT thin film with low relative dielectric constant and low remanent polarization is suitable for the application of the ferroelectric gate FET type memory.     

Effects of ${hbox{CNT/BaTiO}}_{3}$ Composite Particles Prepared by Mechanical Process on Dielectric Properties of Epoxy Hybrid Films

A new type of composite filler mechanically treated with multi-walled carbon nanotubes (MWNTs) and (BT) particles was prepared to produce higher dielectric properties in the composite. The hybrid film fabricated by incorporating these composite fillers in an epoxy matrix had a high dielectric constant and similar dielectric loss as compared to the composite which contained neat BT particles. The dielectric properties of these hybrid films were found to be dependent on both the content of MWNTs and mechanical processing time. Results suggest that this novel hybrid film composed of the composite filler and the epoxy matrix can be used for embedded capacitor material.     

High-Temperature Capacitor Polymer Films

Film capacitor technology has been under development for over half a century to meet various applications such as direct-current link capacitors for transportation, converters/inverters for power electronics, controls for deep well drilling of oil and gas, direct energy weapons for military use, and high-frequency coupling circuitry. The biaxially oriented polypropylene film capacitor remains the state-of-the-art technology; however, it is not able to meet increasing demand for high-temperature (>125°C) applications. A number of dielectric materials capable of operating at high temperatures (>140°C) have attracted investigation, and their modifications are being pursued to achieve higher volumetric efficiency as well. This paper highlights the status of polymer dielectric film development and its feasibility for capacitor applications. High-temperature polymers such as polyetherimide (PEI), polyimide, and polyetheretherketone were the focus of our studies. PEI film was found to be the preferred choice for high-temperature film capacitor development due to its thermal stability, dielectric properties, and scalability.     

ITO衬底上LiTaO3薄膜的制备与介电特性

用溶胶凝胶法在ITO衬底上制备了钽酸锂(LiTaO3)薄膜,利用XRD、SEM和AFM对薄膜的晶向、表面形态等作了表征;研究了不同溶剂对LiTaO3溶胶稳定性的影响和不同退火条件对LiTaO3薄膜结晶的影响;利用Al/LiTaO3/ITO结构,测试了薄膜的介电系数和介电损耗.结果表明:每层薄膜都晶化退火比交替使用焦化、结晶退火能生长出质量更好的LiTaO3薄膜;频率1KHz时,介电损耗约0.4,相对介电系数约53.并讨论了介电损耗增大的原因.     

PECVD形成纳米级薄膜界面陷阱的物理模型

采用雪崩热电子注入技术研究了纳米级富氮 Si Ox Ny 薄膜界面陷阱的物理模型。证实了 PECVDSi Ox Ny 薄膜中界面陷阱来源于悬挂键的物理模型。观察到该纳米膜内存在着受主型电子陷阱 ,随着注入的增长 ,界面上产生的这种陷阱将起主导作用。发现到 Dit随雪崩热电子注入剂量增加而增大 ,禁带上半部 Dit的增大较下半部显著。指出了雪崩注入过程中在 Si Ox Ny 界面上产生两种性质不同的电子陷阱 ,并给出它们能级位置及密度大小关系。揭示出 PECVD法形成的这种纳米膜与快速热氮化制备的薄膜中、氮氧含量不同、界面陷阱特性变化不一样 ,并从薄膜氮化机制予以物理解析。给出了 PECVD形成纳米级薄膜的优化工艺条件 ,该工艺条件制成膜的界面陷阱及其它物理电学特性都比较好     

氮化硅薄膜MIM电容器的制备与性能研究

在被釉氧化铝陶瓷基片上,采用真空电阻蒸发法和等离子体增强化学气相沉积法制备了Au/NiCr电极薄膜及氮化硅(SiNx)介质薄膜,并对薄膜进行光刻图形化,制成了Au/NiCr/SiNx/Au/NiCr结构的MIM电容器。研究了所制电容器的介电性能、介温性能和I-V特性等电学性能。结果表明:所得MIM电容器具有很低的介电损耗(1MHz时tanδ为0.00192)及很高的电压稳定性;在–55～+150℃的范围内其1MHz时的电容温度系数为258×10–6/℃;另外,其I-V特性曲线显示出较好的对称性,漏电流密度较低,可承受较高的电压。     

New stack capacitor for dynamic data storage in polysilicon activematrix arrays

A stack capacitor for dynamic circuits employing self-aligned polysilicon thin-film transistors (TFTs) is proposed. Through circuit layout without deviation in processing, a thin-oxide capacitor can be fabricated directly underneath the conventional planar thick-oxide capacitor to form a sandwiched stack capacitor. Due to the addition of the thin-oxide capacitor with high unit capacitance, significant savings in chip area can be achieved. The stack capacitor structure has been successfully demonstrated in polysilicon linear arrays for printer applications. Improved data retention and decreased feedthrough voltage, characteristic of higher storage capacitance, are demonstrated     

Optimization of Epoxy-Barium Titanate Nanocomposites for High Performance Embedded Capacitor Components

One of the most promising avenues to meet the requirements of higher performance, lower cost, and smaller size in electronic systems is the embedded capacitor technology. Polymer-ceramic nanocomposites can combine the low cost, low temperature processability of polymers with the desirable electrical and dielectric properties of ceramic fillers, and have been identified as the major dielectric materials for embedded capacitors. However, the demanding requirements of mechanical properties and reliability of embedded capacitor components restrict the maximum applicable filler loading (<50vol%) of nanocomposites and thereby limit their highest dielectric constants (<50) for real applications. In this paper, we present a study on the optimization of the epoxy-barium titanate nanocomposites in order to obtain high performance, reliable embedded capacitor components. To improve the reliability of polymer-ceramic nanocomposites at a high filler loading, the epoxy matrix was modified with a secondary rubberized epoxy, which formed isolated flexible domains (island) in the continuous primary epoxy phase (sea). The effects of sea-island structure on the thermal mechanical properties, adhesion, and thermal stress reliability of embedded capacitors were systematically evaluated. The optimized, rubberized nanocomposite formulations had a high dielectric constant above 50 and successfully passed the stringent thermal stress reliability test. A high breakdown voltage of 89MV/m and a low leakage current of about 1.9times10^-11A/cm² were measured in the large area thin film capacitors     

Solution processable bilayered gate dielectric towards flexible organic thin film transistors

In this study, we have successfully explored the potential of a new bilayer gate dielectric material, composed of Polystyrene (PS), Pluronic P123 Block Copolymer Surfactant (P123) composite thin film and Polyacrylonitrile (PAN) through fabrication of metal insulator metal (MIM) capacitor devices and organic thin film transistors (OTFTs). The conditions for fabrication of PAN and PS-P123 as a bilayer dielectric material are optimized before employing it further as a gate dielectric in OTFTs. Simple solution processable techniques are applied to deposit PAN and PS-P123 as a bilayer dielectric layer on Polyimide (PI) substrates. Contact angle study is further performed to explore the surface property of this bilayer polymer gate dielectric material. This new bilayer dielectric having a k value of 3.7 intermediate to that of PS-P123 composite thin film dielectric (k ∼ 2.8) and PAN dielectric (k ∼ 5.5) has successfully acted as a buffer layer by preventing the direct contact between the organic semiconducting layer and high k PAN dielectric. The OTFT devices based on α,ω-dihexylquaterthiophene (DH4T) incorporated with this bilayer dielectric, has demonstrated a hole mobility of 1.37 × 10⁻² and on/off current ratio of 10³ which is one of the good values as reported before. Several bending conditions are applied, to explore the charge carrier hopping mechanism involved in deterioration of electrical properties of these OTFTs. Additionally, the electrical performance of OTFTs, which are exposed to open atmosphere for five days, can be interestingly recovered by means of re-baking them respectively at 90 °C.     

Embedded thin film capacitors-theoretical limits

The large physical size of capacitors and/or excessive values of associated lead inductance are two major limitations in the development of novel packaging modules, with high packaging density, high performance and reliability along with low system cost. Embedded capacitor technology in thin film form offers a promising solution to these limitations. A design space with capacitance density and breakdown voltage as performance properties, with material dielectric constant and film thickness as parameters has been explored, focusing on tantalum pentoxide (Ta/sub 2/O/sub 5/) as the dielectric material. An inherent tradeoff is established between breakdown voltage and capacitance density for thin film capacitors. The validity of the proposed design space is illustrated with thin films of Ta/sub 2/O/sub 5/, showing deviation from the "best can achieve" breakdown voltage for films thinner than 0.4 /spl mu/m and films thicker than 1 /spl mu/m.     

Ultrathin aluminum oxide gate dielectric on N-type 4H-SiC prepared by low thermal budget nitric acid oxidation

MOS capacitors with an ultrathin aluminum oxide (Al/sub 2/O/sub 3/) gate dielectric were fabricated on n-type 4H-SiC. Al/sub 2/O/sub 3/ was prepared by room-temperature nitric acid (HNO/sub 3/) oxidation of ultrathin Al film followed by furnace annealing. The effective dielectric constant of k/spl sim/9.4 and equivalent oxide thickness of 26 /spl Aring/ are produced, and the interfacial layer and carbon clusters are not observed in this paper. The electrical responses of MOS capacitor under heating and illumination are used to identify the conduction mechanisms. For the positively biased case, the conduction mechanism is shown to be dominated by Schottky emission with an effective barrier height of 1.12/spl plusmn/0.13 eV. For the negatively biased case, the gate current is shown to be due to the generation-recombination process in depletion region and limited by the minority carrier generation rate. The feasibility of integrating alternative gate dielectric on SiC by a low thermal budget process is demonstrated.     

Characteristics of Ferroelectric Transistors with BaMgF4 Dielectric

The structure and electrical characteristics of metal-ferroelectric-semiconductor FET (MFSFET) for a single transistor memory are presented. The MFSFET was comprised of polysilicon islands as source/ drain electrodes and BaMgF₄ film as a gate dielectric. The polysilicon source and drain were built-up prior to the formation of the ferroelectric film to suppress a degradation of the film due to high thermal cycles. From the MFS capacitor, the remnant polarization and coercive field were measured to be about 0.6 μC/cm² and 100 kV/cm, respectively. The fabricated MFSFETs also showed good hysteretic I - V curves, while the current levels disperse probably due to film cracking or bad adhesion between the film and the Al electrode.     

Capacitance-voltage characterization of thin film nanoporous alumina templates

This paper presents the results of capacitance-voltage characterization of thin film alumina templates fabricated on silicon substrates. Such templates are of significant interest for the low-cost implementation of semiconductor and metal nanostructure arrays, as well as for potential nanostructure integration with silicon electronics. Thin film alumina templates created on silicon substrates under different anodization conditions were investigated. Capacitance-voltage measurements indicate that the template/silicon interface, important for nanostructure integration on silicon, to be of good device quality.