隔离三电平零电压直流变换器

介绍了一种隔离三电平零电压直流变换器。其主开关管的电压应力均为输入电压的一半。由于采用了交错ZVSPWM控制并利用输出滤波电感中的能量,因此能够在宽负载范围内实现开关管的ZVS。分析了该变换器的工作原理和工作特性,并通过一个480W（输出48V／10A）的原理样机进行了验证,最后给出了实验结果。     

一种新型高电压ZVZCS三电平DC/DC变换器的研究

介绍一种适用于高电压场合的新型ZVZCS三电平DC／DC变换器，详细分析了电路的工作原理。设计实例和仿真结果验证了理论分析的正确性。     

一种采用无源辅助网络的ZVZCS三电平DC-DC变换器

提出一种采用无源辅助网络的零电压零电流开关(ZVZCS)三电平DC-DC;变换器拓扑,其中各开关管电压应力为输入电压的一半,并且能够在宽负载范围内实现各开关管的软开关.副边的无源辅助网络不仅能为滞后管创造零电流关断条件,而且还可抑制变压器副边整流后电压的过冲.本文详细分析了此变换器的工作原理及开关管实现软开关的条件,并通过实验样机验证了理论分析的正确性及此拓扑的可行性.     

基于UC3875的复合式全桥三电平变换器的研究

文中研究了一种基于UC3875的复合式全桥三电平变换器。该变换器可以降低开关管的电压应力,利用开关管的寄生电容与变压器的漏感在较宽的负载范围内实现ZVS,在减小输出滤波器的容量和体积的同时,有效地提高了效率。对该变换器进行了仿真分析并通过一台600W的原理样机进行验证,给出了实验结果。     

采用ZVS-PWM三电平直流变换器的电力整流模块

介绍了一种采用移相控制零电压开关PWM三电平变换器的电力整流模块，讨论了主电路和控制与驱动电路的设计，并给出谐振电感的参数设计，和实验波形。     

带有箝位二极管的ZVS全桥三电平DC/DC变换器的研究

介绍了一种改进型的带有箝位二极管的零电压开关(ZVS)全桥三电平DC/DC变换器,详细分析了电路的工作原理。设计实例和仿真结果验证了理论分析的正确性。     

新型容性整流ZVZCS三电平直流变换器

提出一种新型零电压零电流(ZVZCS)飞跨电容型不对称PWM半桥三电平变换器,该变换器原边开关器件的电压应力为输入电压的一半;所有开关器件在较宽负载范围内实现软开关,其中超前管实现ZVS开通,ZCS关断;滞后管实现ZCS开通,ZVS关断,从而降低开关损耗;副边采用容性整流,在续流阶段将原边电流降至0,使得开关器件的电流分布更加均衡并减小飞跨电容的电流应力;与此同时,消除二极管反向恢复损耗。文中讨论了电路的结构、工作原理和基础特性,为证明理论正确性,搭建一台500W实验样机来验证。     

三电平DC-DC变换器的统一建模研究

三电平变换器的统一建模是对变换器进行控制和优化的基础.但是,对于三电平变换器而言,其开关数目多,工作模态复杂,用传统建模方法对之进行统一建模相当困难.脉冲波形积分法是一种新的统一建模方法,为此,本文首次采用脉冲波形积分法,对三电平变换器的统一建模进行了研究.以非隔离三电平变换器为例,详细阐明了其统一建模原理,并给出了输入输出共地和输入输出不共地的Buck变换器的统一建模方法.仿真分析与实验结果表明,脉冲波形积分法是一种对三电平变换器进行统一建模的有效工具,为三电平变换器的有效控制奠定了基础.     

一种交错图腾PFC过零点控制策略

本文分别分析了单路和双路交错图腾无桥PFC在过零点处电流尖峰的产生过程,找到了交错图腾PFC过零点电流尖峰增加的原因,并进行了实验验证。根据分析结果提出了一种能够减小交错图腾PFC两个电感电流畸变的控制方法,实验结果表明该方法能够将电流畸变控制在与单路图腾PFC相同的水平。     

一种改善PFC变换器输入电流过零畸变的方法

功率因数校正（PFC）变换器普遍存在输入电流在输入电压过零点附近发生畸变的现象。文中详细分析了PFC变换器输入电流在输入电压过零点附近产生畸变的原因,指出了Boost PFC变换器的输入电流超前于输入电压是导致位移因数不为1和输入电流过零畸变的主要原因;提出了根据输入电流在输入电压过零时刻的值实时修正参考输入电压的初相角,以改善PFC变换器输入电流过零畸变的数字控制方法。仿真结果证明了文中所提出的方法的有效性,特别是在400Hz输入电压下有很好的效果。     

Interleaved soft switching resonant converter with a small input ripple current

ABSTRACT

An interleaved frequency control soft switching converter is studied for solar power or fuel cell power applications. The proposed circuit topology contains two parallel current-fed circuit cells with interleaved pulse-width modulation operation. Thus, the ripple currents at input and output terminals are decreased. In each circuit cell, the proposed current-fed dc-dc converter includes boost circuit and resonant circuit to achieve current ripple-free on low voltage side and less switching losses on active devices. The boost circuit and the resonant circuit have same active devices to decrease power switches. Due to the resonant behaviour, the reverse recovery current loss on secondary diodes is removed. The voltage doubler circuit topology is accomplished on secondary-side to reduce diode counts and conduction loss. The performance and effectiveness of the developed interleaved PWM current-fed converter are verified and confirmed by experiments.     

Current balancing control for an interleaved boost power converter

The interleaved boost power converter has the advantages of ripple cancellation and better efficiency. The major problem of the interleaved boost power converter is the current balancing among different phases of the boost power converters. In this paper, a current balancing control method for equalizing the currents of two-phase interleaved boost power converter is proposed. The output current can effectively detect the mismatch between the boost power converters for the interleaved boost power converter. The output current is used to perform both the current balance and the current-mode control. The salient feature is that only one current sensor is used in the proposed current balancing control method. A hardware prototype is developed, and the experimental results verify the performance of the proposed current balancing control method is as expected.     

一种新型交错并联同相降压升压DC/DC转换器

为了有效降低电流纹波和提高转换器效率,提出一种新型交错并联同相降压升压DC/DC转换器。提出的结构通过采用输入/输出（I/O）磁耦合交错并联和阻尼网络技术,降低了开关的电压应力、内部电压振荡和I/O电流纹波,并提升了转换器的效率。采用状态空间平均法,在连续导通模式下分析了提出转换器的稳态运行,从理论上证明了其优势。样机的功率设置为360W,输出电压为36 V,模拟结果以及实验结果显示,当输出电流为6A时,转换效率最高达到96%,最大输入电流纹波百分比仅为9.4%,相较于其他类似转换器,提出的转换器具有效率较高和I/O电流纹波较低的优势。     

两象限变频器直流电容纹波电流分析与抑制研究

两象限变频器直流环节设计的好坏决定着变频器整机性能优劣以及可靠性高低,而直流环节的设计又是以直流电容的选型设计为主.为了稳定中间环节直流电压,使其波动在所要求的设计范围之内,在进行直流电容选型时,设计者通常会选用容量大的电解电容.但电解电容额定纹波电流小,为保证电容的使用寿命,采取一定措施抑制电容纹波电流显得十分必要.本文通过对两象限变频器直流电容纹波电流进行分析,提出了添加直流电感抑制电容纹波电流的方法,并分别给出了计算电容纹波电流的数学解析式,最后通过MATLAB仿真验证了理论分析的正确性.     

通信用逆变器输入电流中交流纹波的测量

文中叙述了直流－直流变换器或直流一交流逆变器输入电流中纹波电流的二种测量方法。电阻法在具体实施中常不能获得满意的结果，受干扰的影响较大，采用特种电流探头可获得清晰真实的波形及读数。     

Design and implementation of a novel synchronous-rectifier forward converter with improved performance

This article proposes two new methods for improving the performance of a synchronous-rectifier forward converter. A synchronous-rectifier converter produces a reverse current in the inductor due to the bidirectional characteristic of MOSFETs while the converter is turned off. This reverse current causes voltage spikes which may damage the power devices. This article proposes two methods to reduce the voltage spikes: method 1 and method 2. Method 1 uses the enable signal detection method. An enable signal is generated from the remote control of the system when the main power is turned off. Then, the proposed circuit of method 1 turns off the free-wheeling switch before the reverse current is produced. As a result, the voltage spike can be avoided. Method 2 uses a transformer winding to detect the turn-off time of the input power. Then, the circuit turns off the free-wheeling switch to break the resonant loop and end the reverse current. The cost analysis of method 1 and 2 is included. In addition, several experimental results are provided to validate the correctness and feasibility of the theoretical analysis.     

A dynamically reconfigurable NRTI switched-capacitor-based hybrid DC-DC converter suitable for embedded applications

In this paper, a dynamically reconfigurable, Non-overlap Rotational Time Interleaved (NRTI) switched capacitor (S-C) DC-DC converter is presented. Its S-C module is reconfigurable to generate three different fractions (viz., 1/3, 1/2 and 2/3) of its input supply (Vdd). This maintains good power efficiency while its output voltage gets adjusted over a large range. In addition, a load-current-sensing circuit is integrated within it to dynamically reconfigure the S-C module based on the required driving capability. This feature enables to extend load current range to higher limit and at the same time improves the power efficiency in low load current regime. The S-C module is integrated with a current control loop for load and line regulation.The proposed architecture is simulated in a 0.18 μm CMOS process using dual oxide transistors to demonstrate the efficacy of the proposed topology. The input supply voltage is 3.3 V and the regulated output range is 0.8-1.6 V. Total flying capacitance is 330 pF and the load capacitor value is 50 pF. For an output of 1.35 V, its power efficiency is maintained above 50% over a load current range of 4 -17.6 mA with a peak of 66% at 9 mA. Throughout this current range the output voltage ripple remains within 12 mV.     

Novel ZVS DC-DC converter with low current ripple for light rail transit

This paper develops and studies a three-level zero-voltage turn-on converter for providing auxiliary power system in a DC light rail vehicle. The proposed converter includes a three-level circuit and a half-bridge circuit sharing the same power switches on the high voltage side in order to reduce switch counts and distribute total power into two circuits. The Metal-Oxide-Semiconductor Field-Effect Transistors (MOSFETs) with a low voltage rating and a turn-on resistance are adopted in the developed converter in order to decrease conduction losses on power switches. On the secondary side, two inductors and four rectifier diodes are employed to reduce output ripple current and transformer secondary winding turns. A duty cycle control based on the phase-shift pulse-width modulation is used to regulate the output voltage and achieve the wide range of zero-voltage turn-on. Experimental results with a prototype with a 760 V input and a 48V/30A output are provided to verify the feasibility and effectiveness of the developed converter.     

单相并网变流器的离散PR控制设计

针对单相并网变流系统采用传统的比例积分(PI)控制器在跟踪并网电流指令时存在稳态误差,以及传统的比例谐振(PR)控制器在离散化过程中存在谐振点偏移的缺陷,提出一种新的离散比例谐振(DPR)控制器。该控制器包含比例项,前馈项和谐振项。谐振项采用一组离散二阶状态方程实现,替代传统PR控制器离散化后的二阶差分方程,能使控制器具有无静差的稳态特性。与传统PR控制器相比,由于谐振项直接采用离散状态方程实现,DPR控制器不会因为离散过程导致谐振点偏移而影响控制器性能。最后通过实验验证了该方法的有效性。