A 38% Tuning Bandwidth Low Phase Noise Differential Voltage Controlled Oscillator Using a 0.5 $mu$m E/D-PHEMT Process

This paper presents a 38% tuning bandwidth low phase noise differential voltage controlled oscillator (VCO) using a 0.5 $mu$m enhancement/depletion-pseudomorphic high-electron mobility transistor (E/D-PHEMT) process. The proposed VCO is based on a differential topology with two common-gate transistors. To achieve a wide tuning range with low phase noise, varactor in the VCO core employs the E-mode PHEMT device. The frequency of the VCO is from 18.8 to 27.5 GHz with a tuning bandwidth of 38% and an output power of higher than 5 dBm. The VCO demonstrates a phase noise of ${-}109$ dBc/Hz at 1 MHz offset frequency. This circuit can be compared with the VCOs fabricated using the advanced InP HBT technologies.      

紧凑型Ka波段PHEMT微波单片集成VCO

设计并流片制作了基于GaAs PHEMT工艺的Ka波段微波单片集成压控振荡器(MMIC VCO).该VCO具有紧凑、宽电调谐带宽及高输出功率的特点.提出了缩小芯片面积及增大调谐带宽的方法,同时还给出了设计MMIC VCO的基本步骤.该方法设计并流片制做的MMIC VCO的测量结果为:振荡频率为36±1.2GHz,输出功率为10士1dBm,芯片面积为1.3mm×1.0mm.     

A low phase noise silicon 18-GHz push-push VCO

The design and measurement of a push-push voltage controlled oscillator (VCO) at 18.66-18.3 GHz are presented in this paper. The circuit includes two packaged silicon transistors (Siemens BFP 540F) and a microstrip resonator tuned by two GaAs varactor diodes (M/A-COM ML46580). A 360-MHz tuning range is obtained with an output power of 0-3.1 dBm. The fundamental rejection is around 17 dB for a wide range of collector bias current. The phase noise is below -103 dBc/Hz at 100-kHz offset and below -122 dBc/Hz at 1 MHz for the entire tuning bandwidth.     

A 3.5-GHz PLL for fast low-IF/zero-IF LO switching in an 802.11 transceiver

A PLL technique is introduced that enables fast and accurate frequency switching, independent of the loop bandwidth. It uses separate tuning paths, each driving a separate VCO tune port. Different frequencies are produced by letting the VCO make different weighted combinations of the stable tuning voltages. The PLL converges to the stable tuning voltages by switching it a few times between the desired frequencies and tuning paths. Once the stabilized tuning voltages are found, one can switch between frequencies as fast as one can switch between K/sub VCO/s. The technique is applied to a 3.5-GHz integer-N PLL to enable fast jumping of the local oscillator (LO) frequency when an 802.11 transceiver is switched between a low and a zero intermediate frequency (LIF/ZIF). It uses dual phase/frequency detectors (PFD), charge pumps (CPs), and on-chip loop filters to control two separate low-leakage VCO tune ports. Each PFD/tune port combination can be (de)activated separately, without disturbing the loop filters' charge. The 50-kHz bandwidth PLL achieves a measured 7-MHz jump with /spl plusmn/20 kHz accuracy within 6 /spl mu/s. The measured phase noise is -123 dBc/Hz at 1-MHz offset.     

U-band shield suspended-stripline Gunn DRO and VCO

A millimeter-wave IC dielectric resonator oscillator (DRO) is proposed. Equations that give the resonant frequency of the dielectric resonator DR in suspended stripline (SSL) are derived. A U-band voltage-controlled oscillator (VCO) with varactor tuning also has been developed. The Gunn diode and varactor used in both of the oscillators are commercially available packaged devices. Restrictions on the performance of the oscillators imposed by packaged and mounted networks and the self-characteristics of the solid-state devices have been analyzed. An electronic tuning range greater than 1000 MHz with an output power exceeding 15 dBm across the bandwidth in the 53-GHz region has been realized for the SSL VCO. An SSL DRO with an output power of more than 17 dBm and a mechanical tuning range of 1.5 GHz in the 54-GHz region has been achieved     

An 8 GHz silicon bipolar clock-recovery and data-regenerator IC

A silicon bipolar IC for data regeneration and clock recovery which includes a phase/frequency detector (PFD), a quadrature voltage controlled oscillator (VCO), and an MS D-flipflop (DFF) is presented. The VCO is based on a modified two stage ring oscillator approach and presents a wide tuning range of 2-to-9 GHz. Data regeneration at 8 Gb/s (with the onchip VCO) and PFD operation up to 15 Gb/s (with an external VCO) are demonstrated. The IC for clock and data regeneration was fabricated with a 25 GHz f_T 0.4 μm emitter width bipolar process. The power dissipation is 2.25 W     

A 108-GHz InP-HBT monolithic push-push VCO with low phase noise andwide tuning bandwidth

This paper reports on what is believed to be the highest frequency bipolar voltage-controlled oscillator (VCO) monolithic microwave integrated circuit (MMIC) so far reported. The W-band VCO is based on a push-push oscillator topology, which employs InP HBT technology with peak f_T's and f_max's of 75 and 200 GHz, respectively. The W-band VCO produces a maximum oscillating frequency of 108 GHz and delivers an output power of +0.92 dBm into 50 Ω. The VCO also obtains a tuning bandwidth of 2.73 GHz or 2.6% using a monolithic varactor. A phase noise of -88 dBc/Hz and -109 dBc/Hz is achieved at 1- and 10-MHz offsets, respectively, and is believed to be the lowest phase noise reported for a monolithic W-band VCO. The push-push VCO design approach demonstrated in this work enables higher VCO frequency operation, lower noise performance, and smaller size, which is attractive for millimeter-wave frequency source applications     

80 GHz MMIC HEMT VCO

In this letter a monolithic voltage-controlled oscillator (VCO) operating in the 77.5-83.5 GHz range is presented. InP HEMTs are used for both the active device and varactor. The VCO demonstrated a tuning range of 6 GHz and an output power better than 12.5 dBm in the entire tuning range     

S波段低相噪同轴介质压控振荡器设计

运用串联反馈振荡器理论设计了一个工作于S波段的低相噪同轴介质压控振荡器。首先分析了同轴介质谐振器的理论以及串联反馈振荡器的工作原理,然后在高频电磁仿真软件HFSS和ADS中进行仿真和设计。为了实现电调谐,将变容管合理地加入振荡器,最终设计完成了一个S波段的低相噪同轴介质压控振荡器。通过对实物成品的测量和调试表明,此压控振荡器达到了预定的技术指标,各项性能良好。测试结果:工作频率为2.075~2.250 GHz,调谐范围为1.75 GHz,输出功率≥11 dBm,谐波抑制度≥23 dBc,相位噪声优于-133 dBc/Hz@100kHz。     

Nonlinear Frequency-Modulation Distortion Analysis for VCO Based on Harmonic Balance Method

The analysis methods for the steady-state responses of the voltage tuning negative resistance oscillator (voltage-controlling oscillator, VCO) by the microwave nonlinear autonomous circuit harmonic balance method in millimeter-wave bands are studied in the paper. Firstly, the quasi-periodic characteristic of the steady-state response of the VCO modulated by a periodic signal is proved. Then, on the bases of the harmonic balance analysis and the inter-modulation balance analysis, a novel method for obtaining the steady-state tuning performance and the nonlinear frequency-modulation distortion characteristic of the VCO is presented. The total analysis process is aimed to a kind of NRD-guide Gunn diode VCO. The large-signal lumped equivalent circuit model of the millimeter-wave P⁺N-junction varactor is also given for explaining the algorithm and the principle of the NRD-guide VCO.     

X波段微带集成FET的压控振荡器

本文叙述了一种利用FET振荡管和GaAs超突变结变容二极管构成的电压控制振荡器(VCO).通过合理的电抗补偿和阻抗匹配技术的应用,VCO在8GHz得到调谐带宽1200MHz,输出功率大于20mW.     

Integrated VCO With Up/Down Converter for Si-Based 60 GHz WPAN Applications

This letter presents the design and implementation of the largest reported bandwidth of a 60 GHz up/down converter with an integrated voltage controlled oscillator (VCO) in a low-cost 0.18 mum silicon-germanium process. The up/down conversion is achieved using the 2X sub-harmonic passive mixing with anti-parallel diode pairs. A 30 GHz cross-coupled VCO is designed, optimized and integrated with the sub-harmonic mixer through a cascode amplifier to meet the local oscillator power requirements. The fully integrated chip takes only 1.5 mm² of silicon die area and consumes only 40 mW of dc power for a measured conversion loss of 12 dB at 61.5 GHz. The integrated up/down converter is measured to have greater than 9 GHz double-sided 3-dB RF bandwidth suitable for wideband high data-rate WPAN transceiver requirements. The VCO and VCO-amplifier test structures are separately fabricated and measured to have a phase noise as low as -105 dBc/Hz at 1 MHz offset with a tuning range of 2.3 GHz.     

Design formula for band-switching capacitor array in wide tuning range low-phase-noise LC-VCO

A low phase noise with wide tuning range complementary LC cross-coupled voltage control oscillator (LC-VCO) using 0.18 μm CMOS technology is presented. This paper proposes a design formula for the choice of the value of varactor (ΔC_var) and band switch capacitor (C_s) for the binary-weighted band-switching LC tank which is convenient to determine the proper tuning constant for wideband, low-phase-noise operations. This general formula considers the ratio of frequency overlap (ov) and all the parasitic effects from band-switching capacitor array and transistors. The designed VCO using a 4-bit band-switching capacitor array demonstrates the operating frequencies from 4.166 to 5.537 GHz with an equivalent tuning bandwidth of 28.26%. The measured tuning range of all sub-bands is well agreed with that of the post-layout simulation results. The measured phase noise is −123.1 dBc/Hz at 1 MHz offset in the 5.2 GHz band. The calculated figure-of-merit (FoM) of this VCO was as high as −187 dB. When considering the tuning bandwidth the designed VCO obtains a FoM-bandwidth product of 52.83, which is much better than previously published works.     

宽频率范围的单子带压控振荡器设计

基于TSMC 180 nm CMOS工艺,提出了一种振荡频率为2～3 GHz的宽频率范围、低相位噪声的单子带压控振荡器(VCO).采用双平衡吉尔伯特混频结构,将单子带5～6 GHz压控振荡器与固定频率3 GHz压控振荡器进行下混频,可得到振荡频率为2～3 GHz的单子带压控振荡器,实现相对带宽从18.18％到40％的展...     

A Wide-Band CMOS LC VCO With Linearized Coarse Tuning Characteristics

A pseudo-exponential capacitor bank structure is proposed to implement a wide-band CMOS LC voltage-controlled oscillator (VCO) with linearized coarse tuning characteristics. An octave bandwidth VCO employing the proposed 6-bit pseudo-exponential capacitor bank structure has been realized in 0.18-mum CMOS. Compared to a conventional VCO employing a binary weighted capacitor bank, the proposed VCO has considerably reduced the variations of the VCO gain (K _VCO) and the frequency step per a capacitor bank code (f _step/code) by 2.7 and 2.1 times, respectively, across the tuning range of 924-1850 MHz. Measurement results have also shown that the VCO provides the phase noise of - 127.1 dBc/Hz at 1-MHz offset for 1.752-GHz output frequency while dissipating 6 mA from a 1.8-V supply.     

一种微波集成宽带变容管调谐体效应振荡器的设计

本文利用电抗补偿的概念对集成串联体效应振荡器进行电抗补偿,使调谐带宽增加。在C波段,相对调谐带宽达10％以上;输出功率大于30毫瓦;起伏小于3dB。给出了调谐带宽的解析表达式和振荡器电路的设计。 这种宽带集成体效应振荡器采用微带和同轴相结合的结构。变并联谐振为串联谐振,频率调整比较方便,在雷达和通信上得到了广泛的应用。     

Low Phase-Noise and Low-Power CMOS VCO Constructed in Current-Reused Configuration

A Ku-band CMOS voltage-controlled oscillator (VCO) constructed in a modified current-reused configuration is presented in this letter. Two dc level shifters combined into two metal-insulator-metal capacitors are adopted to solve the transconductance and load mismatch problems of the conventional current-reused VCO for obtaining more symmetrical oscillation signals and lowering the phase noise of oscillator. A prototype was designed and measured to verify the design concept. The measurement results demonstrate the central oscillation signal of 16 GHz to be associated with the 900 MHz tuning range and -111 dBc/Hz phase noise at 1 MHz offset. The power consumption of the VCO core is only 8.1 mW. The measurement result evaluated by means of a figure of merit is about -186.8 dBc/Hz.     

Coarse-fine, wideband distributed voltage controlled oscillator for wireless applications

A new distributed voltage controlled oscillator (DVCO) is presented. The proposed topology allows a very wide tuning range VCO and fine-coarse tuning. The design of a prototype DVCO is discussed and measurements are reported showing improved performance in terms of phase noise, tuning range and power consumption.     

Design and performance of a robust 180 nm CMOS standalone VCO and the integrated PLL

The design details of a low power/wide tuning range phase locked loop (PLL) is presented in 180 nm CMOS together with the simulated and post fabrication measured performance. The PLL has been specifically designed for applications requiring a wide tuning range (1.55–2.28 GHz) while maintaining low power consumption (18 mW) and good phase noise (−100.9 dBc/Hz at 1 MHz). The tuning range represents significant improvement over other reported PLL CMOS implementations. To illustrate the robustness of the architecture, a 90 nm CMOS design is included with a 5.8–9.45 GHz tuning range (48%), phase noise of −111.7 dBc/Hz, and power consumption of 18.6 mW. The stand alone voltage controlled oscillator (VCO) and the PLL were fabricated on a single 180 nm die providing a unique opportunity to analyze and measure both the stand alone VCO phase noise performance and the integrated PLL phase noise performance. The contributions to the PLL phase noise (phase detector, charge pump, VCO, divider, and reference source) are delineated and both the theoretical and measured PLL phase noise performance is discussed. Design tradeoffs are included such as effect of loop bandwidth on phase noise contributions.     

Concurrent Dual-Frequency Oscillators and Phase-Locked Loops

A dual-frequency oscillator employing a fourth-order tank is shown to have the ability to generate simultaneous oscillations at two frequencies. A nonlinear analysis to determine the steady-state and transient behavior of this oscillator is presented. Further, the phase-noise expression for the dual-frequency oscillator is derived and compared with that of a single-frequency oscillator. A dual-loop phase-locked loop (PLL) is designed to lock the frequencies of the dual-frequency oscillator to two external references independently. A prototype of a dual-frequency voltage-controlled oscillator (VCO) along with the dual-loop PLL is implemented in a BiCMOS SiGe technology. The dual-frequency VCO oscillates simultaneously at 2.33 and 4.98 GHz with 12.5% and 10.3% tuning ranges, respectively. The PLL has locking ranges of 4.2% and 3.6% for 2.33 and 4.98 GHz, respectively. Potential applications of concurrent multifrequency oscillators in multifunctional communication systems and multiband beam forming are discussed.