共查询到18条相似文献,搜索用时 62 毫秒
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报道了快速热化学气相沉积(RTCVD)工艺制备多晶硅(poly-Si)薄膜及电池的实验和结果。采用SiH2Cl2作为原料气体,衬底温度为1030℃时,薄膜的生长速率为10nm/s。发现薄膜的平均晶粒度及载流子迁移率与衬底温度和材料有关。用该薄膜在未抛光重掺杂磷的硅衬底上制备1cm2的p+n结样品电池,无减反射涂层,其转换效率为4.54%(AM1.5,100mW/cm2,25℃)。 相似文献
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将磁控溅射和热丝化学气相沉积相结合,制备出超高浓度钛掺杂的氢化非晶硅薄膜.通过光发射谱(OES)分析了热丝加热前后直流溅射辉光特性,结果表明热丝加热与否对直流溅射过程的影响不大.俄歇电子能谱显示钛在薄膜中是均匀分布的,改变磁控溅射的功率可控制薄膜中钛的含量,薄膜在可见和红外光的吸收随钛浓度的增加而显著增强.掺钛非晶硅薄膜仍表现出半导体特性,电阻率随着温度的降低而提高,满足变程跳跃电导输运机制.采用激光熔融(PLM)对薄膜进行退火,薄膜晶化率达50%以上.晶化的掺钛硅薄膜仍保持较高的可见-红外波段的光吸收. 相似文献
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利用快速加热化学气相沉积(RTCVD)系统在高纯石英衬底上分别制备了轻掺和不掺硼的多晶硅薄膜,并利用XRD、SEM高阻Hall测量和光电导谱测量技术研究了它们的结构和电学性能.结果表明,1150℃在石英衬底上生长的本征多晶硅薄膜具有[111]择优生长取向,而轻掺硼的多晶硅薄膜则同时具有[311]和[200]两个晶向上的择优取向.通过轻微掺入硼,多晶硅薄膜晶粒尺寸分布的均匀性得到了很大改善.高阻Hall测量表明轻掺硼的多晶硅薄膜具有更高的Hall迁移率因而具有更好的电学性能.光电导谱则量结果表明所制备的多晶硅薄膜的光学带隙与晶体硅的非常接近,在1.1eV. 相似文献
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以往定额法对工程造价的计算并没有完全体现出不同工序中资源损耗的不确定性。基于不确定型网络图对建设工程造价模拟方法进行研究,从施工网络图中不同环节的资源损耗的微观角度出发,针对各类资源损耗的分布函数进行统计研究,并选择把网络图当成是架构,利用蒙特卡罗方法来面向施工整个过程的资源损耗展开宏观层面上的模拟和仿真,得出总消耗的分布函数,确定相应条件下的工程造价。 相似文献
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为了降低a-Si:H薄膜中的氢含量,提高其稳定性,在我们MWECR-CVD系统中引入了热丝装置,热丝对等离子体的热辐射使等离子体升温,既促进了气体的进一步分解和电离,获得较多的低氢原子基团,也减少了活性高硅烷聚合物的生成,从而使薄膜中的(SiH2)n的含量降低。同时,热丝对样品表面提供的热辐射和光辐射也可以进一步降低薄膜的氢含量。实验结果表明,用这种装置沉积的a-Si:H薄膜,氢含量可降低到4.5at%左右,稳定性明显增强,光敏性也有一定改善。 相似文献
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Heteroepitaxial (111) and (100) oriented CdTe layers have been grown on Si substrates by conventional molecular beam epitaxy (MBE) and photo-assisted MBE (PAMBE) using stacked BaF2-CaF2 as a buffer to overcome the 19% lattice mismatch between Si and CdTe. Heteroepitaxial As doped p-type CdTe(lOO) layers have been grown on BaF2-CaF2/Si(100). The dopant activation is accomplished using an extra Cd source and laser illumination of the substrate during growth. The growth kinetics and surface reconstructions have been studied using RHEED during CdTe growth under different conditions, and the induced effects on Te-desorption, Cd-migration, and As-substitution on Te-vacancy site have been correlated. The resistivity of As doped CdTe layers is down to 20 ohm cm. The 8 K photoluminescence spectra of such a layer shows a dominant (A°, X) peak at 1.590 eV and the As acceptor level corresponds to a shallow level with = 60 me V activation energy. A lift-off technique has been used to separate the single crystal CdTe thin films from the Si wafer by dissolving the fluoride buffer. CdS/CdTe solar cells have been fabricated in these layers. 相似文献
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利用电沉积的方法制备CuxS薄膜,研究了不同的络合剂,不同的硫源及不同的热处理温度对电沉积制备CuxS薄膜性质的影响。研究发现:不同的络合剂可以制备得到不同相的CuxS薄膜,用EDTA作为络合剂的时候得到是六方相的Cu2S其主要晶面是(102),当用柠檬酸钠作为络合剂的时候得到的是单斜的Cu31Sl6其主要晶面是(842)。当用Na2S2O3作为硫源的时候得到的是单斜的Cu31S16其主要晶面是(842),当用硫脲作为硫源的时候得到是六方相的CuxS其主要晶面是(102)。随着热处理温度的提高,薄膜的结晶程度有了很大的提高,晶粒有了明显的长大,不同温度的热处理证实了CuxS薄膜的生长是沿着[102]方向定向生长的。 相似文献
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A mathematical model predicting evaporation and fluid flow in evaporating film region formed on a curved surface is developed to determine the interface temperature, heat flux distribution, and film profile in the thin film region. The numerical results show that the temperature of an equilibrium film on the curved surface of solid wire is larger than that on a flat surface and the equilibrium film thickness formed on the curved surface of solid wire is smaller than the one on the flat surface if the bulk fluid curvature of both evaporating film regions is the same. The rate of increase of the magnitude of total heat transport through the evaporating thin film region per unit length begins to decrease with larger superheat temperature due to the effect of a decreasing evaporating film region length. This potentially produces a limit of the maximum amount of heat transport through the micro regions for a given evaporator geometry. The current investigation provides a better understanding of the effects of interfacial forces on evaporation and fluid flow in thin film regions formed on a curved surface. 相似文献