n-Channel MOS ring oscillators fabricated in electron-beam recrystallized silicon-on-insulator

Both 25-stage n-MOS enhancement driver/enhancement load (E/E) and enhancement driver/depletion load (E/D) ring oscillators with a fan out of one composed of 4-µm channel length transistors have been successfully fabricated in CW electron-beam recrystallized polysilicon/Si3N4/SiO2/     

High-voltage CdSe-Ge TFT driver circuits for passive AC-TFELdisplays

Since an electroluminescent display (ELD) is a capacitive display driven at high voltage, it is necessary to fabricate high-voltage, large-current drivers. It is shown that a 20-μm complementary CdSe-Ge thin-film transistor technology can be used to integrate the high-voltage section of the drive circuits on the substrate of an ELD. The realized column driver levels a 15 V CMOS signal up to a modulation voltage of 50 V. A novel tristate row driver circuit, which is based on the symmetric character of the thin-film transistor, handles row selecting voltages of about 200 V together with current pulses of approximately 100 mA. In this paper, the design, simulation, and measurement of these circuits are described. Technology problems due to high voltages were solved     

Poly-Si TFT fabricated by laser-induced in-situ fluorinepassivation and laser doping

A new poly-Si TFT has been fabricated by employing laser-induced in-situ fluorine passivation and a laser-doping method. With only one excimer laser annealing, we have successfully fabricated the device using one step to crystallize, passivate and dope simultaneously. Although no additional plasma post-passivation was performed, the on-state and the off-state leakage properties of TFTs with fluorine passivation were improved compared with those without fluorine passivation. The device with in-situ fluorine passivation has the maximum transconductance of 13.3 μA/V for a C₂F₆ flow rate of 100 sccm, whilst that for a device without fluorine passivation is 8.4 μA/V. The device reliability under electrical stress was remarkably improved in the in-situ fluorine-passivated devices due to the fluorine passivation of trap states in the poly-Si channel and at the SiO₂/poly-Si interface     

High-voltage buried-channel MOS fabricated by oxygen implantation into silicon

A high-voltage offset-gate buried-channel MOS made on a SOS-like substrate is described. An isolation layer is formed by an oxygen implantation process called SIMOX. A 410 V buried SiO2 breakdown voltage and a 180 V drain breakdown voltage are obtained.     

A poly-Si TFT fabricated by excimer laser recrystallization onfloating active structure

This letter reports a. new excimer laser annealing (ELA) method to produce large polycrystalline silicon (poly-Si) lateral grains exceeding 4 μm. A selectively floating amorphous silicon (a-Si) flint with a 50 nm-thick air-gap was irradiated by a single-pulse XeCl excimer laser and uniform lateral grains were grown due to the lateral thermal gradient caused by the low thermal conductivity of the air. A poly-Si thin-film transistor (TFT) with two high-quality 4.6 μm-long lateral grains was fabricated by employing the proposed ELA and high field-effect mobility of 331 cm²/Vsec was obtained due to. the high-quality grain structure     

Characterization of double gate MOSFETs fabricated by a simple method on a recrystallized silicon film

A simple process to fabricate double gate SOI MOSFET is proposed. The new device structure utilizes the bulk diffusion layer as the bottom gate. The active silicon film is formed by recrystallized amorphous silicon film using metal-induced-lateral-crystallization (MILC). While the active silicon film is not truly single crystal, the material and device characteristics show that the film is equivalent to single crystal SOI film with high defect density, like SOI wafers produced in early days. The fabricated double gate MOSFETs are characterized, which demonstrate excellent device characteristics with higher current drive and stronger immunity to short channel effects compared to the single gate devices.     

Field enhancement of omega-shaped-gated poly-Si TFT SONOS memory fabricated by a simple sidewall spacer formation

A novel omega-shaped-gated (Ω-Gate) poly-Si thin-film-transistor (TFT) silicon-oxide-nitride-oxide-silicon (SONOS) nonvolatile memory devices fabricated with a simple process have been proposed for the first time. The Ω-Gate structure inherently covered two sharp corners manufactured simply via a sidewall spacer formation. Due to the sharp corner geometry, the local electric fields across the tunneling oxide could be enhanced effectively, thus improving the memory performance. Based on this field enhanced scheme, the Ω-Gate TFT SONOS revealed excellent program/erase (P/E) efficiency and larger memory window as compared to the conventional planar (CP) counterparts. In addition, owing to the better gate controllability, the Ω-Gate TFT SONOS also exhibited superior transistor performance with a much higher on-current, smaller threshold voltage, and steeper subthreshold swing. Therefore, such an Ω-Gate TFT SONOS memory is very promising for the embedded flash on the system-on-panel applications.     

Characteristics of a 1.2-µm CMOS technology fabricated on an RF-heated zone-melting recrystallized SOI

0.7-5-µm CMOSFET's were fabricated on SOI which was recrystallized using an RF-heated zone-melting recrystallization (RFZMR) method. The leakage currents of n-channel MOSFET's having gate lengths between 5- and 0.7-µm range between 10^-14and 10^-12A/µm and show no dependence on channel length. Those of the p-channel MOSFET's were 10^-14-10^-12A/µm when the gate lengths were longer than 1.2 µm, and increased when the gate lengths were shorter than 1.0 µm. The propagation delay time of the CMOSFET inverter was 0.13 ns per stage at a supply voltage of 3.5 V.     

A novel four-mask-processed poly-Si TFT fabricated using excimer laser crystallization of an edge-thickened a-Si active island

A four-mask-processed polycrystalline silicon thin-film transistor (poly-Si TFT) is fabricated using 50-pulse KrF excimer laser to crystallize an edge-thickened amorphous silicon (a-Si) active island without any shrinkage. This method introduces a temperature gradient in the island to enlarge grains from the edge, especially when the channel width is narrow. The grain boundaries across the width of the channel suppress the leakage current and the drain-induced barrier lowering. Moreover, the proposed poly-Si TFT with a channel length of L = 2 /spl mu/m and a channel width of W = 1.2 /spl mu/m possesses a high field-effect mobility of 260 cm/sup 2//Vs and an on/off current ratio of 2.31 /spl times/ 10/sup 8/.     

MOSFET's in electron-beam recrystallized PolySilicon

MOSFET's have been fabricated in polysilicon films recrystallized by scanned, cw electron-beam heating. The structure of the polysilicon is similar to the large-grain structure formed by cw laser recrystallization, and no significant differences were seen between the characteristics of transistors in material recrystallized by the two different types of heating.     

A high-performance multichannel dual-gate poly-Si TFT fabricated by excimer laser irradiation on a floating a-Si thin film

A new excimer laser annealing (ELA) process that uses a floating amorphous-Silicon (a-Si) thin film with a multichannel structure is proposed for high-performance poly-Si thin-film transistors (TFTs). The proposed ELA method produces two-dimensional (2-D) grain growth, which can result in a high-quality grain structure. The dual-gate structure was employed to eliminate the grain boundaries perpendicular to the current flow in the channel. A multichannel structure was adapted in order to arrange the grain boundary to be parallel to the current flow. The proposed poly-Si TFT exhibits high-performance electrical characteristics, which are a high mobility of 504 cm/sup 2//Vsec and a low subthreshold slope of 0.337 V/dec.     

IGZO TFT与ZnO TFT的性能比较

分析比较了ZnO TFT与IGZO TFT的主要光电学特性以及阈值电压稳定性。结果表明:ZnO薄膜与IGZO薄膜在可见光波长范围内都有着较高的光学透过率;在同等制备条件下,IGZO TFT器件的场效应迁移率、开关电流比、阈值电压及亚阈值系数等方面的特性均明显好于ZnO TFT;二者都有着较低的泄漏电流,并且差别很小。另外,ZnO TFT在正负偏压下阈值电压都有漂移,而IGZO TFT在正偏压下阈值电压漂移比ZnO TFT的小且在负偏压下阈值电压没有漂移,由此可见IGZO TFT比ZnO TFT有着更好的稳定性。总之,IGZO薄膜比ZnO薄膜更适合作为下一代TFT的有源层材料。     

A new spin cast process for mass-production of polycrystallinesilicon sheets

A spin cast process for producing polycrystalline silicon sheets for low-cost and high-efficiency solar cells and equipment for its application to mass production are discussed. This process makes it possible to produce high-quality silicon sheets with a production rate of 15 s/sheet. A maximum solar cell efficiency of over 13% is obtained. To reduce production time, a crystal growth zone occurs in the equipment between the spinning zone and the cooling zone. The crystal grows after the spinning process with a physical growth rate of 20 mm/min when mold modules in the crystal growth zone are transferred to the cooling zone     

TFT工艺中的反应性离子刻蚀

对ＴＦＴ器件工艺中的反应性离子刻蚀技术进行了研究,给出了ＴＦＴ器件工艺中常见薄膜刻蚀速率的实验结果,并讨论了掺杂气体（如Ｈ２、Ａｒ等）对刻蚀速率的影响。     

非晶硅TFT AMOLEDs

如果说非晶硅不是制作有机发光二极管显示器有源矩阵背板的理想材料，为什么会有这么多人正试图使用它呢?     

A dynamic RAM Cell in recrystallized polysilicon

A new, one-transistor, dynamic RAM cell has been fabricated in beam-recrystallized polysilicon. Placing thin oxides both above and below the storage region doubles the storage capacitance. Complete isolation of the storage region by oxides also reduces the susceptibility of the cell to soft errors from collection of charge injected into the substrate by the surrounding elements or by alpha particles. Long storage times are feasible, being limited only by the leakage of the access transistor. A thick oxide under the bit line reduces the bit-line capacitance, further increasing the ratio of storage capacitance to bit-line capacitance.     

3D CMOS devices in recrystallized silicon

A 2 μm scale three-dimensional CMOS process has been developed which allows the fabrication of MOS devices in two independent active device layers. NMOS transistors have been fabricated in the substrate and CMOS devices, including inverters and ring oscillators, in a thin laser-recrystallized polysilicon layer. The processing parameters were determined carefully in order to obtain a monocrystalline top layer and to avoid any damage to the underlying devices already existing.     

TFT LCD—未来主流显示技术

有资料表明,未来10年不可能有在性能上优于TFT-LCD的显示器问世,TFT-LCD产品将会越来越成熟。所谓平板显示器时代,实际上就是液晶平板显示时代。我国也将在最近10年内成为世界上重要的液晶平板显示基地之一。     

多晶硅TFT模型的研究进展

全面介绍了多晶硅薄膜晶体管(TFT)紧凑模型的现状和应用前景,简单说明了多晶硅TFT特有的电学特性,这是多晶硅TFT建模的基础,重点介绍了基于阈值电压和基于表面势的多晶硅TFT紧凑模型的研究进展,并对这些模型进行了评述,其中RPI模型是基于阈值电压的TFT模型的典范.虽然TFT模型已经有所发展,但成熟度还远远不够.最后提出了改进多晶硅TFT模型的方向和策略,包括二维器件模拟的应用、基于表面势模型的发展、多晶硅材料特性的应用、统一模型的发展、短沟效应的建模和参数提取等.