A Monte Carlo particle study of the intrinsic noise figure in GaAs MESFET's

The Monte Carlo particle model is well suited for noise studies as it reflects the basic transport physics and exhibits the same momentum and spatial distributions and fluctuations as the real semiconductor component. The model has been used to study the noise properties of a GaAs MESFET. The noise figure extracted is intrinsic, as the only contributions to it originate from the transistor itself, and does, therefore, exclude any effects of contact metallization and interface effects. This means that our definition of the noise figure has to deviate from the conventional one. It is found that fluctuations in the source current reduce the intrinsic noise figure significantly in a recessed gate structure, while the drain current fluctuations do not contribute to it.     

Thermal noise measurements in GaAs MESFET's

The absolute magnitude of the thermal drain current fluctuations and the associated effective thermal noise coefficient of 1-µm gate-length MESFET's have been measured under various bias conditions. At low drain-source voltages the magnitude of current fluctuations are in good agreement with the thermal noise theory which is based on the gradual channel approximation. However, under normal operating conditions (V_{ds} geq 1.5V,V_{gs} approx 0), we find for the thermal drain noise currentimin{d}max{2} approx 1 - 2 times 10^{-22}A²/Hz with a noise coefficientP approx 0.1in disagreement with the commonly used, theoretically predicted value P = 1.1. Our results are qualitatively consistent with a more comprehensive FET noise theory which properly takes into account high-field effects.     

Low-frequency diffusion noise in GaAs MESFET's

We report here on low-frequency diffusion noise of GaAS MESFET's. The Poole-Frenkel effect gives a shift of the corner frequency (f = D/πL²). From the measurements the activation energy of the diffusing ions is found to be 0.16 eV. At 77 K the diffusion noise is frozen out and the device has a 1/f spectrum.     

High performance ion-implanted low noise GaAs MESFET's

Low noise GaAs MESFET's fabricated by ion-implanting into AsCl3VPE buffer layers have demonstrated not only excellent dc and RF performance, but also a highly reproducible process. The average noise figure and associated gain of four device lots at 12 GHz are 1.6 dB and 10.0 dB, respectively. The standard deviation of noise figure and associated gain from device lot to lot are 0.03 dB and 0.19 dB, respectively. And the standard deviation of noise figure and associated gain from device to device for 35 devices over four lots are 0.13 dB and 0.47dB, respectively. The best device performance includes a 1.25 dB noise figure with 10.46 dB associated gain at 12 GHz for a 0.5 µm × 300 µm FET structure. These results demonstrate the excellent performance and process consistency of ion implanted MESFET's.     

Characterization of flicker noise in GaAs MESFET's for oscillatorapplications

GaAs MESFET oscillators commonly exhibit increased close-to-carrier noise, which is often attributed to upconversion of flicker noise from the MESFET. To establish and quantify this effect, this paper presents an experimental system that allows the simultaneous measurement of the flicker noise on the gate and drain terminals of a GaAs-MESFET, and of the noise imposed on an RF carrier when amplified by the MESFET. The cross correlations between these parameters can thus be determined; an analytical method is shown for extracting the levels of the effective sources of flicker noise from the results, and the manner in which these affect the RF carrier. In the tests performed, it was often found that the close-to-carrier noise was related directly to the low-frequency flicker noise     

A dc and microwave comparison of GaAs MESFET's on GaAs and Si substrates

In order to assess GaAs on Si technology, we have made a performance comparison of GaAs MESFET's grown and fabricated on Si and GaAs substrates under identical conditions and report the first microwave results. The GaAs MESFET's on Si with 1.2-µm gate length (290-µm width) exhibited transconductances (gm) of 180 mS/mm with good saturation and pinchoff whereas their counterparts on GaAs substrates exhibited gmof 170 mS/mm. A current gain cut-off frequency of 13.5 GHz was obtained, which compares with 12.9 GHz observed in similar-geometry GaAs MESFET's on GaAs substrates. The other circuit parameters determined from S-parameter measurements up to 18 GHz showed that whether the substrate is Si or GaAs does not seem to make a difference. Additionally, the microwave performance of these devices was about the same as that obtained in devices with identical geometry fabricated at Tektronix on GaAs substrates. The side-gating effect has also been measured in both types of devices with less than 10-percent decrease in drain current when 5 V is applied to a pad situated 5 µm away from the source. The magnitude of the sidegating effect was identical to within experimental determination for all side-gate biases in the studied range of 0 to -5 V. The light sensitivity of this effect was also very small with a change in drain current of less that 1 percent between dark and light conditions for a side gate bias of -5 V and a spacing of 5 µm. Carrier saturation velocity depth profiles showed that for both MESFET's on GaAs and Si substrates, the velocity was constant at 1.5 × 10⁷cm/s to within 100-150 Å of the active layer-buffer layer interface.     

Calculation of microwave performance of buffer layer gate GaAs MESFET's

The microwave performance of a GaAs MESFET, where a buffer layer of a low carrier concentration is inserted between the gate metal and the channel layer, is calculated and compared with that of a conventional MESFET. It is found that the use of such a high-resistivity buffer layer contributes to a great improvement of the microwave performance of the GaAs MESFET, especially in fTandf_{max}.     

GaAs dual-gate MESFET's

Performance of GaAs dual-gate MESFET, including high-frequency noise behavior, was analyzed on the basis of Statz's model. Under the design considerations developed from the analysis, fabrication and characterization of a prototype device were carried out. The present analysis was confirmed to reproduce satisfactorily the performance observed. Minimum noise figure and associated gain observed in the device with two 1-µm gates were; 1.2 dB and 16.7 dB at 4 GHz, 2.2 dB and 16.3 dB at 8 GHz, and 3.2 dB and 12.6 dB at 12 GHz, respectively. More than 35-dB gain controllability was also obtained at 8 GHz.     

Expression for the optimum noise figure of microwave MESFETs

An analytical expression for the optimum noise figure, F₀, of GaAs microwave MESFETs has been calculated. The generator impedance needed for an optimum noise figure is also derived. Predictions based on this theory compare well with reported measurements. Finally, with the aid of computer graphics, the results are displayed in a universal nomograph which can be used to determine F₀.     

Backgating in GaAs MESFET's

The phenomenon of backgating in GaAs depletion mode MESFET devices is investigated. The origin of this effect is electron trapping on the Cr²⁺and EL(2) levels at the semi-insulating substrate-channel region interface. A model describing backgating, based on DLTS and spectral measurements, is presented. Calculations based on this model predict that closely compensated substrate material will minimize backgating. Preliminary experimental data support this prediction.     

Direct parameter-extraction method for MOSFET noise model from microwave noise figure measurement

A new method for the determination of the four noise parameters of the metal oxide semiconductor field effect transistors (MOSFETs) based on the noise figure measurement system without microwave tuner is presented. The noise parameters are determined based on a set of analytical expressions of noise parameters by fitting the measured noise figure of the active device. These expressions are derived from an accurate small signal and noise equivalent circuit model, which takes into account the substrate parasitics, pad capacitances, and series inductances. On-wafer experimental verification is presented and a comparison with tuner based method is given. Good agreement is obtained between simulated and measured results for 0.5 × 5 × 16 μm, 0.35 × 5 × 16 μm and 0.18 × 5 × 16 μm (gate length × number of gate fingers × unit gate width) MOSFETs.     

Analytical model of GaAs MESFET's

A simple analytical model of GaAs MESFET's is proposed. The model is based on the assumption that the current saturation in GaAs MESFET's is related to the stationary Gunn domain formation at the drain side of the gate rather than to a pinchoff of the conducting channel under the gate. The saturation current, channel conductance, transconductance, charge under the gate, gate-to-source and drain-togate capacitances, cutoff frequency, characteristic switching time, power-delay product, and breakdown voltage are calculated in the frame of this model. The results are verified by two-dimensional computer calculations. They agree well with the results of the computer analysis and experimental data for a 1-µm gate GaAs MESFET. It is shown that a stray gate-to-drain and gate-to-source capacitance sets up a limitation of a gate length which must be larger than or about 0.1 µm for a GaAs MESFET.     

Reliability Study of GaAs MESFET's

Failure modes have been studied phenomenologically on a small-signal GaAs MESFET with a 1mu m aluminum gate. Three major failure modes have been revealed, i.e., gradual degradation due to source and drain contact degradation, catastrophic damage due to surge pulse, and instability or reversible drift of electrical characteristics during operation. To confirm the product quality and to assure the device reliability, a quality assurance program has been designed and incorporated in a production line. A cost-effective lifetime prediction method is presented that utilizes correlations between RF parameters and dc parameters calculated using an equivalent circuit model. Mean time to failure (MTTF) value of over 10/sup 8/ h has been obtained for the GaAs MESFET for an operating channel temperature of 100/spl deg/C.     

Optical Control of GaAs MESFET's

Theoretical and experimental work for the performance of GaAs MESFET's under illumination from light of photon energy greater than the bandgap of the semiconductor is described. A simple model to estimate the effects of light on the dc and RF properties of MESFET'S is presented. Photoconductive and photovoltaic effects in the active channel and substrate are considered to predict the change in the dc equivalent circuit parameters of the FET, and from these the new Y- and S-parameters under illumination are calculated. Comparisons with the measured S-parameter's without and under illumination show very close agreement. Optical techniques can he used to control the gain of an FET amplifier and the frequency of an FET oscillator. Experimental results are presented showing that the gain of amplifiers can be varied up to around 20 dB and that the frequency of oscillators can be varied (tuning) around 10 percent when the optical absorbed power in the active region of the FET is varied by a few microwatts. When the laser beam is amplitude-modulated to a frequency close to the free-running FET oscillation frequency, optical injection locking can occur. An analytical expression to estimate the locking range is presented. This shows a fair agreement with the experiments. Some suggestions to improve the optical locking range are presented.     

Degradation mechanism of GaAs MESFET's

The degradation mechanism of X-band low-noise GaAs MESFET's is examined to obtain meaningful information on a common mode of failure. The devices tested have a half-micrometer gate (Au/ Mo) and source and drain ohmic contacts (Au/Ni/Au-Ge). Zero bias drain conductanceg_{D0}is considered as a representative parameter for degradation during aging. The major failure mode is an increase in series resistance of the ohmic contacts. The amount of degradation, decrease ing_{D0}, is proportional to the square root of aging time, and accompanied by an increase in minimum noise figureF_{min}. A degradation model based on the formation of a high-resistance layer between the ohmic metals and GaAs crystal by a diffusion reaction mechanism is proposed, resulting in excellent agreement between calculated and experimental results. Using ion-microspectroscopy analysis (IMA), diffusion of Ni into GaAs crystal is revealed. Mean time to failure (MTTF) is estimated to be 10⁷-10⁸h at channel temperature of 80°C with an increase inF_{min}of 0.5 dB as failure criterion.     

Backdating in GaAs MESFET's

The phenomenon of backgating in GaAs depletion mode MESFET devices is investigated. The origin of this effect is electron trapping on the Cr/sup 2+/ and EL(2) levels at the semi-insulating substrate-channel region interface. A model describing backdating, based on DLTS and spectral measurements, is presented. Calculations based on this model predict that closely compensated substrate material will minimize backgating. Preliminary experimental data support this prediction.     

Quasi-two-dimensional modeling of GaAs MESFET's

A numerical simulation of GaAs MESFET structures is presented. The approach taken in this paper combines an analytical solution with a full simulation. Poisson's equation, the current continuity equation, and an electron-temperature equation are formulated in terms of a geometry factor that defines the shape of the conducting channel in the MESFET. The transport equations are then solved in one dimension and the channel geometry factor is found analytically. This method was found to be considerably faster than full two-dimensional simulations. The model has been compared to full two-dimensional drift-diffusion and energy-momentum results to determine its validity.     

Optimum source admittance for minimum noise figure of microwave transistors

Noise measurements of microwave transistors have shown that the optimum source admittance with respect to the minimum noise figure approaches the conjugate complex value of the transistor input admittance with increasing frequency. This fact is explained using the noise equivalent circuit of a microwave transistor.     

New modeling of GaAs MESFET's

A first theoretical analysis is given based on a new model of GaAs MESFET's which considers the inherent effects of a free-surface depletion layer between source and gate as well as between gate and drain. Change of surface potential according to the input gate voltage causes variable series resistance and variable gate capacitance to be added to the intrinsic FET. The parasitic effects are now quantitatively estimated and an improved guideline for the design and the fabrication process is given. Detailed calculation of the effects of device parameters for recessed gate structure and some comments on the optimization of n⁺-layers in self-aligned structure are included. The effects of the interfacial depletion layer between active layer and substrate is also estimated in terms of drain voltage and the ratio of total deep levels density in the substrate to donor density in the active layer.