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预失真技术在现代功率放大器研究和设计中已成为一个重要的课题。文章基于功率放大器模拟预失真技术以及数字预失真技术的特征,提出了一种全新的预失真技术及实现方法。理论分析和计算机仿真结果表明:文章所提出的功率放大器预失真技术在方案上是可行的,并且对消性能较好。从实验结果可以看出,采用了这种预失真技术的功率放大器,成本、线性等关键指标与模拟预失真和数字预失真功率放大器相比有一个很好的折衷,综合性价比较高。 相似文献
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预失真技术在现代功率放大器研究和设计中已成为一个重要的课题。本文基于功率放大器模拟预失真技术以及数字预失真技术的特征,提出了一种全新的预失真技术及实现方法。理论分析和计算机仿真结果表明:本文所提出的功率放大器预失真技术在方案上是可行的,并且对消性能较好。从实验结果可以看出,采用了这种预失真技术的功率放大器,成本、线性等关键指标与模拟预失真和数字预失真功率放大器相比有一个很好的折衷,综合性价比较高。 相似文献
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射频功放是线性技术中的一项研究项目,关系到射频功率放大器的应用效果。射频功放中的核心是数字预失真技术,深入研究数字预失真技术,保障其在射频功放中的应用效果,最主要的是满足射频功率放大器的需求,体现数字预失真技术的优势,因此,本文通过对数字预失真技术进行研究,分析其在射频功放中的应用。 相似文献
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本文针对功率放大器的数字预失真技术进行了研究,主要的内容包括:分析了数字预失真技术的国内外发展现状,衡量功放线性化程度的主要技术指标,描述了功率放大器的无记忆效应和有记忆效应情况下的行为模型.基于16QAM的数据系统,对多种项式的预失真,采用间接学习结构来实现,并基于最小递归二乘RLS算法分别对有记忆多项式预失真进行了仿真分析.仿真的结果表明基于Volterra级数的记忆多项式预失真收敛速度虽一般,却能很有效的改善PA的ACPR值几个dB左右.最后,通过Matlab软件仿真,验证了所设计的数字预失真技术的正确性. 相似文献
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通信技术的发展对于功率放大器的要求越来越高,主要集中在高线性、高效率的功放.预失真是目前改善功放线性比较好的方法.新的自适应混合预失真系统充分利用模拟预失真,快速简单的和数字预失真算法的精确,输入信号先后经过模拟、数字两级预失真系统,并结合信号包络检测技术进行带外信号调节.通过对仿真结果的比较,IMD性能比单独使用数字预失真系统有了8 dB的改善,同时收敛时间也有所减少. 相似文献
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有记忆功放的数字基带预失真实现方案 总被引:2,自引:0,他引:2
随着无线通信技术的发展,高功率放大器的应用越来越广泛。但受到功放的非线性特点的限制,使功放的效率大大降低。因此,数字预失真是多种功放线性化技术研究中的热点之一。本文提出了一种基于有记忆多项式的数字白适应预失真方案,整个方案所需要的硬件资源较少,而且实现难度不高,可以实现数字预失真的目的。 相似文献
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数字预失真功放的输出动态提升技术在现代功率放大器设计和研究中已成为一个重要的课题。本文基于数字预失真功放自身特征以及自适应信号处理技术,提出了一种全新的输出动态提升技术。理论分析和试验结果表明:采用该新型技术的数字预失真功放不仅输出动态得到了大幅度提升,而且线性也有一定程度改善。 相似文献
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通过被动接收辐射源信号并确定其位置的无源定位技术,在电子侦察、搜索救援等领域具有重要价值。传统测向交叉、时差、频差等无源定位技术通常需要两步实现辐射源的定位,第1步通过截获的信号采样估计与辐射源位置有关的定位参数,第2步利用这些定位参数求解辐射源的位置,这种处理方式带来了信息量损失、定位参数关联困难、系统灵敏度需求高等问题。近十几年来,兴起了一种无需估计定位参数,而是直接处理原始采样信号获得辐射源位置估计的直接定位(DPD)技术,其具有适应低信噪比、无需参数关联、鲁棒性强等优势。在对已有直接定位技术进行全面总结基础上,该文归纳了基于不同信息类型的典型直接定位技术、特殊信号直接定位技术、高分辨率高精度直接定位技术、直接定位快速算法以及直接定位模型误差校正技术等已有成果,并对直接定位未来发展方向进行展望。 相似文献
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该文针对功率放大器的数字预失真技术进行了深入研究。并在经典Wiener模型的基础上,提出了一种改进的基于多项式加权的数字预失真算法。这种新算法包含加权、递归最小二乘和解加权三个部分。算法性能在MATLAB仿真软件进行了性能的验证与对比。结果表明,该算法在保持与功率放大器的传统数字预失真技术性能相当的条件下,结构更为简单。 相似文献
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随着移动通信信号带宽的增加,传统功率放大器数字预失真线性化技术越来越受到采样率的限制。为了使线性化效果更好,文中提出了一种数字预失真和模拟预失真相结合的混合预失真器,利用模拟预失真宽带宽的特点和数字预失真线性化能力强的优势,把模拟预失真和数字预失真融合在一起,共同补偿功放的非线性。由于受实验设备采样率的限制,文中采用了带宽为60 MHz的5 G NR信号对一个中心频率为3.5 GHz的射频功放进行实验验证。实验结果表明:提出的混合预失真器不仅优于单独的数字预失真器和模拟预失真器的非线性矫正性能,而且还能改善数字预失真因采样率限制无法改善的带外互调失真。 相似文献
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Transistor threshold voltage (Vt) scaling causes higher power consumption by increasing the subthreshold leakage and short-circuit currents in CMOS circuits. Leakage currents are significant contributors to the overall power consumption of digital systems-on-chip as threshold voltage, channel length, and gate oxide thickness are reduced with CMOS technology scaling. A new dual-pullup/dual-pulldown (DPU/DPD) repeater is proposed in this paper for higher energy efficiency in low-voltage and low-frequency applications. The standby mode leakage power consumption is reduced by 59.11% with the proposed clock tree as compared to the conventional 3 level H-tree operating with a power supply voltage of 1.0V in a 45 nm CMOS technology. The short-circuit currents are suppressed by selectively employing high-Vt transistors in the repeaters. The clock network with the proposed buffer lowers the active mode energy consumption by up to 24.91% as compared to a conventional clock tree under equal silicon area constraint. Post layout results reveal that the statistical spread of clock skew in the DPU/DPD H-tree is also 20.60% lower than the conventional H-tree network. 相似文献
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Woo Y. Y. Kim J. Yi J. Hong S. Kim I. Moon J. Kim B. 《Microwave Theory and Techniques》2007,55(5):932-940
We have developed a new adaptive digital predistortion (DPD) linearization technique based on analog feedback predistortion (FBPD). The lookup-table-based feedback input can remove the bandwidth limitation of the feedback circuit related to the loop delay, and suppress feedback oscillation by accurate digital control of the feedback signal. Moreover, the predistortion (PD) signal can be extracted very efficiently. By combining the feedback linearization and DPD linearization techniques, the performance of the predistorter is enhanced significantly compared to the conventional DPD. To clearly visualize the characteristics of digital FBPD (DFBPD), we have compared it to the conventional DPD based on the recursive least square algorithm using Matlab simulation. The results clearly show that the new method is a good linearization algorithm, better than a conventional DPD. For the demonstration, a Doherty power amplifier with 180-W peak envelope power is linearized using the proposed DFBPD. For a 2.14-GHz forward-link wideband code-division multiple-access signal, the adjacent channel leakage ratio at 2.5-MHz offset is -58 dBc, which is improved by 15 dB at an average output power of 43 dBm 相似文献
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Multi-Lookup Table FPGA Implementation of an Adaptive Digital Predistorter for Linearizing RF Power Amplifiers With Memory Effects 总被引:1,自引:0,他引:1
Gilabert P.L. Cesari A. Montoro G. Bertran E. Dilhac J.-M. 《Microwave Theory and Techniques》2008,56(2):372-384
This paper presents a hardware implementation of a digital predistorter (DPD) for linearizing RF power amplifiers (PAs) for wideband applications. The proposed predistortion linearizer is based on a nonlinear auto-regressive moving average (NARMA) structure, which can be derived from the NARMA PA behavioral model and then mapped into a set of scalable lookup tables (LUTs). The linearizer takes advantage of its recursive nature to relax the LUT count needed to compensate memory effects in PAs. Experimental support is provided by the implementation of the proposed NARMA DPD in a field-programmable gate-array device to linearize a 170-W peak power PA, validating the recursive DPD NARMA structure for W-CDMA signals and flexible transmission bandwidth scenarios. To the best of the authors' knowledge, it is the first time that a recursive structure is experimentally validated for DPD purposes. In addition to the results on PA efficiency and linearity, this paper addresses many practical implementation issues related to the use of FPGA in DPD applications, giving an original insight on actual prototyping scenarios. Finally, this study discusses the possibility of further enhancing the overall efficiency by degrading the PA operation mode, provided that DPD may be unavoidable due to the impact of memory effects. 相似文献
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现有直接定位(Direct Position Determination,DPD)算法主要研究对象是视距目标.针对传统无线电定位技术对超视距目标定位精度低的问题,提出一种辐射源信号波形已知的超视距直接定位(Over-the-Horizon Direct Position Determination,ODPD)方法.该方法基于电离层电子密度参数,依据最大似然(Maximum Likelihood,ML)准则,从信号数据域直接推导出仅关于目标位置的代价函数.其次,本文推导了关于电离层虚高测量误差的定位误差协方差矩阵.实验表明ODPD方法在低信噪比下相比现有算法,能显著提高超视距目标的定位精度,定位性能更接近克拉美罗界(Cramér-Rao Low Bound,CRLB).误差分析显示,电离层虚高误差标准差在20km时,引起的定位误差能控制在10km的范围内. 相似文献
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Content addressable memory (CAM) is a specialized search engine mostly used for speeding memory lookup in network devices. Despite fast searching, activation of all comparison circuits in every clock cycle costs huge power. Power dissipation is more severe in high capacitive NOR match-line (ML) because of higher precharge activity and multiple transitions in ML. This paper proposes a two-layer ML scheme to reduce power due to frequent ML switching between precharge and evaluation phases. The complementary charging property of P and N matching circuits of NOR cells are utilized with the help of a ML precharge and sensing (MLPS) block to charge up only the matched entry while the mismatched entries are held at pre-discharged levels. Also, charging up the first layer due to mismatch limits the discharge levels of the mismatched second layer. These techniques reduce precharge activity besides lessening evaluate-power. Based on a 45-nm CMOS technology, post-layout analysis of the 64 × 32-bit proposed CAM at 1-V supply shows 56% and 24% reductions in precharge-power over a conventional CAM and a gated-power ML sensing CAM, respectively. In addition, the total ML power saving of approximately 2× is achieved when compared to a high-performance master-slave ML and a local-NOR global-NAND ML based CAMs besides decreased macro area. With the help of a charge-hold and charge-up sensing scheme, the proposed design achieves a match function in only 223.52 ps and dissipates 1.42 fJ/bit/search favouring it to be an efficient energy-delay design among the compared designs. 相似文献