A three-terminal piecewise-linear modelling approach to dc analysis of transistor circuits

The simulation of electronic circuits by computer has become an important part of present-day circuit analysis and design, especially in the area of integrated circuit design. One of the goals in computer simulation of integrated circuits is to have a program ‘package’ for which the input consists of chip fabrication data (mask dimensions, impurity profiles, material data such as carrier lifetimes) and the output displays the complete circuit response. This requires both an efficient modelling approach and a fast circuit analysis method. In this paper a simulation method is described which generates dc responses (in the form of operating points or transfer characteristics) of transistor circuits directly from physical parameter data. The basis of the method is a two-dimensional piecewise-linear approach to the dc modelling of bipolar transistors. The model is directly used in a piecewise-linear circuit analysis program to simulate the dc response of a given circuit.     

A fast method for process reliability analysis of CNFET-based digital integrated circuits

Due to aggressive technology scaling in electronic of digital integrated circuits, the circuit reliability is becoming an ever-increasing challenge. In nanoscale technologies, the physical and chemical properties of materials are fundamentally different compared to the larger scales. Therefore, it is necessary to revise the conventional reliability assessment techniques considering their applicability to nanoscale integrated circuits. This paper presents a method for evaluating the circuit reliability at the transistor level of abstraction considering the physical characteristics of the transistors. The proposed method considers various parameters, including the probability of different types of a transistor failure, the topology of logic gates and the logical values of the applied input vectors. Experimental results show that the proposed approach provides accurate transistor-level circuit reliability evaluations (with < 4% inaccuracy) as compared to a reference method based on Monte Carlo HSPICE simulations in addition to more than 800 times speedup. Moreover, to show the comprehensiveness and extensibility of the proposed reliability analysis method for the technologies beyond conventional MOSFETs, it is applied to carbon nanotube field-effect transistor (CNFET) technology as one of the most promising candidates for future CMOS circuits. The obtained results re-acknowledge that in order to achieve a more accurate reliability estimation approach for CNFET circuits, it is necessary to consider the open and short failure probability values individually instead of considering them in the form of a single transistor failure probability.     

Analysing the operation of the basic pass transistor structure

Pass transistor logic has become important for the design of low‐power high‐performance digital circuits due to the smaller node capacitances and reduced transistors count it offers. However, the acceptance and application of this logic depends on the availability of supporting automation tools, e.g. timing simulators, that can accurately analyse the performance of large circuits at a speed, significantly faster than that of SPICE based tools. In this paper, a simple and robust modelling technique for the basic pass transistor structure is presented, which offers the possibility of fast timing analysis for circuits that employ pass transistors as controlled switches. The proposed methodology takes advantage of the physical mechanisms in the pass transistor operation. The obtained accuracy compared to SPICE simulation results is sufficient for a wide range of input and circuit parameters. Copyright © 2006 John Wiley & Sons, Ltd.     

A new parallel ZVS converter with less power switches and low current stress components

A new direct current (DC)/DC converter with parallel circuits is presented for medium voltage and power applications. There are five pulse‐width modulation circuits in the proposed converter to reduce current stress at low voltage side for high output current applications. These five circuits share the same power switches in order to reduce switch counts. To reduce the converter size, conduction loss, and voltage stress of power semiconductors, the series connections of power metal‐oxide‐semiconductor field‐effect transistor (MOSFET) with high switching frequency instead of insulated gate bipolar transistor (IGBT) with low switching frequency are adopted. Thus, the voltage stress of MOSFETs is clamped at half of input voltage. The switched capacitor circuit is adopted to balance input split capacitor voltages. Asymmetric pulse‐width modulation scheme is adopted to generate the necessary switching signals of MOSFETs and regulate output voltage. Based on the resonant behavior at the transition interval of power switches, all MOSFETs are turned on under zero voltage switching from 50% load to 100% load. The circuit configuration, operation principle, converter performance, and design example are discussed in detail. Finally, experimental verifications with a 1.92 kW prototype are provided to verify the performance of the proposed converter. Copyright © 2015 John Wiley & Sons, Ltd.     

Development of an electrothermal simulation tool for integrated circuits: Application to a two-transistor circuit

In this paper a methodology for performing electrothermal analyses on integrated circuits is introduced. Using the relaxation method, standard electrical and thermal simulators, which are often used in the design process, are coupled through an efficient interface program. The simulator is capable of performing steady-state and transient analysis at device and chip levels. A variable-time-step technique has been implemented to reduce the computational time for a given set of computational resources. The simulator has been validated on different structures such as the bipolar junction transistor to predict the temperature distribution and the device performance in an amplifier circuit and an integrated current-mirror circuit. The simulation results are compared to experimental results to verify the performance of the electrothermal simulator and the accuracy of the thermal model. Simulation results demonstrate that the approach is suitable to model the thermal effects of integrated circuits in a more time-efficient, accurate and user-friendly fashion.     

IGBT model validation

Efforts to model the switching behavior of IGBTs have been greatly expanded. In many cases, circuit modeling has become an economic necessity because the cost of the components of a medium- to high-power circuit, and the load itself, is so high that all means available muse be used to lower the risk of system failure during both the prototyping phase of product development and production. As the physics that govern transistor behavior are quite complex, attempts at accurately predicting the details of transistor switching performance tax models to their extreme. Test procedures are needed to check the validity of predictions made by various models, and these procedures need to be applicable to commonly used circuits. It is particularly important that these test procedures are built around a test-bed that is well understood and well characterized so that the device model is given the correct information for the simulations. The details of a suitable test bed circuit that can be used for model-verification-related measurements on half bridge configured IGBTs are given. The NIST/IEEE Working Group on Model Validation has been established to address the need for testing the validity of various models as they relate to predicting the behavior of devices under realistic conditions. The work described in this article is performed, in part, to support the needs of the IGBT task of the Working Group     

Harmonic balance method applied to the numerical electrical physical modelling of two-terminal,non-linear microwave circuits in the frequency domain

A numerical frequence-domain modelling of two-terminal, non-linear microwave circuits is presented. It basically relies on a process allowing the solution of the frequency-domain curcuit harmonic balance equations while accounting for the semiconductor device by means of an accurate numerical macroscopic physical model. In its present state of development, the model allows the study of a single two-terminal device circuit operating in harmonic mode. Its capabilites are illustrated by means of the results of a study devoted to the optimization of the load curcuit configuration of a millimetre-wave avalanche diode frequency multiplier. The influence of the output load impedance level on the circuit output RF performance has been investigated for different input power levels in direct frequency multiplication mode and in the presence of additional circuit tunings at low harmonic rank idler frequencies.     

Electronic model of a Ferroelectric Field Effect transistor

Abstract

A pair of electronic models has been developed of a Ferroelectric Field Effect transistor. These models can be used in standard electrical circuit simulation programs to simulate the main characteristics of the FFET. The models use the Schmitt trigger circuit as a basis for their design. One model uses bipolar junction transistors and one uses MOSFET's. Each model has the main characteristics of the FFET, which are the current hysterisis with different gate voltages and decay of the drain current when the gate voltage is off. The drain current from each model has similar values to an actual FFET that was measured experimentally. The input and output resistance in the models are also similar to that of the FFET. The models are valid for all frequencies below RF levels. Each model can be used to design circuits using FFET's with standard electrical simulation packages. These circuits can be used in designing non-volatile memory circuits and logic circuits and are compatible with all SPICE based circuit analysis programs. The models consist of only standard electrical components, such as BJT's, MOSFET's, diodes, resistors, and capacitors. Each model is compared to the experimental data measured from an actual FFET.     

Contribution to the modeling of a non-ideal Sigma-Delta modulator

One major issue facing the design and the simulation of complex circuits, such as Sigma-Delta modulators (ΣΔM), is the relatively large computing-time; required when using transistor level based simulators. Hence, high-level system modeling is suitable to achieve a time-efficient IC design. In this scope, the aim of the present work is to develop an enhanced model for a switched-capacitor second order sigma delta modulator. Besides the numerous effects, already included in the standard models, many additional non-idealities aspects have been taken into consideration. Namely, the DC nonlinearity behavior of both: the operational amplifier (OP-AMP) and the switches ON-resistance. The obtained model permits, thus, more accurate prediction of the relative signal-to-noise ratio (SNR), compared to the standard one.     

动态神经网络对功率放大器的建模方法及要点

为了使基于神经网络的功率放大器的行为级建模变得更加灵活且易于实现,主要介绍了动态神经网络应用于功率放大器的建模方法及要点。首先简单介绍了动态神经网络的模型和理论,然后说明了对功率放大器进行建模时所采用的方法。重点讲述了动态神经网络对功率放大器建模过程中的几个要点,包括:如何选择动态神经网络隐层神经元数目和导数阶数、如何确立功率放大器输出电压表达式、长期记忆效应的建模、动态神经网络在仿真软件中收敛性等问题。注意这些要点之后,神经网络模型仿真结果会具有良好的收敛性和准确性,这样就能快速地完成功率放大器的建模以应用到实际系统的设计和优化之中。     

Electronic Circuit Analysis and Design by Driving-Point Impedance Techniques

By using driving point impedance (DPI) techniques a systematic approach to the analysis of electronic circuits can be developed which helps the engineer gain insight into circuit action. The answers, representing the circuit's currents, voltages, gains, and driving-point impedances, are written down by inspection of the original circuit diagram without resorting to equivalent circuits of flow graphs. The resulting answers are in a most simple form which can be easily interpreted by inexperienced persons since the relative magnitude of each factor is known. Thus, the student rapidly obtains a "feel" for electronic circuits. The method can also be used to complement a computer-aided circuit design and analysis. A tutorial treatment of the fundamental methods is presented and two examples are given. The simple example, which is complex by ordinary standards, has five input signals and three active elements; yet the output signal voltage is written out by inspection with each step explained. The second example, a two-stage transistor feedback amplifier, is used to demonstrate how the fundamental concepts are applied to complex feedback circuits. The gain, input impedance, and output impedance of the feedback amplifier are found and approximations are used to compare the answers to ordinary solutions given for such amplifiers. The answers obtained by DPI analysis methods are also compared to equivalent answers found by node analysis.     

Dynamic behavioral modeling of nonlinear circuits using a novel recurrent neural network technique

In this paper, a new method called local-global feedback recurrent neural network (LGFRNN) is proposed for dynamic behavioral modeling of nonlinear circuits. The structure of the proposed method is based on recurrent neural network and constructed by time-delayed local and global feedbacks. Adding time-delayed feedbacks has a great impact on the learning capability of previous neural network-based methods. Moreover, time-delayed local feedbacks alleviate the problem of slow convergency of the conventional neural network-based methods in the training phase. The proposed LGFRNN can be trained only by having sampled input-output waveforms of the original circuit without knowing the internal details of the circuit. A training algorithm based on real-time recurrent learning (RTRL) is used to train LGFRNN. After the training phase, the proposed LGFRNN provides accurate macromodel of a nonlinear circuit. The proposed method is more accurate compared with the conventional neural-based models (which do not benefit from time-delayed local-global feedbacks) and also significantly reduces the training time of the conventional models. Moreover, proposed LGFRNN is faster than the existing models in simulation tools. The validity of the proposed method is verified by time-domain modeling of three nonlinear devices including commercial TI's SN74AHCT540 device, five-stage complementary metal-oxide-semiconductor (CMOS) receiver, and commercial TI's LM324 power amplifier.     

适用于复杂电路分析的IGBT模型

推出一种适用于复杂电路仿真分析的绝缘栅双极性晶体管(insulated gate bipolar transistor,IGBT)模型。模型分阶段模拟IGBT的开关瞬态过程,并采用曲线拟合的方式实现对IGBT稳态特性的建模。模型具有计算速度快、参数提取容易、物理概念明确的特点。描述模型的等效原理、构成和参数提取过程,并在PSIM软件包下建立其等效电路。以FF300R12ME3型IGBT为例给出了模型参数,并将模型应用于IGBT的开关特性分析、缓冲吸收电路设计以及IGBT的并联运行分析。仿真和实验结果对比证明了该模型的有效性。     

A global delay model for domino cmos circuits with application to transistor sizing

Domino CMOS circuits have played important roles in the design of high-speed VLSI chips such as 32-bit microprocessors and their family chips. Many researchers have worked on the characterization of the delay time and optimal design of domino CMOS circuits using circuit simulators as the main CAD tools. This paper presents a global analytical delay model for an important class of domino CMOS circuits wherein a multitude of n-channel transistors form a series connection. the new model is shown to predict the delay time from the precharging clock edge to the 0.5 V_DD output level with less than 10% error as compared to that from SPICE simulation over the entire design space. the delay model has been applied efficiently to the design automation of domino CMOS circuits modules.     

交流励磁发电机的仿真分析

交流励磁发电机的励磁一般是由交-交变频器提供,但是由于变频原理、控制算法的误差以及线路参数的不对称,最终导致变频器的三相输出波形与标准正弦波相比,存在波形不对称、畸变较大的问题.在这种情况下单纯使用解析法进行仿真分析将会产生较大的误差,并且不能与外围硬件电路相结合,因此无法对包括变频器在内的整个交流励磁发电机系统直接进行仿真.交流励磁发电机的动态仿真等效电路的建立,是以交流电机的基本电磁关系为基础,针对解析法的缺点,通过电路的形式,将电机本身各项参数和外界的输入变量结合在一起,客观地反映出发电机运行过程中输出量与输入量及参数之间的相互关系.文章以该等效电路为基础,对交流励磁发电机系统进行了仿真分析,并与实验结果对比,讨论了谐波含量.     

基于雪崩三极管的高重频高压纳秒脉冲产生方法综述

激发大气压脉冲等离子体通常对施加脉冲的要求是k V级幅值、ns级前沿和宽度、k Hz级重复频率,尤其要求脉冲前沿和宽度尽量小,雪崩三极管脉冲产生电路非常适合于这样的要求。本文综述了基于雪崩三极管的脉冲产生方法。首先介绍了雪崩三极管的基本原理和研究概况,进而介绍了多管串联电路、多级Marx电路、多管并联电路以及脉冲截断电路四种典型电路结构的研究现状,分析了各电路的性能特点,并以多级Marx电路为例理论分析了影响输出脉冲幅值、前沿、后沿、脉宽、重复频率、效率和稳定性等参数的关键因素。最后介绍了多管串联Marx电路、多管并联Marx电路以及多路Marx并联电路三种组合型脉冲产生电路的研究进展,并对基本原理进行了分析。     

An approach to the analysis of the CMOS differential stage with active load and single-ended output

The complementary metal-oxide-semiconductor (CMOS) differential amplifier with active load and single-ended output is one of the most widespread analog building blocks in modern mixed-signal circuits for signal processing applications, because of its good performance in terms of common-mode rejection and voltage gain, combined with an extremely simple circuit structure, which performs directly differential to single-ended conversion. The authors present a straightforward approach to studying the behavior of such a simple circuit and try to explain some of its features in an intuitive way without resorting to tedious calculations. In particular, this study considers the DC operating point and the common- and differential-mode voltage gains, and the results of the proposed analysis are in good agreement with those provided by both accurate analytical solution and simulation of the circuit. Among the other results, this approach emphasizes some interesting, though very often neglected, aspects of the circuit behavior.     

输出信号变化率的电压温度自动补偿

数据输出电路在电源电压升高而温度很低的情况下，MOS管工作速度快，会使输出信号变化率过大而产生许多干扰信号。若情况相反，又会使电路性能指标不能达到标准。解决上述问题的方法是自动控制输出电路MOS管的栅极电压变化率。在电路中设置电源电压检测电路，使其输出电压信号反映电源电压的变化，并且用于控制数据输出电路MOS管的栅极电压变化率．在电路中设置温度检测电路，使其输出电压信号反映温度的变化，并且用于控制输出电路MOS管的栅极电压变化率．上述双重控制可以自动补偿数据输出信号变化率的偏移．     

Modeling and simulation of temperature drift for ISFET-based pH sensor and its compensation through machine learning techniques

The paper presents modeling and simulation of ion-sensitive field-effect transistor (ISFET)-based pH sensor with temperature-dependent behavioral macromodel and proposes to compensate the temperature drift in the sensor using intelligent machine learning (ML) models. The macromodel is built using SPICE by introducing electrochemical parameters in a metal-oxide-semiconductor field-effect transistor (MOSFET) model to simulate ISFET characteristics. We account for the temperature dependence of electrochemical and semiconductor parameters in our macromodel to increase its robustness. The macromodel is then exported as a subcircuit element, which is used to design the readout interface circuit. A simple constant-voltage, constant-current (CVCC) topology is utilized to generate the data for temperature drift in ISFET pH sensor, which is used to train and test state-of-the-art ML-based regression models in order to compensate the drift behavior. The experimental results demonstrate that the random forest (RF) technique achieves the best performance with very high correlation and low error rate. Corresponding curves for output signal using the trained models show highly temperature-independent characteristics when tested for pH 2, 4, 7, 10, and 12, and we obtained a root mean squared error (RMS) variation of ΔpH ≤ 0.024 over a temperature range of 15°C to 55°C in comparison with ΔpH ≤ 1.346 for uncompensated output signal. This work establishes the framework for integration of ML techniques for drift compensation of ISFET chemical sensor to improve its performance.     

基于行为模型的飞机电源系统建模仿真技术研究

针对新型飞机电源系统部件种类多、控制复杂以及电路级仿真运算量大、速度慢的特点,提出了基于行为模型的飞机电源系统电能部件的建模方法。从电能部件的输入输出出发,依据功率平衡关系,并且结合受控源,来描述部件功能特征。利用Simulink软件,建立了系统中的关键部件的行为模型,并且构建了整个电源系统仿真模型。通过该模型,开展了飞机电源系统的特性仿真研究。仿真结果表明,所建立模型简单、方便、可以反映部件和系统的行为特性,仿真速度比电路模型更快。