Charge pump power-factor-correction dimming electronic ballast

A voltage-source charge pump power-factor correction (CPPFC) continuous dimming electronic ballast is proposed in this paper. The basic charge pump PFC principle is presented, and its unity power factor condition is then reviewed. Constant lamp power control and crest factor correction technique in dimming mode operation are then discussed. A continuous dimming controller with average lamp current control and duty-cycle modulation is developed so that the lamp is able to operate in constant power and low crest factor from 20% to 100% dimming level. The developed dimming electronic ballast has features of higher than 0.99 power factor, low crest factor, and low-DC-bus voltage     

An improved charge pump power factor correction electronic ballast

An improved charge pump power factor correction (CPPFC) electronic ballast using the charge pump concept is proposed in this paper. Circuit derivation, principle of operation, and the conditions for achieving unity power factor are discussed. The proposed electronic ballast is implemented and tested with two 40 W fluorescent lamps. It is shown that 84% of overall efficiency and 1.6 of crest factor can be achieved with 200-V line input voltage. The measured line input current harmonics satisfy IEC 1000-3-2 Class C requirements. The lamp power variation range is automatically limited within ±15% for ±10% line input voltage variation without feedback control     

New charge pump power-factor-correction electronic ballast with awide range of line input voltage

A new charge pump power-factor-correction (CPPFC) electronic ballast with a wide range of line input voltage is proposed in this paper. Circuit derivation and DC-bus voltage stress at start-up mode are discussed. The average lamp current control with switching frequency modulation is developed to achieve constant lamp power operation and low-crest factor. The proposed CPPFC electronic ballast is analyzed, implemented, and evaluated. It features continuous line input current, low total harmonic distortion (THD), constant lamp power operation, low-crest factor, and less switching current stress with low-DC-bus voltage stress for the line voltages from 180 to 265 V     

A novel single-stage push-pull electronic ballast with high inputpower factor

A novel single-stage push-pull electronic ballast with high input power factor is presented in this paper. The proposed electronic ballast combines the front-end power-factor corrector and push-pull converter into a single-stage power converter. Compared to the single-stage class-D electronic ballast, the proposed circuit does not require an isolated driver. The control of the circuit is easier and the cost less. The circuit of the ballast is analyzed and the design guidelines are listed. The experimental results verify the theoretical derivation     

Improving crest factor of electronic ballast-fed fluorescent lampcurrent using pulse frequency modulation

In case where electronic ballast employing a valley-fill passive power-factor correction (PFC) circuit is used for feeding fluorescent tamps, a new method to reduce crest factor of the lamp current is studied in this paper. It is known that a 50% valley-fill passive PFC provided for high input power factor results in undesirable value of crest factor of the fluorescent lamp current, In order to reduce crest factor to a lower value, a pulse frequency modulation technique based on the waveform of the DC-link voltage which is predetermined by the passive PFC circuit is taken into the switching control action of the electronic ballast. An equation-based analysis between the crest factor of lamp current and the effect of varying the inverter switching frequency is comprehensively performed. Several simulation and experiment results illustrate the Effectiveness of the proposed control scheme     

Single-stage electronic ballast with class-E rectifier as power-factor corrector

A single-stage high-power-factor electronic ballast with a Class-E rectifier as a power-factor corrector is proposed. A Class-E rectifier is inserted between the front-end bridge rectifier and the bulk filter capacitor to increase the conduction angle of the bridge-rectifier diode current for obtaining low line-current harmonics. The Class-E rectifier is driven by a high-frequency sinusoidal current source, which is obtained from the square-wave output voltage of the Class-D inverter through an LC series resonant circuit. A high-frequency transformer is used for impedance matching. The experimental results for a 32-W prototype ballast are given. The switching frequency was 61.3 kHz. At full power, the power factor was 0.992 and the total ballast efficiency was 88.3%. The lamp-current crest factor was about 1.36. The simulated and experimental results were in very good agreement.     

High Power Factor Self-Oscillating Electronic Ballast to Supply Four Fluorescent Lamps

This paper presents an innovative modification in the conventional self-oscillating driver, in order to supply variable loads. This modification consists of adding an auxiliary output filter supplying a small power resistor, which also includes the primary winding of the self-oscillating transformer. The analysis for self-sustained oscillations is performed by extended Nyquist criterion, which defines the design equations for the ballast component values. A design example is presented, using the proposed circuit in a high power factor electronic ballast supplying four independent lamps. A passive circuit named valley charge pump is used to perform the power factor correction. The ballast supplies four lamps independently, without considerable frequency changes, with an efficiency of 93%, and reaching IEC 61000-3-2 requirements for the input current distortion.     

带预热功能的CFL控制器

本文设计了一款用于CFL的新型控制器,带预热功能,从而大大提高了CFL的寿命。该控制器包括振荡器、集成高压启动电路、参考电压电流电路、时钟分频电路、死区时间控制电路、预热电荷泵电路、两个高/低端驱动器、电感电流饱和保护电路和电容模式保护电路等。在应用中仅需外加少量元件,就可组成简单、低成本的CFL镇流器。     

Acoustic-Resonance-Free High-Frequency Electronic Ballast for Metal Halide Lamps

To avoid the acoustic resonance on operating metal halide lamps, an autofrequency-searching method is implemented on the high-frequency electronic ballast. The proposed method allows the use of a high-frequency electronic ballast, making the ballast able to adjust the operating frequency automatically as soon as the acoustic resonance is detected and, consequently, to locate it at a stable frequency. The electronic ballast achieves a high efficiency and a high power density through the employment of a high-frequency resonant inverter with an embedded buck-boost converter for power-factor correction and lamp power regulation. The control strategy is realized by a microprocessor along with the acoustic-resonance detection circuit. The operation of autofrequency searching is illustrated by the experiments on an electronic ballast designed for 70-W metal halide lamps.      

An improved “charge pump” electronic ballast with lowTHD and low crest factor

The “charge pump” electronic ballast circuit, which employs a charging capacitor and a high-frequency AC source to implement power factor correction (PFC), has become an attractive topology for ballasting fluorescent lamps. However, the basic “charge pump” electronic ballast circuit has the problems of high total harmonic distortion (THD) of the input current and high crest factor (CF) of the lamp current. This paper analyzes the origin of the problems and proposes a novel solution. With the addition of two small clamping diodes, good input current (PF>0.99, THD<5%) and lamp current (CF<1.6) can be obtained with open-loop control. Experimental results are provided for verification     

A single-stage high-power-factor electronic ballast withduty-ratio-controlled series resonant inverter

A single-stage high-power-factor electronic ballast is developed by making an integration of an active filter and a series resonant inverter. The function of power-factor correction is performed by adjusting the duty ratio of the inverter power switches with a simple control circuit. A prototype unit designed for a 36-W compact fluorescent lamp is built and tested to verify the predicted results     

低电源电压条件下的双阈值电压泵

由于存在逆向电流,利用电流传输开关特性的改进型的电压泵（NCP-1）的电压增益被大大减弱.本论文提供了一个新的方法.通过使用双阈值电压CMOS代替单阈值电压CMOS,不但消除了逆向电流,而且对低电压有很好的放大增益.PSPICE模拟结果,当电源电压为0.5V时,6级电压泵可使输出电压放大到2.68V.     

3 GHz低杂散锁相环中的低失配电荷泵

基于SMIC 40 nm CMOS工艺,提出了一种改进型电荷泵电路。在传统电荷泵锁相环中,电荷泵存在较大的电流失配,导致锁相环产生参考杂散,使锁相环输出噪声性能恶化。设计的电荷泵电路在电流源处引入反馈,降低了电流失配。仿真结果表明,在供电电压为1.1 V,电荷泵充放电电流为0.1 mA,输出电压在0.3~0.7 V范围变化时,电荷泵的电流失配率小于0.83 %,锁相环的输出参考杂散为-65.5 dBc。     

一种适用于MEMS麦克风的新型恒压电荷泵设计

实现了一种新型恒压输出电荷泵电路,通过选择合理的电荷泵结构能有效抑制反向电流及衬底电流,并通过一种负反馈稳压电路得到低纹波且不随电源电压变化的稳压输出,非常适用于MEMS麦克风。该电路采用MIXIC0.35μm标准CMOS工艺实现,测试结果表明该电路能自适应2.8～3.6V的电源电压变化,输出稳定的9V直流电压。     

Charge pump with perfect current matching characteristics inphase-locked loops

Conventional CMOS charge pump circuits have some current mismatching characteristics. The current mismatch of the charge pump in the PLLs generates a phase offset, which increases spurs in the PLL output signals. In particular, it reduces the locking range in wide range PLLs with a dual loop scheme. A new charge pump circuit with perfect current matching characteristics is proposed. By using an error amplifier and reference current sources, one can achieve a charge pump with good current matching characteristics. It shows nearly perfect current matching characteristics over the whole VCO input range, and the amount of the reference spur is <-75 dBc in the PLL output signal. The charge pump circuit is implemented in a 0.25 μm CMOS process     

一种新型电荷泵电路的设计

文章提出了一种新的全差分电荷泵结构，与传统电荷泵电路相比，这个电路具有输出范围大和无跳跃现象的优点，同时还可以有效地解决电荷泄漏和充放电失配等问题。     

Charge pump with reduced current mismatch for reference spur minimization in PLLs

In this article, a charge pump circuit featuring minimal mismatch between its up and down currents is proposed. In conventional charge pumps, where error amplifiers are used in feedback, the factor that hinders exact current matching is the offset voltage of the error amplifier. In the proposed design, the input offset voltage is computed and additional current delivering/comsuming branch is implemented to supplement for the error current. The new charge pump requires a few error amplifiers and a dynamic comparator for its operation. Simulations considering process variations show current mismatch of less than 20 nA even at the worst case event. The proposed charge pump has been utilized in PLL circuits to reduce reference spurs and simulations of these PLLs show remarkable spur reduction.     

An evaluation of MOS interface-trap charge pump as an ultralow constant-current generator

Explores the MOS interface-trap charge-pump as an ultralow constant-current generator for analog CMOS applications. Charge pumping techniques in general are more suitable than conventional continuous-time techniques for ultralow current generation because the linear controllability of current by frequency is maintained regardless of the level of current. An interface-trap pump has the same property but the minimum charge it puts out per cycle is at least two orders of magnitude smaller than that of a switched-capacitor charge pump. This helps generate the same current more accurately at a much higher frequency with a much smaller filter capacitance. The paper presents a simplified model of the terminal characteristics of the interface-trap pump and an evaluation of its performance as a stand-alone current generator. Cascoding and complementary pumping are introduced as measures of performance improvement. Temperature sensitivity, pulse feedthrough, controllability, matching, reliability, and trimming issues are addressed. Transconductor circuits built with the charge pump are presented and experimentally evaluated.     

Design of a high performance CMOS charge pump for phase-locked loop synthesizers

A new high performance charge pump circuit is designed and realized in 0.18μm CMOS process. A wide input ranged rail-to-rail operational amplifier and self-biasing cascode current mirror are used to enable the charge pump current to be well matched in a wide output voltage range.Furthermore,a method of adding a precharging current source is proposed to increase the initial charge current,which will speed up the settling time of CPPLLs.Test results show that the current mismatching can be less than 0.4%in the output voltage range of 0.4 to 1.7 V,with a charge pump current of 100μA and a precharging current of 70μA.The average power consumption of the charge pump in the locked condition is around 0.9 mW under a 1.8 V supply voltage.     

A dual-phase charge pump circuit with compact size

In this paper, a regulated dual-phase charge pump with compact size is presented. By means of a nano-ampere switched-capacitor voltage reference (SCVR) circuit, the dual-phase charge pump regulator can reduce the quiescent current and the output ripple. Besides, a new power stage is proposed to define the stability of the overall system. Owing to the design of buffer stage, the charge pump regulator can extend bandwidth and increase phase margin. Thus, the transient response and driving capability can be improved. Beside, the proposed automatic body switching circuit can efficiently drive the bulk of the power p-type MOSFETs to avoid leakage and potential latch-up. This chip was fabricated by TSMC 0.35 μm, 3.3 V/5 V 2P4 M CMOS technology. The input voltage range varies from 2.9 to 4.9 V for the lithium battery and the output voltage is regulated at 5 V. Experimental results demonstrate the charge pump can provide 50 mA maximum load current without any oscillation problems.