突变反型异质结及其双极晶体管的研制

文章对突变反型异质结的能带图、接触电势差和势垒区宽度进行了讨论和研究。同时，介绍了基于分子束外延(MBE)法生长的SiGe／Si结构的异质结双极晶体管(HBT)制造工艺，并给出了测试结果。     

异质结双极晶体管概况

<正> 一、前言 1951年肖克莱提出了宽能带发射极原理,1957年由Kroemer详细地介绍了双极晶体管中采用宽能带发射区,从而提高注入效率和电流放大系数的理论。由于当时没有先进的工艺技术作基础,无法证实这种双极晶体管的优越性能。直到七十年代初,随着液相外延(LPE)技术的出现,对异质结晶体管的研制及其有关的研究工作才开始活跃起来。许多学者曾利用LPE技术制成了微波和光电应用的AlGaAs/GaAs异质结构的分立器件,并证明了异质结双极晶体管(HBT)的许多优点。随着对HBT的深入研究,发现它所要求的基区宽度很薄,要求     

用于数字集成电路的(Ga,Al)As/GaAs双极晶体管

利用分子束外延生长制备了(Ga, Al)As/GaAs npn双极晶体管。所设计的外延层结构适用于高速集成电路,所用的基区薄至1000(?),其p=10~(19)cm~(-3)。本文论证了基于选择性腐蚀和铍注入(为了获得平面结构)的制备工艺。讨论了影响晶体管电流增益的各种因素。预计基于这种类型按比例缩小的晶体管的电流型逻辑电路在相应的速度-功率乘积为70fJ时,传播延迟时间为20～25ps(单端扇入和扇出)。     

用氧化镉(CdO)做宽发射区的磷化铟平面型扩散晶体管

本文提出了一种新型的异质结双极型晶体管.该管的收集区和基区由磷化铟材料做成.和硅平面晶体管类似,管子的基区采用一般的氧化层(Al_2O_3)掩蔽扩散工艺(在这里是锌扩散).而管子的发射区则采用溅射氧化镉簿层的方法形成,因而管子的结构是平面型的.氧化镉是一种宽禁带(Eg=2.3eV)的N型半导体.氧化镉和磷化铟组成了晶体管的宽发射极.本文介绍了制管工艺.给出并分析了晶体管的伏一安特性.初步结果是:晶体管共发射极电流增益h_f_a=10(I_C=50mA,V_(cr)=15V).发射极一收集极间的击穿电压BV_(CED)=30V.这种晶体管及其工艺为InGaASP/InP器件及其光电集成制作提供了一条可能的新途径.     

集成电路用的GaAs/AlGaAs异质结双极晶体管

利用分子束外延(MBE)和离子注入来制造隐埋宽禁带发射区的GaAs/AlGaAs异质结双极晶体管。倒置型的电流增益约为100,表明了这种技术用于I~2L型数字集成电路的可行性。     

高性能双极／CMOS工艺—CIT2

已经研究了一种新型的双极/CMOS工艺集电极注入技术2(CIT2),其光刻条宽为1.5μm。用标准双极工艺制造的LSI芯片,通常包括埋层、外延和隔离扩散等高温工艺,其成品率比MOS电路低,又难以与CMOS器件组合,因而就开发了注入集电极的新工艺。CIT技术既不采用外延,又不采用埋层,可以在双极或MOS生产线上实现。 用这种工艺制作了截止频率高(fT-5GHz)的npn晶体管,又作出了延迟时间为180ps的ECL门。非本征基极的整个表面为PtSi所覆盖,这样,它的电阻被降到20Ω。 n沟和P沟MOS晶体管的性能可与用常规的CMOS工艺制出的性能相媲美。在n阱内形成p沟MOS晶体管。p沟和n沟MOS晶体管的漏和源都直接与多晶硅相接,其最小传输延迟为280ps。     

IGBT技术发展综述

绝缘栅双极晶体管(IGBT)自问世以来,在结构设计、加工工艺和应用开发等方面得到了很大的发展.概述了IGBT的一般结构和发展历史,着重介绍了近年来几个专利技术中IGBT结构设计和制造方面的新进展.特别是宽禁带半导体材料SiC的异军突起,为IGBT技术开辟了一个新的发展空间.     

SiGe材料及其在双极型器件中的应用

SiGe材料具有很多独特的性质,高性能的应变SiGe外延层能够将能带工程的概念引入到传统的S基材料中去。外延SiGe合金使得在Si基材料上制作性能优异的双极晶体管成为可能。本文回顾了siGe材料和SiGe异质结双极晶体管的最新研究进展,包括它们的结构、性能、制作工艺、优点以及未来发展方向等。     

异质结双极晶体管的能带设计

异质结双极晶体管(HBT)是一种新型的超高速、微波与毫米波半导体器件,可以有效地解决同质结双极晶体管中高速度与高放大的关系。本文以AlGaAs/GaAs npn HBT为例,讨论了HBT能带设计中的有关问题,并简要介绍了HBT的研究现状与发展方向。     

复合功率晶体管——新颖音放功率管

一、概述目前,半导体功率器件基本上分为两部分:一为双极型功率晶体管,它的历史长,工艺成熟,应用时间长,占领了功率器件的大部分市场;另一部分为MOS功率晶体管,主要由VMOS、DMOS等组成,它是在大规模,超大规模工艺成熟之后逐步发展起来的.MOS功率晶体管输入阻抗高,且没有双极型晶体管的电荷存     

异质结晶体管的设计与性能

本文较详细地讨论了异质结晶体管的设计原理、材料选用和结构设计。在能带设计方面对宽发射区、缓变基区和多种收集区分别进行了讨论,比较了不同能带结构的优缺点。文章以晶体管的特征频率f_T和最高振荡频率f_(max)为例分析和比较了Ge/GaAs,Si/α-Si,GaAs/GaAlAs,InGaAsP/InP四种异质结晶体管的频率特性潜力。文章最后对目前常用的台面结构、平面结构、倒置结构作了介绍,并分析了它们的优缺点,简介了异质结的发展现状和发展方向。     

用氧化镉(CdO)为发射区的InGaAsP/InP双异质结晶体管

本文提出和研制了一个新型的InGaAsP/InP双极型晶体管.在单片集成电路中它能与1.55μmInGaAsP/InP双异质结激光器共容而组成一个晶体管-激光器器件.该晶体管的主要特点是采用氧化镉(CdO)薄层作为器件发射区,由InP组成收集区而形成NpN双异质结晶体管.测量结果表明晶体管能双向工作,测得的正向共发射极电流增益为40(V_(CE)=5V,Ic=1mA),反向增益为8(V_(CE)=1.5V,Ic=100μA).文中还给出了h_(fe)—I_c特性和晶体管CdO-InGaAsP发射结的伏安特性.     

An investigation of the effect of graded layers and tunneling on the performance of AlGaAs/GaAs heterojunction bipolar transistors

We present the results of theoretical and experimental studies of the heterojunction bipolar transistor. Our calculations are based on a new thermionic field-diffusion model which takes into account the dependence of the emitter efficiency on the height of the interface conduction band spike and tunneling across the spike. Based on this theory we derive analytical expressions for the current-voltage characteristics and relate the short-circuit common emitter current gain to the material parameters, doping levels, grading length, and device temperature. We demonstrate that the thermoemission transport across the interface spike limits the rate of increase in the collector current with the emitter-base voltage and, as a consequence, the maximum common emitter current gain. Tunneling also plays an important role, especially for abrupt heterojunctions. Our calculations reveal an important role played by grading of the composition of the emitter region in the vicinity of the heterointerface. Such grading decreases the barrier height at the interface and greatly enhances the emitter injection efficiency.     

Heterojunction bipolar transistor using a (Ga,In)P emitter on a GaAs base, grown by molecular beam epitaxy

We report the first N-p-n heterojunction bipolar transistor (HBT) using a (Ga,In)P/GaAs heterojunction emitter on a GaAs base. This combination is of interest as a potential alternate to (Al,Ga)As/GaAs, because of theoretical predictions of a larger valence band discontinuity and a smaller conduction band discontinuity, thus eliminating the need for grading of the emitter/base junction. The structure was grown by molecular beam epitaxy, with the base doping (∼10¹⁹cm^-3) far exceeding the n-type doping ∼5¹⁷cm^-3) of the (Ga,In)P wide gap emitter (Eg= 1.88 eV). Common-emitter current gains of 30 were attained at a current density of 3000 A/cm², the highest current density achieved without burnout.     

Thermal effects on the characteristics of AlGaAs/GaAsheterojunction bipolar transistors using two-dimensional numericalsimulation

Two-dimensional numerical simulations incorporating the spatial distributions of the energy band and temperature were used to study AlGaAs/GaAs heterojunction bipolar transistor characteristics. It was found that the negative differential resistance and the reduction of the base-emitter voltage for a constant base current in the active region are due to thermal effects. The differential current gain and cutoff frequency decrease when the transistor is operated at high power levels. The temperature distribution of the transistor operated in the active region shows a maximum at the collector region right beneath the emitter mesa. When the transistor is operated in the saturation region, the emitter contact region may be at a slightly lower temperature than the heat sink temperature. This thermoelectric cooling effect results from the utilization of the thermodynamically compatible current and energy flow formulations in which the energy band discontinuities are part of the thermoelectric power     

Simulation study of the DC and AC characteristics of an a-Si:H(n)/GaAs(p)/GaAs(n) heterojunction bipolar transistor

This paper presents the results of a simulation study focused on the evaluation of the fundamental DC and high-frequency characteristics of a GaAs-based heterojunction bipolar transistor employing a wide gap emitter made of hydrogenated amorphous silicon (a-Si:H). The role of the fundamental geometric design parameters on the device performance is analysed, showing in particular that the emitter thickness has a strong impact on the DC current gain, while the base thickness weakly affects the cut-off frequency. The role of the electronic properties of the thin film amorphous emitter is also discussed, leading to the conclusion that the device AC characteristics are in fact principally limited by the poor carrier mobility typical of a-Si:H. However, a DC current gain of 4000 and a cut-off frequency close to 10 GHz can be predicted for an optimised device if standard values for the electronic parameters of the materials are assumed.     

Heterojunction bipolar transistors with emitter barrier lowered byδ-doping

An npn heterojunction bipolar transistor with a Si-δ-doped layer at the emitter-base hetero-interface is demonstrated. The Si δ-doped layer reduces the potential spike at the emitter junction. This design reserves the abruptness of the heterojunction, reduces electron barrier and increases the hole barrier simultaneously. Experimental results show that the HBT's turn-on characteristics are greatly improved while the current gain remains high. The offset voltages as low as 44 mV have been obtained. Very high current gains at very low collector current densities are obtained     

The realization of a GaAs—Ge wide band gap emitter transistor

The fabrication and properties of an n-GaAs emitter, p-Ge base, n-Ge collector transistor which possesses significant current gain is described, These GaAs wide band gap emitter transistors have shown incremental current gains near 15 when operated at current densities up to 3500 A/cm². The doping level used in the base region was quite high (up to 5×10¹⁹/cm³in order to avoid a spurious Ge p-n junction in this region. The epitaxial deposition of the GaAs emitter region was carried out at a low temperature in order to also avoid a hidden p-n Ge junction. The low deposition temperature resulted in low (about 5×10¹⁵/cm³emitter doping levels. The general nature of the GaAs-Ge heterojunction energy-band diagram permits this high doping in the base or Ge region relative to the GaAs emitter region without reducing the current gain below unity. The observation of gain in this n-p-n heterojunction structure where the emitter is much more lightly doped than the base is considered to be confirmation of the theoretical proposals of Shockley and Kroemer.     

Improving collector-current uniformity in emitter-gradedAlGaAs/GaAs heterojunction bipolar transistors

To investigate the effect of a graded layer on collector-current uniformity, two types of HBTs were fabricated by metalorganic chemical vapor deposition (MOCVD). One type had a bandgap graded layer at the emitter-based interface to eliminate the conduction-band spike. The other type was a conventional HBT (heterojunction bipolar transistor) with an abrupt heterojunction fluctuated due to the fluctuation of the barrier energy from the emitter to the base. The bandgap-graded layer drastically suppressed the fluctuation of the collector current. the standard deviation of the threshold voltage was improved from 3.03 to 0.42 V by adopting bandgap grading at the emitter-based interface     

SiGe heterojunction bipolar transistors and circuits toward terahertz communication applications

The relatively less exploited terahertz band possesses great potential for a variety of important applications, including communication applications that would benefit from the enormous bandwidth within the terahertz spectrum. This paper overviews an approach toward terahertz applications based on SiGe heterojunction bipolar transistor (HBT) technology, focusing on broad-band communication applications. The design, characteristics, and reliability of SiGe HBTs exhibiting record f/sub T/ of 375 GHz and associated f/sub max/ of 210 GHz are presented. The impact of device optimization on noise characteristics is described for both low-frequency and broad-band noise. Circuit implementations of SiGe technologies are demonstrated with selected circuit blocks for broad-band communication systems, including a 3.9-ps emitter coupled logic ring oscillator, a 100-GHz frequency divider, 40-GHz voltage-controlled oscillator, and a 70-Gb/s 4:1 multiplexer. With no visible limitation for further enhancement of device speed at hand, the march toward terahertz band with Si-based technology will continue for the foreseeable future.