VO—9850录像机伺服系统原理与维修

录像机是通过磁鼓中的磁头未进行信号与磁能的转换。磁鼓是由伺服系统来带动。录像机记录或重放都要求磁鼓沿着正确的磁带空间位置进行运动，即要求记录与重放信号不能有误差。这主要是靠向服系统来保证。录像机中伺服系统包括磁鼓伺服。主导伺服和带盘伺服三大部分。1伺服系统的一般原理伺服系统是一个自动调节系统，它的任务是消除所有于扰影响，使马达运转精确地靠近输入基准。分析伺服系统应着眼于系统中马达的转速或马达的旋转相位与系统中各参数之间的关系。伺服系统由鉴相器、环路滤波器。马达以及系统中一些放大器组成。这几个组成…     

IDE硬盘迈向高转速时代

近来硬盘技术有很大的进步,除了巨磁阻效应(GMR)在磁头技术上面的应用外,硬盘容量与主轴马达转速也持续的向上发展,再加上硬盘传输接口规格的成熟,今年7200rpm的IDE硬盘将成为市场上的主流。     

读懂硬盘术语

转速（Rotationl Speed）指硬盘电机主轴的转速，转速是决定硬盘内部传输率的关键因素之一，它的快慢在很大程度上影响了硬盘的速度，同时转速的快慢也是区分硬盘档次的重要标志之一。硬盘的主轴马达带动盘片高速旋转，产生浮力使磁头飘浮在盘片上方。要将所要存取资料的扇区带     

马达控制电路

L296元件非常适合于应用在控制马达转速的电路上,图中所示的电路就是如何使L296元件来驱动最大功率100W的马达。为了达到良好的马达转速控制,则要提供转速产生器(tachmeter generator)。     

基于NAND闪存的高性能和可靠的PRAID-6

基于固态硬盘的RAID-6阵列,在每次数据更新时,都需要计算和写入校验信息,降低了阵列的性能和缩短了固态硬盘的使用寿命,该论文提出了一种基于延迟写入校验信息策略的RAID-6,称为PRAID-6.在每次数据更新时,PRAID-6只计算部分校验信息,写入非易失性存储器P-Cache.在垃圾回收时,将部分校验信息与原校验信息合并,产生新的校验信息,写入固态硬盘.通过实验测试结果表明PRAID-6的响应时间比RAID-6减少了30%,比RAID-5减少了10%.垃圾回收开销比RAID-6减少了20%,比RAID-5减少了15%.     

马达机构模型之建立与PID位置控制系统模拟

前言 伺服马达广泛应用於工业界，各级学校自动控制实习课程也大都以直流伺服马达控制系统为主要设备。除了硬体实习外，我们发现以ＩｓＳｐｉｃｅ亦可轻易解析直流伺服马达控制系统：模拟的关键在於如何建立马达与机构模型。本专辑以英国Ｆｅｅｄｂａｃｋ公司生产的自动控制实验系统３３－００２为例：旨在说明如何建立马达机构单元（３３－１００）与类比控制单元（３３－１１０）之模型，并模拟验证ＰＩＤ位置伺服控制系统之特性。对拥有Ｆｅｅｄｂａｃｋ３３－００２设备的学校而言：可应用此一技术，以ＩｓＳｐｉｃｅ模拟辅助自动控制…     

遥控马达控制器

前言 遥控产品优劣的关键在於遥控小马达以及马达伺服控制器的性能。优良的遥控产品可反应出细致的遥控动作，而其性能的提升可分为两方面，第一为机械结构方面，如齿轮的组合方式、马达的内部构造等方面，这些都是在机械结构的改良，主要使伺服马达拥有更快的动作速度、更大的扭力。第二是有关控制器方面，现令大部分遥控伺服马达控制器都属於类比式，亦即当遥控伺服马达控制器接到动作命令时，会经由电子回路计算出马达位置的增减量。但是因为控制器为类比电路在控制处理过程中很容易因类比元件老化与杂讯而造成误动作。类比式的控制电路…     

步进马达速度控制

一、简介 这篇文章主要是介绍如何利用盛群半导体型号为HT46R47的微控制器来控制步进马达的转速,主要方式是透过HT46R47这颗微控制器中模拟信号转换数字信号的功能,将模拟的控制信号转为适当的数字信号后,再透过步进马达的驱动电路就可以控制其转速和方向。     

家用录像机原理及故障分析讲座 第六讲 伺服系统(下)

二、主导电机的伺服通过对主导电机的速度、相位伺服能使主导电机的主导轴稳定,但主要是使主导轴所带动的磁带能匀速运动。磁带作为伺服对象,不是与主导轴成为一体物,而是由主导轴与压带轮传动使磁带匀速。因此对于磁带运动状态的检测,必须由专用控制信号的录放来实现,伺服环路中应该包括这种控制(CTL)信号的因素。(一)主导电机速度伺服1.记录状态为使主导电机转速标准、稳定,也     

嵌入式系统

脉冲信号输出频率高达6.55MHz的八轴运动控制卡凌华科技推出高端八轴运动控制卡PCI-8158,提供八轴脉冲输出,脉冲信号输出频率高达6.55MHz,控制伺服马达、步进马达及线性马达均适用。此产品具备软件保护功能,避免软件剽窃,而卡号设定功能则便利客户使用多卡应用系统,可同时实现两组线性或是     

基于DSP和光电编码器的永磁同步电机速度检测系统

为获取永磁同步电机转子速度,设计了一种基于DSP控制器正交编码电路和光电编码盘的检测系统。DSP识别光电编码盘上光敏管所产生的两路正交编码脉冲,对捕获的脉冲信号进行加减计数,通过对DSP编写的用户程序读取当前计数值,计算电机转子转速。阐述了TMS320F243芯片正交编码和增量式光电编码盘的工作原理,建立了由永磁同步电机、DSP板、逆变功放板和PC机组成的实验测量装置。实验结果表明,在给定的转速设定值下,能够实现快速和较高精度的速度检测,能够满足一般工程系统对交流调速和伺服控制的性能要求。     

Phase-locked loop techniques. A survey

Phase-locked loop (PLL) is a technique which has contributed significantly toward the technology advancement in communication and motor servo control systems in the past 30 years. Inventions in PLL schemes combined with novel integrated circuit (IC) technology have made PLL devices important system components. The development of better modular PLL ICs is continuing. As a result, it is expected that they will contribute to the improvement in performance and reliability of future communication systems. They will also contribute to the development of higher accuracy and higher reliability servo control systems, such as those involved in machine tools. This paper provides a concise review of the basic PLL principles applicable to communication and servo control systems, gives the configurations of PLL applications and reports a number of popular PLL chips     

基于数字锁相环的步进频率脉冲信号实现

本文介绍了一种基于数字锁相环的雷达步进频信号实现方法,并给出实现方案和研制结果。     

A CMOS rectifier-integrator for amplitude detection in hard diskservo loops

In this paper a CMOS alternative amplitude detection system is presented. It is designed as an alternative for the, bipolar, amplitude detection in hard disk servo systems. The amplitude is detected by converting the input voltage to a current, rectifying the current, and integrating it on a capacitor. For this a new OTA topology and a rectifier cell are designed. This circuitry is expanded with a very linear current mirror and an automatic offset compensation system to cope with technology spread. The measured accuracy of the amplitude detector is 0.2% (9 b). This makes the circuit suitable for implementation in state-of-the art hard disk systems with very high track densities and very short access times. Because the circuit is realized in standard CMOS it is a further step toward CMOS only hard disk electronics. Because the circuit operates from a single 3 V power supply and has limited power consumption it can be used in battery powered systems     

基于盘型对称驱动的惯性冲击旋转压电马达

该文提出了一种基于盘型对称驱动的惯性冲击旋转压电马达。该马达主要由定子、转子、驱动足和预紧装置组成。马达激励信号为锯齿波信号,采用压电叠堆激励实现马达高功率输出。马达通过螺杆将定子与预紧装置装配于一体,实现了马达结构紧凑化与微型化。设计加工了马达样机并通过实验验证了马达的工作原理,对马达的综合性能进行了分析和测试。测试结果表明,当马达预紧装置施加的预紧力为1 N,输入激励电压峰-峰值为80 V,激励信号频率为1 kHz,且每输出一个周期锯齿波,激励信号延迟100 ms再输出下一个,以研究马达静态启动特性和步长,测得马达的最大空载速度达到3.05 r/min,平均步长为0.032 rad;激励信号频率为3 kHz时,马达的最大空载速度达到9.1 r/min,马达最大负载可达16.2 N·mm;马达在0.5~3 kHz激励信号频率范围内均可实现转动。     

基于虚拟仪器技术的伺服电机测试系统设计

虚拟仪器技术是测试技术和计算机技术两门学科的结晶,在此将现代虚拟仪器技术应用于船载测控雷达直流电机测试,设计了船载测控雷达直流伺服电机的在线测试系统,使用PID控制算法控制定标参量,通过TCP/IP协议实现了测试数据的远程共享和用户对测试系统的远程操控。该系统可以实现直流电机的负载控制以及对扭矩、转速、功率以及温度的实时监测。     

Head-positioning control using resonant modes in hard disk drives

The best way to enhance the input/output (I/O) performance of a hard disk drive is by increasing the spindle speed. Therefore, the effect of windage vibrations caused by the airflow increases as the spindle speed increases. The servo bandwidth is limited by the primary resonant frequency of the mechanical system. However, the frequencies of the windage vibrations are higher than the primary resonant frequency. Accordingly, these frequencies are also above the servo bandwidth and are too high to be controlled by a conventional control system. In response to this problem, we have developed two methods for designing a servo control system that can suppress the windage vibrations. One method uses a stable mechanical resonant mode, and the other uses a stable resonant mode created by a digital filter. By using these methods, the head-positioning system can control the vibrations above the frequency of the primary resonant mode and the servo bandwidth. Application of these methods to actual hard disk drives showed that they can greatly decrease the windage vibrations, in which the peak frequency is about six times the open-loop gain 0-dB crossover frequency.     

Improving GPS Receivers Positioning in Weak Signal Environments Based on Fuzzy SSMF-FFT and Fuzzy Kalman Filter

With the advent of global positioning system (GPS) and the increasing expansion of technology, improving GPS receivers positioning has attracted great attention. When the signal received by these receivers is weak, receiver functioning becomes impaired. Due to the existing noise and the presence of Doppler shift in weak signal conditions, the signal acquisition section becomes problematic and in weak signal conditions or phase lock loop (PLL), the tracking section design of noise conditions gets difficult. In case of a lock loss on the signal, the user will not be able to calculate the Doppler frequency and the system will diverge. Therefore, a robust algorithm for the GPS receiver PLL is very vital. In this paper, the squared segmented matched filter-fast Fourier transform algorithm is used to improve the acquisition of weak GPS signals with an average SNR of 15 dB. By using the matched filter, the SNR is maximized and the code phase estimation will be more accurately. Also, the use of a segmented filter before the FFT reduces the number of FFT points and therefore, the computational complexity is reduced. To calculate the number of batches and obtain the best acquisition output, in the proposed algorithm, the system becomes fuzzy. In tracking section, fractional Fourier transform (FRFT) with the PLL based on fuzzy Kalman filter (FKF) is used to reinforce it against weak signal environments. The FRFT is used for estimating frequency and acceleration, and a third-order FKF is used for designing the PLL. As a result of these changes, the RMSE of positioning is improved more than 35%.

     

用于锁相环快速锁定的鉴频鉴相器设计

针对鉴频鉴相器(PFD)的盲区现象对锁相环路的锁定速度的影响,设计了一种PFD结构,可以实现锁相环路的快速锁定。该结构在传统PFD的基础上,利用内部信号的逻辑关系进行逻辑控制,其输出特性呈现非线性;在输入相位差大于π时,抑制了复位脉冲的产生,避免了输入时钟边沿的丢失,有效消除了盲区,加快了锁相环的锁定速度。设计采用SMIC 0.18μm标准CMOS工艺,采用全定制设计方法对该PFD结构进行了设计、仿真分析和验证。结果表明,采用该PFD结构的锁相环,在400 MHz工作频率下锁定时间为2.95μs,锁定速度提高了34.27%。     

CPLD在无人机发动机转速检测中的应用

开发了一种基于CPLD的简单方便的无人机(UAV)发动机转速检测模块,利用EDA技术,通过VHDL硬件描述语言完成了各模块的设计。阐述了发动机转速测量和转速模拟的原理和实现方法,并对设计方案进行了仿真和系统联调。结果表明:开发的发动机转速测量模块能够实时、准确地采集发动机的转速信号,发动机模拟模块能够精确地提供系统所需频率,能够完成无人机发动机转速检测。