CMOS Differential-Mode Exponential Voltage-To-Current Converter

A CMOS differential-mode exponential voltage-to-current converter is presented which is based on the approximated Taylor's series expansion. The proposed circuit has been fabricated in a 0.5μm N-well CMOS process. Experimental results show that the output dynamic range of the proposed differential-mode exponential voltage-to-current converter can be 15dB while the nonlinear error is less than 1.35%. The experimental results are given to demonstrate the proposed circuits.     

Realisation of exponential V-I converter using composite NMOStransistors

A CMOS voltage-to-current converter with exponential characteristics is presented. The Taylor's series expansion is used for realising the exponential function. In a 0.35 μm CMOS process, the HSPICE simulation results show a 15 dB linear range with a linearity error of <±0.5 dB. The total power consumption is <0.8 mW with ±1.5 V supply voltage. The circuit can be used in the design of a variable gain amplifier (VGA)     

1.5V 3mW CMOS V?I converter with 75 dB SFDR for 6V/sub pp/ input swings

A novel CMOS voltage-to-current converter topology is proposed. The use of nested local feedback loops and the absence of current replication in the signal path provide low sensitivity to transistor mismatch and high linearity. Measurements for a 0.5 mum CMOS prototype show a spurious-free dynamic range (SFDR) of 75 dB for a differential input of 6 V_pp and a dual supply of plusmn1.5 V. The circuit occupies 0.1 mm² and consumes 3 mW     

A CMOS V-I converter with 75-dB SFDR and 360-/spl mu/W power consumption

This work describes a method for analysis of voltage-to-current converters (V-I converters or transconductors) and a novel V- I converter circuit with significantly improved linearity. The new circuit utilizes a combination of cross-coupling and local resistive feedback for a significant, simultaneous suppression of the third- and fifth-order harmonic distortion components in the transconductor characteristics. An evaluation of the optimal circuit dimensioning is shown. Simple and robust design rules are derived for the chosen operation conditions. The transistor implementation is presented and a prototype V- I converter is realized in a digital 0.18-/spl mu/m CMOS technology. The measured spurious-free dynamic range is 75 dB in a frequency band of 10 MHz. The circuit occupies less than 0.02 mm/sup 2/ and dissipates 360 /spl mu/W.     

A Linear CMOS Voltage-to-Current Converter

An improved complementary metal oxide semiconductor (CMOS) voltage-to-current converter is presented. PMOS transistors are employed in the resistor-replacement and voltage-level shifting of the proposed converter to avoid the body effect. To accurately annihilate the nonlinear voltage terms, a better modeling of the drain-to-source current of the MOS transistor operating in the linear region is essential and is adopted. Specifically, the substrate-bias effect of the MOS transistor is treated more accurately in our design. Consequently, the nonlinearity of the large-signal transconductance of the converter is reduced. The voltage-to-current converter is designed and fabricated in a 0.35 μm CMOS technology. The fabricated circuit occupies an area of 267 μm × 197 μm (≈0.053 mm²) and dissipates 3.92 mW from a 3.3 V supply. The measured and simulated data are in good agreement. For a 1 V_P-P input voltage, the measured total harmonic distortion (THD) of the output current is less than 1.2%.     

A temperature-stable CMOS variable-gain amplifier with 80-dBlinearly controlled gain range

A CMOS variable-gain amplifier (VGA) using subthreshold exponential region transistors with master-slave control technique is proposed. The proposed technique is applied to an intermediate-frequency VGA with a quadrature demodulator for wireless receivers. The test chip is fabricated using a 0.25-μm CMOS technology. An 80-dB linearly controlled gain range is achieved with exponential voltage-to-current converters using MOS transistors biased in a subthreshold exponential region, and the master-slave control circuits make the gain-control characteristic insensitive to the temperature. The experimental results indicate that the proposed technique is effective for a CMOS variable-gain amplifier     

Design and evaluation of current-mode image sensors in CMOS-technology

Three different current-mode-output CMOS image sensor structures comprising of a pixel cell and an appropriate readout circuit have been analyzed and compared with regard to their noise behavior, fixed-pattern noise (FPN), and the dynamic range. First, a standard integrating pixel cell with a readout circuit containing a voltage-to-current converter is proposed. Second, a pixel cell based on a switched current cell is analyzed. The third sensor cell uses a feedback loop to control the reverse bias voltage of the photodiode to reduce the settling time of the pixel cell and the influence of the photodiodes's dark current. The necessary amplifier is partly located in the pixel cell and partly in the readout circuit. In all sensors, correlated double sampling is used to suppress the FPN.     

Novel high performance CMOS current conveyor

In this paper a new CMOS second generation current conveyor based on a novel voltage follower architecture is presented. Both class-A and class-AB topologies are proposed. Results from 0.8 μm designs supplied at 3.3 V show very low resistance at node X (<50 Ω), high frequency operation (100 MHz), high precision in the voltage and current transference and reduced offset. As basic application examples, a voltage-to-current converter and a current feedback operational amplifier have been considered.     

A Beta basis function neural network in CMOS subthreshold mode

Beta basis function neural networks (BBFNNs) are powerful systems for learning and universal approximation. In this paper, we present a hardware implementation of the Beta neuron using the CMOS subthreshold mode. We describe the low power–low voltage analogue Beta neuron circuit. Three main modules are used to realize the electronic Beta function: a logarithmic currentto-voltage converter, a multiplier and an exponential voltage-to-current converter. Simulation results show the validity of our neural hardware implementation. The parameters of the electronic Beta function are controlled independently by current sources. This analogue implementation could be used easily to realize analogue BBFNNs.     

A large-signal very low-distortion transconductor forhigh-frequency continuous-time filters

A high-frequency large-signal very low-distortion voltage-to-current transducer is presented. The total harmonic distortion (THD), for supply voltages of only ±2.5 V, is smaller than 0.1% for fully differential input signals up to 2.4 V peak to peak (V_pp). The dynamic range is on the order of 89 dB with the transconductor noise integrated over a bandwidth of 1 MHz. Moreover, this structure presents low sensitivity to transistor mismatches. An operational transconductance amplifier (OTA), based on this transconductor, has been used in an adjustable quality factor 1.8-MHz biquadratic continuous-time filter. The quality factor Q is controlled, from 2 to 50, with a novel current-source configuration. Both the OTA and the filter have been fabricated in a CMOS 3-μm n-well process     

A programmable piecewise linear large-signal CMOS amplifier

A high-speed CMOS piecewise linear approximation circuit is presented that can be programmed for correction of nonlinearity after fabrication. The basic building block generates a linear segment, for which slope and position can be adjusted. Adjustments to adapt to arbitrary functions are done with floating gate devices fabricated in standard CMOS technology. The circuit is a voltage-to-current converter with an input range of the full power-supply voltage swing. In an implementation with 18 linear segments less than 0.15% error over rail-to-rail input range was achieved for a linear transfer function. Examples of strongly nonlinear transfer functions approximated to 0.5% accuracy are shown. The large-signal 3-dB frequency is 10 MHz. The implementations are done solely with 2-μm channel length devices     

Highly linear wide input range CMOS OTA architectures operating in subthreshold and strong inversion

A very low distortion low-voltage CMOS OTA with very wide g_m adjustment and input range is presented. It is based on a fixed gain novel highly linear voltage-to-current conversion input stage and uses electronically programmable current mirrors to achieve very wide transconductance gain adjustment range. The OTA input range remains approximately constant with g_m adjustment. Bandwidth and input signal range can be adjusted independent of g_m. Simulations results in 0.5 μm CMOS technology with ±1 V supplies and 1 V input range are presented which confirm the characteristics of the proposed structure.     

Design of integrated analog CMOS circuits-a multichannel telemetry transmitter [single-stage differential amplifier]

A single-stage differential amplifier, implemented in a standard metal-gate process, serves as a basis for consideration of specific characteristics of analog CMOS circuits. The dependence of important circuit parameters like open-loop gain and gain-bandwidth product on transistor geometries, and biasing current are derived. Furthermore, it is shown how to improve the amplifier characteristics by optimizing the layout. The differential amplifier stage is compared with an equivalent one based on a standard bipolar process. This comparison shows that the CMOS stage exceeds in the low-current region (nanoamperes) not only the possible voltage gain but also the gain-bandwidth product of a bipolar stage. The results are applied to the design of a multichannel telemetry transmitter for patient monitoring. The transmitter chip incorporates a digital part for the multiplex control and a precise analog part for the modulation unit. The modulator is a voltage controlled oscillator and consists of two parts: a voltage-to-current converter and a current controlled oscillator. The linear range of the voltage-to-current converter is limited to at most three decades due to the offset of MOS transistors. The current controlled oscillator, however, has a linear range of more than seven decades. This was made possible by applying a new design principle, which is specific for CMOS technology. Besides the large linear range the multivibrator has excellent temperature stability. The chip area is 4 mm/SUP 2/.     

All-MOS voltage-to-current converter

A new resistorless voltage-to-current converter utilizing only MOS transistors to achieve voltage-to-current conversion with less than ±0.5% nonlinearity is described. The circuit uses MOS transistors in linear and saturation regions to produce an output current linearly related to the input voltage. The output current is proportional to the carrier mobility tracking the process variations. This circuit is suitable for submicron technologies where the availability of a linear resistor with moderate sheet resistance is not guaranteed. The circuit is fabricated using 0.6-μm n-well CMOS technology, consumes less than 200 μA, and occupies 200 mm² of area     

A low-power stereo 16-bit CMOS D/A converter for digital audio

A low-power 16-bit CMOS D/A (digital/analog) converter for portable digital audio is described. The converter is based on current division. To guarantee monotonicity and a good small-signal reproduction, a dynamic segmentation technique is used. A geometric averaging technique is used to minimize the harmonic distortion of the converter at high signal levels. The dynamic range is 95 dB. The circuit operates in a time-multiplex mode at a sample frequency of 44 kHz in a power supply range of 2.5-5 V and has a power consumption of 15 mW. A 2-μm CMOS technology is used and the active chip area is 5 mm²      

A floating gate CMOS signal conditioning circuit for nonlinearity correction

A high-speed signal conditioning circuit is presented that can be programmed for correction of nonlinearity in a sensor signal processing system. The function of the circuit is based on piecewise linear principles. Post-fabrication programming to adapt to existing nonidealities is done with floating gate devices fabricated in standard technology. Modeling of the sensor nonideality is not required. The circuit is a voltage-to-current converter with an input range of the full power-supply voltage swing. In a 12-module implementation in 2-µm CMOS technology less than 0.5% error over rail-to-rail input range and a speed of 10 MHz were achieved. The circuit is useful where a signal from a sensor with nonlinearity and high variation in its parameters has to be conditioned for further processing.1. The MOSIS Project, USC/ISI, 4676 Admiralty Way, Marina del Rey, CA 90292-6695.This work is supported by an NSF-Research Initiation Award, Grant MIP-90 11360, and by Analog Devices Inc.     

Compact power-efficient class-AB CMOS exponential voltage to voltage converter

A novel implementation of a rail-to-rail exponential voltage to voltage converter is presented. It is based on a pseudo-exponential approximation that is easily achieved by the nonlinear currents of a class-AB transconductor. Measurement results for a 0.5 /spl mu/m CMOS technology show a 52 dB output voltage range with linearity error less than /spl plusmn/2 dB using a dual supply voltage of /spl plusmn/750 mV. The power dissipation is less than 40 /spl mu/W.     

4-Bit Parallel-Input Exponential Digital-to-Analog Converter in CMOS 0.18 μm Technology

In this paper, a new digitally controlled linear-in-dB CMOS variable gain amplifier is proposed. The circuit employs the proposed novel approach in achieving a wide-range true-exponential transfer function e ^2X using a traditional pseudo-exponential amplifier followed by a variable gain stage, to expand the output dynamic range. A single digitally controlled variable resistor is used to tune the circuit accordingly by controlling X with a digital word. The result is a digitally controlled data conversion that yields a new type of non-linear digital-to-analog converter. Finally, a 4-bit converter is implemented in a TSMC 0.18 μm CMOS technology and displays a gain from about −21 dB to 36 dB in steps of 3.89 dB with an output linear error in [−0.66,0.45] dB and a static power consumption of 2.34 mW.     

A monolithic analog exponential converter

The design of a monolithic analog exponential voltage-to-current converter based on the characteristic of bipolar transistors is described. The accurate transfer function (less than 1 percent deviation over 4 decades of current) and the low temperature dependency (less than 1.5/spl times/10/SUP -3/ per K) have been achieved by an accurate balancing and compensation technique.     

Multimode $G_{m}$– $C$ Channel Selection Filter for Mobile Applications in 1-V Supply Voltage

A CMOS transconductor for multimode channel selection filter is presented. The transconductor includes a voltage-to-current converter and a current multiplier. Voltage-to-current conversion employs linear region MOS transistors, and the conversion features high linearity over a wide input swing range. The current multiplier which operates in the weak inversion region provides a wide transconductance tuning range without degrading the linearity. A third-order Butterworth low-pass filter implemented with the transconductors was designed by TSMC 0.18 mum CMOS process. The measurement results show that the filter can operate with the cutoff frequency of 135 kHz to 2.2 MHz. The tuning range and the linearity performance would be suitable for the wireless specifications of GSM, Bluetooth, cdma2000, and wide-band CDMA. In the design, the maximum power consumption at the highest cutoff frequency is 2 mW under a 1-V supply voltage.