High thermal annealing effect on structural and optical properties of ZnO–SiO2 nanocomposite

The effect of annealing temperature on photoluminescence (PL) of ZnO–SiO₂ nanocomposite was investigated. The ZnO–SiO₂ nanocomposite was annealed at different temperatures from 600 °C to 1000 °C with a step of 100 °C. High Resolution Transmission Electron Microscope (HR-TEM) pictures showed ZnO nanoparticles of 5 nm are capped with amorphous SiO₂ matrix. Field Emission Scanning Electron Microscope (FE-SEM) pictures showed that samples exhibit spherical morphology up to 800 °C and dumbbell morphology above 800 °C. The absorption spectrum of ZnO–SiO₂ nanocomposite suffers a blue-shift from 369 nm to 365 nm with increase of temperature from 800 °C to 1000 °C. The PL spectrum of ZnO–SiO₂ nanocomposite exhibited an UV emission positioned at 396 nm. The UV emission intensity increased as the temperature increased from 600 °C to 700 °C and then decreased for samples annealed at and above 800^°C. The XRD results showed that formation of willemite phase starts at 800 °C and pure willemite phase formed at 1000 °C. The decrease of the intensity of 396 nm emission peak at 900 °C and 1000 °C is due to the collapse of the ZnO hexagonal structure. This is due to the dominant diffusion of Zn into SiO₂ at these temperatures. At 1000 °C, an emission peak at 388 nm is observed in addition to UV emission of ZnO at 396 nm and is believed to be originated from the willemite.     

Effects of annealing treatment on the high temperature performance of 4H-SiC metal-semiconductor-metal ultraviolet photodiodes

The high temperature performance plays a crucial role in the high-temperature harsh environment detection. In this paper, the electrical and optical characteristics of 4H-SiC metal-semiconductor-metal (MSM) ultraviolet photodiodes (PDs) were investigated at high temperatures. The C-V measurement indicates that the 4H-SiC Schottky barrier diode is partially depleted at 40 V bias. Analysis of I-V data based on the thermionic emission theory demonstrates that the annealing treatment at 400 °C can effectively improve the homogeneity of Ni/4H-SiC Schottky barrier height. Experimental results confirm that the annealing treatment is beneficial not only to reduce the dark current and improve the photoresponse, but also to enhance the sensitivity for 4H-SiC MSM PDs. The sensitivity of 400 °C annealed MSM PDs (6.2 × 10³) is five times larger than that of as-deposited MSM PDs (1.3 × 10³) at 200 °C.     

Structural and electrical characterization of CoNiO monolayer as copper diffusion barrier in integrated circuits

Diffusion barrier properties of CoNiO monolayer, deposited by Langmuir Blodgett (LB) technique, were studied against the diffusion of copper through SiO₂. Cu/CoNiO/SiO₂/Si and Cu/SiO₂/Si test structures were prepared and compared for this purpose. These test structures were annealed at temperatures starting from 100 °C up to 650 °C in vacuum. Samples were characterized using Energy Dispersive X-ray Spectroscopy (EDS), Atomic force microscopy (AFM), X-ray diffraction (XRD), scanning electron microscope (SEM), four probe resistivity measurement, Capacitance-Voltage (C‒V), Current-Voltage (I‒V) characterization techniques. EDS and AFM confirmed the composition and structure of the deposited monolayer. Thermal stability was studied using X-ray diffraction (XRD), Scanning Electron Microscope (SEM) and four probe techniques. Results indicated that structure with barrier was stable up to 600 °C whereas its counterpart could sustain only up to 300 °C. Sheet resistance of Cu/SiO₂/Si structure starts increasing at 300 °C and that of Cu/CoNiO/SiO₂/Si test structure was almost unchanged up to 600 °C in. SEM analysis of samples annealed at different temperatures also confirmed the XRD and four probe results. Biased Thermal Stress (BTS) was applied to the samples and its effect was observed using C‒V analysis. C‒V curves showed that in the presence of CoNiO barrier layer there was no shift in the C‒V curve even after 120 min of BTS while in the absence of barrier there was a significant shift in the C‒V curve even after 30 min of BTS. Leakage current density (j_L) was plotted against the BTS duration under same BTS conditions. It was found that the Cu/CoNiO/SiO₂/Si stack could survive about two times more than the Cu/SiO₂/Si stack.     

Structural and optoelectronic properties of nanostructured TiO2 thin films with annealing

About 480 nm thick titanium oxide (TiO₂) thin films have been deposited by electron beam evaporation followed by annealing in air at 300–600 °C with a step of 100 °C for a period of 2 h. Optical, electrical and structural properties are studied as a function of annealing temperature. All the films are crystalline (having tetragonal anatase structure) with small amount of amorphous phase. Crystallinity of the films improves with annealing at elevated temperatures. XRD and FESEM results suggest that the films are composed of nanoparticles of 25–35 nm. Raman analysis and optical measurements suggest quantum confinement effects since Raman peaks of the as-deposited films are blue-shifted as compared to those for bulk TiO₂ Optical band gap energy of the as-deposited TiO₂ film is 3.24 eV, which decreases to about 3.09 eV after annealing at 600 °C. Refractive index of the as-deposited TiO₂ film is 2.26, which increases to about 2.32 after annealing at 600 °C. However the films annealed at 500 °C present peculiar behavior as their band gap increases to the highest value of 3.27 eV whereas refractive index, RMS roughness and dc-resistance illustrate a drop as compared to all other films. Illumination to sunlight decreases the dc-resistance of the as-deposited and annealed films as compared to dark measurements possibly due to charge carrier enhancement by photon absorption.     

Ultra-low-energy ion-beam-synthesis of Ge nanocrystals in thin ALD Al2O3 layers for memory applications

Structural and electrical properties of ALD-grown 5 and 7 nm-thick Al₂O₃ layers before and after implantation of Ge ions (1 keV, 0.5–1 × 10¹⁶ cm^?2) and thermal annealing at temperatures in the 700–1050 °C range are reported. Transmission Electron Microscopy reveals the development of a 1 nm-thick SiO₂-rich layer at the Al₂O₃/Si substrate interface as well as the formation of Ge nanocrystals with a mean diameter of ～5 nm inside the implanted Al₂O₃ layers after annealing at 800 °C for 20 min. Electrical measurements performed on metal–insulator–semiconductor capacitors using Ge-implanted and annealed Al₂O₃ layers reveal charge storage at low-electric fields mainly due to location of the Ge nanocrystals at a tunnelling distance from the substrate and their spatial dispersion inside the Al₂O₃ layers.     

Structural,magnetic and electrical properties of Fe/Si system

Interface studies in metal/semiconductor systems are important due to their potential technological application in microelectronics. A total of 80 nm Fe film was deposited on Si(1 1 1) substrate using electron beam evaporation technique at a vacuum of 2×10⁻⁷ Torr. The samples were annealed at temperatures 500 and 600 °C for 1 h in 3×10⁻⁵ Torr for the formation of silicide phases. GIXRD results show a stable disilicides FeSi₂ formation at the interface at annealing temperature 600 °C. The coercivity determined from MOKE hysteresis curves for as-deposited and annealed samples are 14.91, 29.82 and 31.01 Oe. The Schottky barrier height, as estimated by the current–voltage measurement is 0.59, 0.54 and 0.49 eV for pristine and annealed samples at 500 and 600 °C, respectively, and concludes that the barrier height values as a function of the heat of formation of the silicides.     

Direct bonding of Si wafer pairs with SiO2 and Si3N4 films with a fast linear annealing

2000 Å-SiO₂/Si(1 0 0) and 560 Å-Si₃N₄/Si(1 0 0) wafers, that are 10 cm in diameter, were directly bonded using a rapid thermal annealing method, so-called fast linear annealing (FLA), in which two wafers scanned with a high-power halogen lamp. It was demonstrated that at lamp power of 550 W, corresponding to the surface temperature of ∼450°C, the measured bonded area was close to 100%. At the same lamp power, the bond strength of the SiO₂∥Si₃N₄ wafer pair reached 2500 mJ/m², which was attained only above 1000°C with conventional furnace annealing for 2 h. The results clearly show that the FLA method is far superior in producing high-quality directly bonded Si wafer pairs with SiO₂ and Si₃N₄ films (Si/SiO₂∥Si₃N₄/Si) compared to the conventional method.     

Thermal desorption of Ge native oxides and loss of Ge from the surface

The authors have identified oxidation and desorption processes of Ge native oxide by chemical bonding states measured by X-ray photoemission spectroscopy. Ge oxidation occurs at the temperatures of 450–500 °C in an oxidizing ambient. Ge desorption in nitrogen ambient is observed at the temperatures of 500–550 °C, which is higher than the oxidation temperature by 50 °C. Combined oxidation and desorption processes proceed subsequently and cause a loss of Ge from the surface when Ge is annealed in oxidizing ambient at a temperature higher than desorption temperature. The surface loss is avoided when Ge is annealed with SiO₂ cap layer in an identical annealing condition.     

Characterization of interfacial reaction and chemical bonding features of LaOx/HfO2 stack structure formed on thermally-grown SiO2/Si(1 0 0)

A stack structure consisting of ～1.5 nm-thick LaO_x and ～4.0 nm-thick HfO₂ was formed on thermally grown SiO₂ on Si(1 0 0) by MOCVD using dipivaloymethanato precursors, and the influence of N₂ annealing on interfacial reaction for this stack structure was examined by using X-ray photoelectron spectroscopy and Fourier transform infrared attenuated total reflection. We found that compositional mixing between LaO_x and HfO₂ becomes significant from 600 °C upwards and that interfacial reaction between HfLa_yO_z and SiO₂ proceeds consistently at 1000 °C in N₂ ambience.     

Enhancement in electrical performance of indium gallium zinc oxide-based thin film transistors by low temperature thermal annealing

We have studied the characteristics of transparent bottom-gate thin film transistors (TFTs) using In–Ga–Zn–O (IGZO) as an active channel material. IGZO films were deposited on SiO₂/Si substrates by DC sputtering techniques. Thereafter, the bottom-gate TFT devices were fabricated by depositing Ti/Au metal pads on IGZO films, where the channel length and width were defined to be 200 and 1000 μm, respectively. Post-metallization thermal annealing of the devices was carried out at 260, 280 and 300 °C in nitrogen ambient for 1 h. The devices annealed at 280 °C have shown better characteristics with enhanced field-effect mobility and high on–off current ratio. The compositional variation of IGZO films was also observed with different annealing temperatures.     

Design,development and reliability testing of a low power bridge-type micromachined hotplate

In this paper, the development and reliability of a platinum-based microheater with low power consumption are demonstrated. The microheater is fabricated on a thin SiO₂ bridge-type suspended membrane supported by four arms. The structure consists of a 0.6 μm-thick SiO₂ membrane of size 50 μm × 50 μm over which a platinum resistor is laid out. The simulation of the structure was carried out using MEMS-CAD Tool COVENTORWARE. The platinum resistor of 31.0 Ω is fabricated on SiO₂ membrane using lift-off technique. The bulk micromachining technique is used to create the suspended SiO₂ membrane. The temperature coefficient of resistance (TCR) of platinum used for temperature estimation of the hotplate is measured and found to be 2.2 × 10⁻³/°C. The test results indicate that the microhotplate consumes only 11.8 mW when heated up to 400 °C. For reliability testing, the hotplate is continuously operated at higher temperatures. It was found that at 404 °C, 508 °C and 595 °C, the microhotplate continuously operated up to 16.5 h, 4.3 h and 4 min respectively without degrading its performance. It can sustain at least 53 cycles pulse-mode of operation at 540 °C with ultra-low resistance and temperature drifts. The structure has maximum current capability of 19.06 mA and it can also sustain the ultrasonic vibration at least for 30 min without any damage.     

Mechanism of mobility enhancement in Ge p-channel metal-oxide-semiconductor field-effect transistor due to introduction of Al atoms into SiO2/GeO2 gate stack

In this paper, we present comprehensive results on Al-postmetallization annealing (Al-PMA) effect for the SiO₂/GeO₂ gate stack on a Ge substrate, which were fabricated by a physical vapor deposition method. The effective oxide thickness of metal-oxide-semiconductor (MOS) capacitor (CAP) was ~7 nm, and the Al-PMA was performed at a temperature in the range of 300–400 °C. The flat band voltage (V_FB), the hysteresis (HT), the interfacial states density (D_it), and the border traps density (D_bt) for MOSCAPs were characterized by a capacitance–voltage method and a constant-temperature deep-level transient spectroscopy method. The MOSCAP without Al-PMA had an electrical dipole of ~−0.8 eV at a SiO₂/GeO₂ interface, which was disappeared after Al-PMA at 300 °C. The HT, D_it, and D_bt were decreased after Al-PMA at 300 °C and were maintained in the temperature range of 300–400 °C. On the other hand, the V_FB was monotonically shifted in the positive direction with an increase in PMA temperature, suggesting the generation of negatively charged atoms. Structural analyses for MOSCAPs without and with Al-PMA were performed by a time-of-flight secondary ion mass spectroscopy method and an X-ray photoelectron spectroscopy method. It was confirmed that Al atoms diffused from an Al electrode to a SiO₂ film and reacted with GeO₂. The dipole disappearance after Al-PMA at 300 °C is likely to be associated with the structural change at the SiO₂/GeO₂ interface. We also present the device performances of Al-gated p-channel MOS field-effect transistors (FET) with PMA treatments, which were fabricated using PtGe/Ge contacts as source/drain. The peak field-effect mobility (μ_h) of the p-MOSFET was reached a value of 468 cm²/Vs after Al-PMA at 325 °C. The μ_h enhancement was explained by a decrease in the total charge densities at/near the GeO₂/Ge interface.     

Effects of thermal annealing on the morphology of the AlxGa(1−x)N films

Effects of thermal annealing on the morphology of the Al_xGa_(1−x)N films with two different high Al-contents (x=0.43 and 0.52) have been investigated by atomic force microscopy (AFM). The annealing treatments were performed in a nitrogen (N₂) gas ambient as short-time (4 min) and long-time (30 min). Firstly, the films were annealed as short-time in the range of 800–950 °C in steps of 50–100 °C. The surface root-mean-square (rms) roughness of the films reduced with increasing temperature at short-time annealing (up to 900 °C), while their surface morphologies were not changed. At the same time, the degradation appeared on the surface of the film with lower Al-content after 950 °C. Secondly, the Al_0.43Ga_0.57N film was annealed as long-time in the range of 1000–1200 °C in steps of 50 °C. The surface morphology and rms roughness of the film with increasing temperature up to 1150 °C did not significantly change. Above those temperatures, the surface morphology changed from step-flow to grain-like and the rms roughness significantly increased.     

Influences of annealing temperature on structural,magnetic and optical properties of Zn0.98V0.02O nanoparticles

The Zn_0.98V_0.02O nanoparticles were synthesized by the sol–gel method. The relationship between the annealing temperature (600 °C, 700 °C and 800 °C) and the structural, magnetic and optical properties of the obtained samples was studied. The results showed that Zn ions were partially substituted by V ions. The V doped ZnO nanoparticles annealed at 600 °C and 700 °C were single phase wurtize ZnO structure and they were ferromagnetic at room temperature. On the contrary, the sample annealed at 800 °C had a secondary phase of Zn₃V₃O₈. Therefore it was not saturated even in the field of 10,000 Oe due to the coexistence of ferromagnetic and paramagnetic materials. Photoluminescence results indicated that defects probably were the origin of ferromagnetism in V doped ZnO.     

Defect modification in ZnInSnO transistor with solution-processed Al2O3 dielectric by annealing

The properties of solution-processed Al₂O₃ thin films annealed at different temperatures were thoroughly studied through thermogravimetry–differential thermal analysis, UV–vis-NIR spectrophotometer measurements, scanning electron microscopy, X-ray diffraction, atomic force microscopy and a series of electrical measurements. The solution-processed ZnInSnO thin films transistors (TFTs) with the prepared Al₂O₃ dielectric were annealed at different temperatures. The TFTs annealed at 600 °C have displayed excellent electrical performance such as the field-effect mobility of 116.9 cm² V⁻¹ s⁻¹ and a subthreshold slope of 93.3 mV/dec. The performance of TFT device could be controlled by adjusting the annealing temperature. The results of two-dimensional device simulations demonstrate that the improvement of device performance are closely related with the reduction of interface defects between channel and dielectric and subgap density of stats (DOS) in the channel layer.     

Effect of annealing on structural,optical and electrical properties of pulse electrodeposited tin sulfide films

Polycrystalline tin sulfide (SnS) thin films were grown on conducting glass substrates by pulse electrodeposition. The effect of annealing on the physical properties such as structure, morphology, optical, and opto-electronic properties were evaluated to understand the effect of post-deposition treatment for SnS films. Annealing at temperatures higher than 250 °°C resulted in the formation of SnS₂ as a second phase, however, no significant grain growth or morphological changes were observed for films after annealing at 350 °C. A small change in band gap of 0.1 eV observed for films annealed at 350 °C was interpreted as due to the formation of SnS₂ rather than due to morphological changes. This interpretation was supported by X-ray diffractometry, scanning electron microscopy, and Raman spectral data. The electric conduction in the films is controlled by three shallow trap levels with activation energies 0.1, 0.05, and 0.03 eV. The trap with energy 0.03 eV disappeared after annealing at higher temperature, however, the other two traps were unaffected by annealing.     

Optical and electrical properties of nickel oxide thin films synthesized by sol–gel spin coating

Nickel oxide thin films were prepared by the sol–gel technique combined with spin coating onto glass substrates. The as-deposited films were pre-heated at 275 °C for 15 min and then annealed in air at different temperatures. The effects of the annealing temperature on the structural and optical properties of the films are studied. The results show that 600 °C is the optimum annealing temperature for preparation of NiO films with p-type conductivity and high optical transparency. Then, by using these optimized deposition parameters, NiO thin films of various thicknesses were deposited at the same experimental conditions and annealed under different atmospheres. Surface morphology of the films was investigated by atomic force microscopy. The surface morphology of the films varies with the annealing atmosphere. Optical transmission was studied by UV–vis spectrophotometer. The transmittance of films decreased as the thickness of films increased. The electrical resistivity, obtained by four-point probe measurements, was improved when NiO layers were annealed in N₂ atmosphere at 600 °C.     

Thermal oxidation of tin layers and study of the effect of their annealings on their structural and electrical properties

The main objective of this article is the control of tin dioxide preparation process on glass substrate. Layers of pure tin with thicknesses of 500 and 1000 Å are first deposited. Their enrichment with oxygen is ensured by thermal annealing for 1 and 2 h in a continuous tube furnace with temperatures varying between 300 and 500 °C.The tin film formed by vacuum evaporation has tetragonal crystalline structure, and is composed of grains of various sizes separated by grain boundaries. After annealing in oxygen, the formed phases consist of a mixture of SnO and SnO₂ crystalline mixtures and sometimes amorphous tin oxide. The more the time or the temperature of annealing, the more the quantity of SnO₂ and SnO. For an annealing at 500 °C for 10 h the size of grains increases more than annealing for 2 h. This is confirmed by the study of their micrographs.The electrical resistivity of these layers, measured by the 4 point method, is correlated to the size of the oxide particles: the smaller the particle size, the lower the electrical resistivity.     

High dielectric constant TiO2 film grown on polysilicon by liquid phase deposition

In this study, titanium dioxide (TiO₂) films were grown on polycrystalline silicon by liquid phase deposition (LPD) with ammonium hexafluoro-titanate and boric acid as sources. The film structure is amorphous as examined by X-ray diffraction (XRD). A uniform composition of LPD-TiO₂ was observed by SIMS examination. The leakage current density of an Al/LPD-TiO₂/poly-Si/p-type Si metal–oxide–semiconductor (MOS) structure is 1.9 A/cm² at the negative electric field of 0.7 MV/cm. The dielectric constant is 29.5 after O₂ annealing at 450 °C. The leakage current densities can be improved effectively with a thermal oxidized SiO₂ added at the interface of LPD-TiO₂/poly-Si. The leakage current density can reach 3.1×10⁻⁴ A/cm² at the negative electric field of 0.7 MV/cm and the dielectric constant is 9.8.     

Substrate temperature effect on structural,optical and electrical properties of vacuum evaporated SnO2 thin films

Tin oxide (SnO₂) thin films were deposited on glass substrates by thermal evaporation at different substrate temperatures. Increasing substrate temperature (T_s) from 250 to 450 °C reduced resistivity of SnO₂ thin films from 18×10⁻⁴ to 4×10⁻⁴▒ Ω ▒cm. Further increase of temperature up to 550 °C had no effect on the resistivity. For films prepared at 450 °C, high transparency (91.5%) over the visible wavelength region of spectrum was obtained. Refractive index and porosity of the layers were also calculated. A direct band gap at different substrate temperatures is in the range of 3.55−3.77 eV. X-ray diffraction (XRD) results suggested that all films were amorphous in structure at lower substrate temperatures, while crystalline SnO₂ films were obtained at higher temperatures. Scanning electron microscopy images showed that the grain size and crystallinity of films depend on the substrate temperature. SnO₂ films prepared at 550 °C have a very smooth surface with an RMS roughness of 0.38 nm.