实时嵌入式容错系统的关键技术研究

简要回顾了容错技术的发展过程并分析了不同故障模型下系统的客错方式.对于瞬时故障、间歇性故障的容错可采用软件冗余方法,在实时嵌入式系统中采用软件容错时必须考虑任务的可调度性;而永久性故障则采用硬件冗余方法来解决.在此基础上,描述了一种实时双机嵌入式容错系统的模型,研究了构建容错系统需要解决的双机同步、故障检测及仲裁切换等关键问题和相应的解决方法.     

Intelligent cruise control applications: real-time embedded hybrid control software

This article presents the use of a model-based approach for the development of real-time, embedded, hybrid control software. The concepts are illustrated with a scenario involving speed-profile tracking and vehicle following applications for passenger vehicles. The model-based approach was developed in partnership between the University of California at Berkeley, Ford Research Labs, and GM. An ACC and CACC system has been tested in prototype phase, both at highway speeds and in stop-and-go situations. Robotic technologies, such as range, velocity, and acceleration measurements, and their processing and fusion were used as part of the system. In addition, vehicles can present very nonlinear behavior, especially at low speeds, and their control presents a formidable challenge. The problem domain of intelligent cruise-control applications has been described in detail, along with control and software development methodologies. We are currently working on applying the same model-based approach to the development of intelligent cruise-control systems for automated transit buses.     

Biologically inspired fault-tolerant architectures for real-time control applications

Real-time control applications involve the interaction of multiple components. As systems become more complex their reliability tends to decrease, hence, fault tolerance must be incorporated to keep reliability within specified levels. A novel reconfiguration mechanism inspired by mechanisms that take place during the embryonic development of living beings is proposed in this paper. It is illustrated using an example that the rapid low-level fault-recovery characteristic of the embryonic system makes it a promising approach for real-time control applications.     

Cooperative, hybrid agent architecture for real-time traffic signal control

This paper presents a new hybrid, synergistic approach in applying computational intelligence concepts to implement a cooperative, hierarchical, multiagent system for real-time traffic signal control of a complex traffic network. The large-scale traffic signal control problem is divided into various subproblems, and each subproblem is handled by an intelligent agent with a fuzzy neural decision-making module. The decisions made by lower-level agents are mediated by their respective higher-level agents. Through adopting a cooperative distributed problem solving approach, coordinated control by the agents is achieved. In order for the multiagent architecture to adapt itself continuously to the dynamically changing problem domain, a multistage online learning process for each agent is implemented involving reinforcement learning, learning rate and weight adjustment as well as dynamic update of fuzzy relations using an evolutionary algorithm. The test bed used for this research is a section of the Central Business District of Singapore. The performance of the proposed multiagent architecture is evaluated against the set of signal plans used by the current real-time adaptive traffic control system. The multiagent architecture produces significant improvements in the conditions of the traffic network, reducing the total mean delay by 40% and total vehicle stoppage time by 50%.     

A hardware supported operating system kernel for embedded hard real-time applications

The concept of the kernel, i.e. the time critical part of a real-time operating system, and its dedicated co-processor, especially tailored for embedded applications, are presented. The co-processor acts as a system controller and operates in conjunction with one or more conventional processors in hard real-time environments. It is composed of three physically and clearly separated layers which vary with regard to implementation, speed and complexity. Correspondingly, the model of the operating system kernel is hierarchically structured, and functions are mapped to these layers, observing the inherent parallelism of recognition and handling of different kinds of events expected in such environments and higher level kernel functions such as tasking operations. The operating system functions are supported by the high level real-time programming language constructs. Since many embedded systems are safety related, the software employed must be highly dependable. Therefore, the kernel was proven correct with formal methods, which represents a major innovation in software technology.     

FireFly: a cross-layer platform for real-time embedded wireless networks

We propose a cross-layer approach with tightly-coupled time synchronization for real-time support and predictable lifetime in battery-operated sensor networks. Our design spans a sensor hardware platform with hardware-based global time synchronization, a TDMA link layer protocol with collision-free multi-hop support and node scheduling algorithms for maximum concurrency and streaming. Our dual-radio sensor platform, FireFly, features an IEEE 802.15.4 transceiver and supports global time synchronization indoors by using an AM radio carrier-current method and an atomic clock receiver for outdoors. A TDMA-based link protocol, RT-Link, leverages the hardware for fixed and mobile nodes with a near-optimal and predictable node lifetime of over 2 years. It outperforms comparable sensor network link protocols such as B-MAC and S-MAC in terms of end-to-end latency and throughput and node lifetime across all duty cycle ratios. Operating over RT-Link is MAX, a scheduling framework which offers optimal transmission concurrency and bandwidth management for networks with regular structure. Through analysis and experiments we show that global time sync is a robust, economical and scalable alternative to in-band software-based techniques. To illustrate the capabilities and flexibility of our platform, we describe our experiences with two-way voice streaming over multiple hops. We have deployed a 42-node network with sub-100 μs synchronization accuracy in the NIOSH experimental coal mine for people-tracking and voice communication.

Robust feature extraction algorithm suitable for real-time embedded applications

Smart cameras integrate processing close to the image sensor, so they can deliver high-level information to a host computer or high-level decision process. One of the most common processing is the visual features extraction since many vision-based use-cases are based on such algorithm. Unfortunately, in most of cases, features detection algorithms are not robust or do not reach real-time processing. Based on these limitations, a feature detection algorithm that is robust enough to deliver robust features under any type of indoor/outdoor scenarios is proposed. This was achieved by applying a non-textured corner filter combined to a subpixel refinement. Furthermore, an FPGA architecture is proposed. This architecture allows compact system design, real-time processing for Full HD images (it can process up to 44 frames/91.238.400 pixels per second for Full HD images), and high efficiency for smart camera implementations (similar hardware resources than previous formulations without subpixel refinement and without non-textured corner filter). For accuracy/robustness, experimental results for several real-world scenes are encouraging and show the feasibility of our algorithmic approach.     

Human–computer cooperation platform for developing real-time robotic applications

The Journal of Supercomputing - This paper presents a human–computer cooperation platform, which permits the coordination between the user and the tool to improve the development of real-time...     

A unified link-layer fault-tolerant architecture for network-based many-core embedded systems

Reliability is an important design concern for modern many-core embedded systems. Specifically, on-chip interconnecting systems are vulnerable to permanent channel faults and transient data transmission faults which may significantly impact the overall system performance. In this work, a Unified Link-layer Fault-tolerant NoC (ULF-NoC) architecture is proposed. ULF-NoC is developed for NoC equipped with bidirectional channels and features wormhole switching (instead of store-and-forward switching) and packet-based retransmission. An intelligent buffer controller is developed that does not require separate, dedicated buffer spaces to support packet retransmissions. Extensive simulations using both synthetic and real world data traffics demonstrated marked performance of the proposed ULF-NoC solution.     

DICOS: a real-time distributed industrial control system for embedded applications

The Fault-tolerant Systems Research Group of the Technical University of Valencia has developed the distributed industrial control system (DICOS) system. This paper describes DICOS nodes. The architecture of DICOS nodes and the error detection mechanisms used are presented. These mechanisms are based on the internal capabilities of the 16-bit microcontroller used and control flow checking and deadlines control with the aid of a second 8-bit microcontroller. Experimental results about the effectiveness of those mechanisms are shown in this paper.     

A fast hybrid computer vision technique for real-time embedded bus passenger flow calculation through camera

Bus passenger flow calculation system is a critical part of the smart public transportation framework. Bus passenger flow information can help to make data statistics report of the passenger at a bus station which can be used by public transport operator to evaluate the quality of the transportation. Statistics report of crowded passengers in the bus station help managers to understand the bus transit operations, can provide the database for the intelligent transportation scheduling, help to provide more and better services for passengers, overall data statistics of passengers has important practical significance to improve public transport environment. This paper presents a passenger counting algorithm based on hybrid machine learning approach. In the first step, an advanced method is used to extract the Histogram of oriented gradients (HOG) feature of passenger’s heads. Classification of head features is done by using support vector machine (SVM) as a classifier for the liner model. Heads are detected successfully after performing all steps. In next step Kanade-Lucas-Tomasi (KLT) is used to reality head tracking, the multiple target tracking is achieved and the head motion trajectory of passenger target is captured stably. At last, the trajectory is analyzed and the automatic counting of bus passenger flow is realized. In the last step, the proposed algorithm is move to embedded system for practical implementation. In this paper, the algorithm intends to use ADSP-BF609 embedded platform for transplantation. The experimental results demonstrate that the statistical accuracy of the proposed algorithm is enhanced successfully; especially during the daytime with the good illustration, the effective counting of the passenger flow is achieved and the inward and outward passenger counting can be realized. In this paper three feature extraction models are used namely local binary patterns, histograms of oriented gradients and binarized statistical image in order to get accurate features. Furthermore, three common classification techniques including naïve bayes classifier, boosted tress and support vector machines are used for fine classification of extracted vectors obtained from different features extractors model. 94.50% accuracy is achieved when support vector machine (SVM) classifies the features extracted using Histogram of oriented gradients (HOG). SVM surpasses the accuracy obtained by Boosted tree namely 81.30% using Histogram of oriented gradients (HOG) features.

     

Schedulability-analyzable exception handling for fault-tolerant real-time languages

Exceptions add a significant element of robustness and fault-tolerance to an application. In real-time systems, however, we require not only semantic correctness, robustness, and fault-tolerance, but also timely behavior. For restricted languages, schedulability analysis can be made efficient through use of polynomial-time analyses and transformations. In this paper, we show how a reasonable level of exception handling can be added to such a language. Specifically, we present an exception mechanism which reasonably provides for (1) guaranteed schedulability, (2) fine granularity of exception handling, (3) possibility of non-termination of the process that raises the exception, (4) reuse of exception handlers within the program, (5) information hiding in exception handlers, (6) exceptions as first-class objects, (7) casting or binding of exceptions, and (8) deadline modification. Furthermore, the mechanism allows for easy specification of multi-mode operation, and permits program component assignment using expected behavior while enabling schedulability analysis of worst-case (often exceptional) behavior. While adding features to exception handler semantics can create new analysis problems while solving expressivity problems, we show that the exception handling features described above are desirable, that the complexity of static schedulability analysis in the presence of these features is manageable, and that existing language provides all these desirable features.Marlowe is visiting the Real-Time Computing Laboratory from the Department of Mathematics and Computer Science, Seton Hall University, South Orange, NJ 07079 USA.At the time of the paper, Masticola was with the Department of Computer Science, Rutgers University.     

A fault-tolerant real-time multiprocessor with a built-in recovery mechanism

The architecture of a fault-tolerant multiprocessor with a rollback recovery mechanism is described. Fault-tolerance is attained owing to restarts of faulty processes of computations or their definite parts after detecting failures. An error occurring during the interaction of some processes leads to the multistep reconstruction of the entire computational process. An estimate of the efficiency of the proposed fault-tolerant technology is given.Translated from Kibernetika i Sistemnyi Analiz, No. 5, pp. 169–176, September–October 2004.     

云环境下周期和非周期混合实时任务双容错调度算法

云环境中的处理机故障已成为云计算不可忽视的问题,容错成为设计和发展云计算系统的关键需求。针对一些容错调度算法在任务调度过程中调度效率低下以及任务类型单一的问题,提出一种处理机和任务主副版本分组的容错调度方法;并给出了副版本可重叠执行的判定方法,以及任务最坏响应时间的计算公式。通过实验和分析表明,和以前算法相比,将处理机分成两组分别执行任务主版本和任务副版本,减少了任务调度所需进行可调度测试的时间,增加了副版本重叠执行的机会,减少了所需的处理机个数,对提高系统处理机的利用率和容错调度的效率具有重要的意义。     

Scheduling for embedded real-time systems

The authors review several approaches to control-oriented and dataflow-oriented software scheduling to determine whether a given technique can satisfy deadlines, throughput, and other constraints for embedded real-time systems