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1.
A compact digitally-controlled single-stage variable gain amplifier (VGA) is introduced, which doubles the dB-linear range through the reconfiguration, saves power by 50% while maintaining the same linearity performance compared to those of the previous design. Implemented in 0.18 mum CMOS technology, the 5-bit digitally-controlled VGA achieves dB-linear gain range of 42 dB (-21 to 21 dB) with gain error less than plusmn0.55 dB, bandwidth of 84 MHz at maximum gain of 21 dB and maximum IIP3 of 14 dBm while consuming only 760 muA from a 1.8 V supply.  相似文献   

2.
3.
A CMOS variable gain low noise amplifier(LNA) is presented for 4.2-4.8 GHz ultra-wideband application in accordance with Chinese standard.The design method for the wideband input matching is presented and the low noise performance of the LNA is illustrated.A three-bit digital programmable gain control circuit is exploited to achieve variable gain.The design was implemented in 0.13-μm RF CMOS process,and the die occupies an area of 0.9 mm~2 with ESD pads.Totally the circuit draws 18 mA DC current from 1.2 V DC supply,the LNA exhibits minimum noise figure of 2.3 dB,S(1,1) less than -9 dB and S(2,2) less than -10 dB.The maximum and the minimum power gains are 28.5 dB and 16 dB respectively.The tuning step of the gain is about 4 dB with four steps in all.Also the input 1 dB compression point is -10 dBm and input third order intercept point(IIP3) is -2 dBm.  相似文献   

4.
本文介绍一种符合中国超宽带应用标准的工作频率范围为4.2-4.8 GHz的CMOS可变增益低噪声放大器(LNA)。文章主要描述了LNA宽带输入匹配的设计方法和低噪声性能的实现方式,提出一种3位可编程增益控制电路实现可变增益控制。该设计采用0.13-μm RF CMOS工艺流片,带有ESD引脚的芯片总面积为0.9平方毫米。使用1.2 V直流供电,芯片共消耗18 mA电流。测试结果表明,LNA最小噪声系数为2.3 dB,S(1,1)小于-9 dB,S(2,2)小于-10 dB。最大和最小功率增益分别为28.5 dB和16 dB,共设有4档可变增益,每档幅度为4 dB。同时,输入1 dB压缩点是-10 dBm,输入三阶交调为-2 dBm。  相似文献   

5.
A high frequency CMOS variable gain amplifier (VGA) employing a new gain stage cell is proposed. A design technique based on the proposed VGA enables enhancement of its operating frequency up to about 350 MHz with a gain control range of 84 dB. The power consumption of the VGA implemented using a 0.18 /spl mu/m CMOS standard process is about 3 mA at 1.8 V supply voltage.  相似文献   

6.
AlGaAsSb-InGaAsSb HPTs with high optical gain and wide dynamic range   总被引:2,自引:0,他引:2  
Novel heterojunction phototransistors based on AlGaAsSb-InGaAsSb material systems are fabricated and their characteristics are demonstrated. Responsivity of a phototransistor is measured with applied bias voltage at four different wavelengths. The maximum responsivity around 1400 A/W and minimum noise equivalent power of 1.83/spl times/10/sup -14/ W/Hz/sup 1/2/ from this phototransistor with bias of 4.0 V at a wavelength of 2.05 /spl mu/m were measured at 20/spl deg/C and -20/spl deg/C, respectively. Noise equivalent power of the phototransistor is considerably lower compared with commercially available InGaAs p-i-n photodiodes. Collector current measurements with applied incident power are performed for two phototransistors. Currents of 400 nA at low intensity of 0.425 /spl mu/W/cm/sup 2/ and of 30 mA at high intensity of 100 mW/cm/sup 2/ are determined. Collector current increases nearly by five orders of magnitude between these two input intensities. High and constant optical gain of 500 in the 0.46-nW to 40-/spl mu/W input power range is achieved, which demonstrates high dynamic range for such devices at these power levels.  相似文献   

7.
代应波  韩科锋  闫娜  谈熙 《半导体学报》2012,33(1):015005-7
摘要:本文给出了一个针对发射机载波泄露抑制的宽动态范围线性射频功率检测器的设计。该检测器基于对数放大器原理,并运用逐级检测的方法在射频频段实现宽动态范围。为提高灵敏度,检测器前端放置了一个低噪声放大器。而出于减小寄生和面积的目的,检测器采用直流耦合的架构,但这将导致电路中的直流失调对其动态范围形成危害。因此,本文提出一个直流失调消除技术用于消除检测器的直流失调。最终,检测器采用SMIC 0.13μm CMOS 工艺流片,测试结果表明其在900MHz/2GHz,分别实现了50dB/40dB的宽动态范围且检测误差在?1dB之内,功耗为16mA?1.5V。面积为0.27?0.67mm2。  相似文献   

8.
In some applications such as short-range radars, a large target can desensitize the receiver. A high dynamic range low-noise amplifier (LNA), as a key component of a transmitter/receiver module, can improve the entire system performance. This study presents a high dynamic range differential LNA that uses a differential quartet topology for the first time. The LNA shows more linearity than the conventional differential common source LNAs. For a typical 0.18 µm CMOS technology, it achieves a power gain of about 5.5 dB at 24 GHz, a low noise figure (NF) of 3.5 dB, very good linearity performance, an input-referred third-order intercept point (IIP3) of +?6.3 dBm, and an input-referred 1 dB compression point (P1dB) of ??4.5 dBm.  相似文献   

9.
傅开红 《电子器件》2010,33(2):178-181
设计了一种应用于超宽带系统中的可变增益宽带低噪声放大器。电路中采用了二阶巴特沃斯滤波器作为输入和输出匹配电路;采用了两级共源共栅结构实现电路的放大,并通过控制第二级的电流,实现了在宽频带范围内增益连续可调;采用了多栅管(MGTR),提高了电路的线性度;设计基于SMIC 0.18μm CMOS工艺。仿真结果显示,在频带3~5 GHz的范围内最高增益17 dB,增益波动小于1.8 dB,输入和输出端口反射系数分别小于-10 dB和-14 dB,噪声系数nf小于3.5 dB,当控制电压Vctrl=1.4 V时,IIP3约为2 dBm,电路功耗为16 mW。  相似文献   

10.
This work presents a low-noise amplifier (LNA) design with a wide-range gain control characteristic that integrates adjustable current distribution and output impedance techniques. For a given gain characteristic, the proposed LNA provides better wideband interference rejection performance than conventional LNA. Moreover, the proposed LNA also has a wider gain control range than conventional LNA. Therefore, it is suitable for satellite communications systems. The simulation results demonstrate that the voltage gain control range is between 14.5 and 34.2 dB for such applications (2600 MHz); the input reflection coefficient is less than ?18.9 dB; the noise figure (NF) is 1.25 dB; and the third-order intercept point (IIP3) is 4.52 dBm. The proposed LNA consumes 23.85–28.17 mW at a supply voltage of 1.8 V. It is implemented by using TSMC 0.18-um RF CMOS process technology.  相似文献   

11.
As the front-end preamplifiers in optical receivers, transimpedance amplifiers (TIAs) are commonly required to have a high gain and low input noise to amplify the weak and susceptible input signal. At the same time, the TIAs should possess a wide dynamic range (DR) to prevent the circuit from becoming saturated by high input currents. Based on the above, this paper presents a CMOS transimpedance amplifier with high gain and a wide DR for 2.5 Gbit/s communications. The TIA proposed consists of a three-stage cascade pull push inverter, an automatic gain control circuit, and a shunt transistor controlled by the resistive divider. The inductive-series peaking technique is used to further extend the bandwidth. The TIA proposed displays a maximum transimpedance gain of 88.3 dBΩ with the -3 dB bandwidth of 1.8 GHz, exhibits an input current dynamic range from 100 nA to 10 mA. The output voltage noise is less than 48.23 nV/√Hz within the -3 dB bandwidth. The circuit is fabricated using an SMIC 0.18 μm 1P6M RFCMOS process and dissipates a dc power of 9.4 mW with 1.8 V supply voltage.  相似文献   

12.
13.
A linearized variable gain amplifier (VGA) and a two-stage power amplifier (PA) MMIC were developed for 1.95-GHz wideband CDMA (W-CDMA) handsets application. A complete PA block with power control ability was obtained by cascading the VGA with the PA. The linearized VGA consists of a predistorter (PD) integrated with a conventional VGA, performing dual function for achieving high linearity power control, as well as reducing output distortion level of the following PA. With the use of predistortion, the Pout and power added efficiency (PAE) of the PA block improved from 27.5 dBm and 39.8% to 28.5 dBm and 44.8%, respectively, measured at -35 dBc adjacent channel leakage power ratio (ACPR). Under power control operation, the control range of the PA block increased from 23.6 dB to 31.2 db, and ACPR reduction of over 10 dB was achieved with the use of linearized VGA  相似文献   

14.
在分析各种超宽带(UWB)接收机系统结构的基础上,提出了一种低功耗IR-UWB接收机结构.该结构基于非相干通信机制,使用自混频技术和脉冲宽度调制方式(PPM).在该结构中,低噪声放大器(LNA)的低功耗优化是系统低功耗实现的关键.综合分析各种宽带LNA结构,提出了一种低功耗LNA设计.该LNA采用65 nmCMOS标准...  相似文献   

15.
本文提出了一种扩展LNA动态范围的方法——动态偏置,即根据接收信号的强弱动态地调节低噪声放大器(LNA)的偏置。文中从理论上阐述了此方法的有效性,并介绍了方法实现中所用到的三项关键技术,分别为:利用镜像电流源提供动态偏置电流,合理地设计匹配电路,利用自定义的优选函数选取恰当的偏置电流范围。实测结果表明,动态偏置LNA的噪声系数为1.46dB,输入三阶互调截止点(IIP3)为20.38dBm,无杂散动态范围达到99.29dB,相对于传统固定偏置的LNA,其动态范围提高了7.97dB,从而验证了动态偏置方法扩展LNA动态范围的有效性。  相似文献   

16.

This paper presents a CMOS low power Variable Gain Low Noise Amplifier for 26–34 GHz in 45 nm process technology, which composes of cascaded complimentary common gate (CCG) stage and digital current steering amplifier. First stage is CCG stage, which helps in achieving the low power consumption and less area. Second stage is variable gain amplifier, uses current reuse technique as well as gm-boost technique and has constant dc current to make the input impedance stable. Source degeneration technique cancel out MOS parasitic capacitance help in achieving linearity. Simulated maximum peak gain is 13.139 dB at 30.57 GHz and lowest peak gain is 7.75 dB at 26 GHz i.e. approximately flat over the entire band. Lowest NF is 3.08 dB at 32.6 GHz. Process corner simulation has been done for all four corners (S–S, S–F, F–S, F–F) showing robustness of LNA. Input return loss has value less than ? 9.58 dB while output return loss has less than ? 2.6 dB showing good matching; power consumption is 16 mW for dc current of 16 mA at 1 V. MOS active chip area is 76.727 µm2.

  相似文献   

17.
This letter describes a new phototransistor based on the static induction transistor (SIT) structure. A D/C optical gain and a gain-bandwidth product of a fundamental normally-on type static induction phototransistor (SIPT) are reported. The D/C optical gain G of more than 105has been obtained at 10-pw incident power levels (λ = 8800 Å), and the average gain-bandwidth product of approximately 108(Hz) has been measured at a few ten nanowatts of incident optical power level (λ = 6550 Å). The SIPT is characterized by a high sensitivity at low incident power, good linearity for a wide optical dynamic range, a high controllability of the gain, and a response time which is determined by the gate impedance.  相似文献   

18.
Edwards  C.R. 《Electronics letters》1971,7(25):747-749
Recently developed cellular-logic arithmetic units have been of the integral type producing, in general, results containing more significant `bits? than required. The proposed array enables two `floating-point? numbers to be multiplied together to give a result having a `floating-point? format with variable significance and exponent range.  相似文献   

19.
A CMOS distributed amplifier (DA) with low-power and flat and high power gain (S21) is presented. In order to decrease noise figure (NF) an RL terminating network used for the gate transmission line instead of single resistance. Besides, a flat and high S21 is achieved by using the proposed cascade gain cell consist of a cascode-stage with bandwidth extension capacitor. In the high-gain mode, under operation condition of V dd  = 1.2 V and the overall current consumption of 7.8 mA, simulation result shown that the DA consumed 9.4 mW and achieved a flat and high S21 of 20.5 ± 0.5 dB with an average NF of 6.5 dB over the 11 GHz band of interest, one of the best reported flat gain performances for a CMOS UWB DA. In the low-gain mode, the DA achieved average S21 of 15.5 ± 0.25 dB and an average NF of 6.6 dB with low power consumption (PDC) of 3.6 mW, the lowest PDC ever reported for a CMOS DA or LNA with an average gain better than 10 dB.  相似文献   

20.
The design and preliminary data of a novel microoptoelectromechanical systems variable optical attenuator (VOA) driven by a pair of V-beam electrothermal actuators is described. This VOA deploys a face-to-face arranged pair of 45/spl deg/ tilted mirrors in front of two coaxially aligned lensed fibers to form retro-reflection planar light path for attenuation. The initial insertion loss is 0.7 dB at 1550 nm and the maximum dynamic range of attenuation is 50 dB, respectively. The polarization-dependent loss is measured as 0.15 dB at 20-dB attenuation. The dynamic attenuation deviation is less than /spl plusmn/0.36 dB at 20-dB attenuation with respect to 20-G shock of periodical mechanical vibration at 1 K Hz, in which it complies with requirements of the Telcordia GR1221 regulations.  相似文献   

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