mr-NIL 6000LT – Epoxy-based curing resist for combined thermal and UV nanoimprint lithography below 50 °C

The aim of the work presented here was to develop curing polymers for nanoimprint lithography (NIL) enabling short cycle time, low imprint temperature, and an isothermal imprint process. The result is mr-NIL 6000LT: A photochemically curing polymer system for isothermal imprinting by combined thermal and UV nanoimprint lithography. It allows a lower imprint temperature than materials presented previously [C. Schuster, M. Kubenz, F. Reuther, M. Fink, G. Grützner, mr-NIL 6000 – New epoxy-based curing resist for efficient processing in combined thermal and UV nanoimprint lithography, in: Proceedings of SPIE 6517 2007, 65172B.; D.W. Johnson, H. Miller, M. Kubenz, F. Reuther, G. Grützner, Nanoimprinting with SU-8 Epoxy Resists, in: Proceedings of SPIE 6517 2007, 65172A.].The material system chosen is based on a blend of epoxy resins and a photo acid generator. Such epoxy resists cure during the imprint step in combined thermal and UV nanoimprint lithography. Initiated by UV exposure the cationic polymerisation occurs at elevated temperature forming a polymer pattern with significantly increased thermal stability compared to the uncured system.Apart from the material development leading to mr-NIL 6000LT the correlations between the parameters imprint temperature, exposure time and post exposure hold time are investigated in this work. With the applied resin combination a T_g of ?15 °C is obtained. This enables the formation of solid films at room temperature after spin-coating and prebake and nevertheless imprint temperatures in the range of 45–50 °C, which is a distinct decrease compared to the 100–110 °C needed for the previously introduced mr-NIL 6000 [C. Schuster, M. Kubenz, F. Reuther, M. Fink, G. Grützner, mr-NIL 6000 – New epoxy-based curing resist for efficient processing in combined thermal and UV nanoimprint lithography, in: Proceedings of SPIE 6517 2007, 65172B.] or the 65–70 °C necessary for defect-free imprinting of the epoxy-based polymer described in [D.W. Johnson, H. Miller, M. Kubenz, F. Reuther, G. Grützner, Nanoimprinting with SU-8 Epoxy Resists, in: Proceedings of SPIE 6517 2007, 65172A.]. mr-NIL 6000LT exhibits good dimensional stability at 120 °C after curing during the imprint process. This is sufficient for an isothermal imprint process as well as subsequent processes, e.g. metallization or etching.     

High flowability monomer resists for thermal nanoimprint lithography

In this paper, we have been using polymer and thermally curable monomer resists in a full 8 in. wafer thermal nanoimprint lithography process. Using exactly the same imprinting conditions, we observed that a monomer solution provides a much larger resist redistribution than a polymer resist. Imprinting Fresnel zone plates, composed of micro- and nano-meter features, was possible only with the monomer resist. In order to reduce the shrinkage ratio of the monomer resists, acrylate–silsesquioxane materials were synthesised. With a simple diffusion-like model, we could extract a mean free path of 1.1 mm for the monomer resist, while a polymer flows only on distances below 10 μm in the same conditions.     

Study of the behaviour of monomers in thermal nanoimprint lithography

Thermoplastics are commonly used in thermal nanoimprint lithography (NIL) but their high viscosity leads to inhomogeneities of residual thickness in patterns with various densities. Monomers exhibit low viscosity and are imprinted easily and polymerized with UV–NIL processes. These monomers can be also used for thermal NIL. We have imprinted A-POSS material which is spontaneously polymerized at 170 °C. The inorganic part of this monomer is interesting for pattern transfer and for permanent applications. Thermal properties of this molecule are presented in this paper. It is shown that polymerization occurs at 170 °C, and that the viscosity is 1330 mPa s at ambient temperature. Imprint experiments have demonstrated that A-POSS flows over larger surfaces during imprint step, compared to thermoplastics. Patterns with different densities have been studied and different filling regimes have been observed depending on material viscosity. They are induced by a competition between material flow and mold deformation. Finally, we imprinted some nanoelectrodes simultaneously with millimetric large connection pads, and it was demonstrated that complete filling was obtained with monomers whereas this was not possible with thermoplastics.     

Study on thermal performance of high power LED employing aluminum filled epoxy composite as thermal interface material

This paper elucidates the thermal behavior of an LED employing metal filled polymer matrix as thermal interface material (TIM) for an enhanced heat dissipation characteristic. Highly thermal conductive aluminum (Al) particles were incorporated in bisphenol A diglycidylether (DGEBA) epoxy matrix to study the effect of filler to polymer ratio on the thermal performance of high power LEDs. The curing behavior of DGEBA was studied by differential scanning calorimetry (DSC) and thermogravimetric analysis (TGA). The dispersion nature of the Al fillers in polymer matrix was verified with Field Emission Scanning Electron Microscope (FESEM). The thermal performance of synthesized Al filled polymer composite as TIM was tested with an LED employing thermal transient measurement technique. Comparing the filler to polymer ratio, the rise in junction temperature for 60 wt% Al filled composite was higher by 11.1 °C than 50 wt% Al filled composite at cured state. Observed also from the structure function analysis that the total thermal resistance was 10.96 K/W higher for 60 wt% Al filled composite compared to 50 wt% Al filled composite. On the other hand, a significant rise of 9.5 °C in the junction temperature between cured and uncured samples of 50 wt% Al filled polymer TIM was observed and hence the importance of curing process of metal filled polymer composite for effective heat dissipation is discussed extensively in this work.     

Combined electron beam and UV lithography in SU-8

We present combined electron beam and UV lithography (CEUL) in SU-8 as a fast and flexible lithographic technique for prototyping of functional polymer devices and pattern transfer applications. CEUL is a lithographic technique suitable for defining both micrometer and nanometer scale features in a single polymer film on the wafer scale. The height of the micrometer and nanometer scale features is matched within 30 nm. As a pattern transfer application, we demonstrate stamp fabrication and thermal nanoimprint of a 2-dimensional array of 100 nm wide lines with a pitch of 380 nm in connection with micrometer scale features.     

Twistable nonvolatile organic resistive memory devices

We fabricated an 8 × 8 cross-bar array-type organic nonvolatile memory devices on twistable poly(ethylene terephthalate) (PET) substrate. A composite of polyimide (PI) and 6-phenyl-C61 butyric acid methyl ester (PCBM) was used as the active material for the memory devices. The organic memory devices showed a high ON/OFF current ratio, reproducibility with good endurance cycle, and stability with long retention time over 5 × 10⁴ s on the flat substrate. The device performance remained well under the twisted condition with a twist angle up to ～30°. The twistable organic memory device has a potential to be utilized in more complex flexible organic device configurations.     

Poly(2-(N-carbazolyl)ethyl acrylate) as a host for high efficiency polymer light-emitting devices

Poly(2-(N-carbazolyl)ethyl acrylate), a poly(acrylate) comprised of carbazole-side groups attached via a flexible chain to the polymer backbone (PVAK) has been tested as host for solution-processed polymer light-emitting devices (PLEDs). This non-conjugated polymer proved to be an excellent candidate to host wide-bandgap phosphors. Notably, this polymer exhibited a high thermal stability (T_d = 322 °C), a glass transition temperature (T_g) of 91 °C and a wide bandgap corresponding to the pendent carbazole units and the disrupted π-conjugation of the polymer main chain, making this polymeric host a suitable candidate for wide bandgap triplet emitters. When tested as a host for FIrpic and Ir(ppy)₃, the resulting blue and green light-emitting devices showed a maximum luminous efficiency of 18.25 and 17.74 cd/A, respectively, which are comparable to recent reports of devices made using other carbazole-based oxygen-rich polymeric hosts. The polymer was also characterized by UV–visible absorption, photoluminescence spectroscopy as well as cyclic voltammetry.     

Facile and rapid production of conductive flexible films by deposition of polythiophene nanoparticles on transparent poly(ethyleneterephthalate): Electrical and morphological properties

In this work, polythiophene (PTh) nanoparticles were successfully deposited on poly(ethyleneterephthalate) (PET) substrate as thin film by a facile and rapid chemical oxidative deposition method using a binary organic solvent system in the presence of N-cetyl-N,N,N-trimethylammonium bromide (CTAB) as cationic surfactant. The electrical conductivity of PTh nanoparticles deposited on PET was optimized by adjusting the surfactant/oxidant/monomer molar ratio, monomer concentration and time of polymerization. Resulted film was conductive, transparent and flexible which can be used in electronic devices such as OLEDs. Electrical conductivity for the un-doped deposited PTh nanoparticles at oxidant/monomer molar ratio of 5:1 at 0 °C polymerized for 12 min was measured to be 1.18×10⁻² S/cm. The effect of oxidant and monomer concentration on polymerization yield was also investigated. The structural confirmation and transparency of the PTh nanoparticle coated PET films were characterized by FTIR and UV–vis spectroscopy, respectively. Field emission scanning electron microscopy (FESEM), laser particle size analysis and transmission electron microscopy (TEM) were employed for surface morphology and size distribution measurements of PTh nanoparticles. The results showed that the PTh nanoparticles are deposited as globular aggregates with average size of about 50 nm on PET.     

Fabrication of roll imprint stamp for continuous UV roll imprinting process

Recently, nano imprint lithography has been developed for mass production of nano-scale patterns on large-scale substrates. To achieve high throughput and cost reduction, roll-to-roll imprint lithography has been introduced. The roll-to-roll imprint is the suitable process for large area patterning, especially, flexible substrates for display devices. In this study, roll-to-roll imprint stamp is fabricated using poly-vinyl alcohol (PVA) mold and UV curable poly-dimethylsiloxanes (PDMS) resin for continuous roll imprinting process. The PVA mold was chosen since it is flexible and can be dissolved in water. Since the PDMS can form thin SiO_x layer on the surface by oxygen plasma treatment, silane based hydrophobic anti-stiction layer can be formed directly on the surface of PDMS. As a result, nano-sized patterns were successfully formed on the flexible PET films by UV roll imprinting with the fabricated roll stamp.     

Junction temperature of QFN32 and 64 electronic devices subjected to free convection. Effects of the resin's thermal conductivity

The thermal state of the electronic devices used in many engineering fields must be controlled. The maximum temperature does not exceed the value recommended by the manufacturer to prevent a decrease of their reliability, malfunction or decommissioning. The junction temperature of the Quad Flat Non-Lead (QFN) device which often equips the electronic assemblies is affected by the thermal characteristics of its components, in particular the thermal conductivity of the molding compound (resin) used for the package encapsulation. This work deals with the QFN32 and QFN64 models widely used in the field of smart building. These devices may be tilted of any angle from the horizontal and vertical positions, depending on where they are located in the considered building. The packages located in small boxes are subjected to air natural convection. The 3D numerical approach based on the volume control method considers several configurations obtained by varying the generated power between 0.01 and 0.1 W by steps of 0.01 W, corresponding to the partial operation. The junction thermal state is determined for many values of the resin's thermal conductivity ranging between − 80% and + 100% of its average value and inclination of the devices varying between 0 and 90° (horizontal and vertical positions respectively) by steps of 15°. The results of the numerical solution are confirmed by thermal and electrical measurements carried out in situ on various prototypes. The deviation between measurements and calculations is low, ranging between − 3 and + 7%. New and accurate relationships are proposed, allowing to improve the thermal design of the QFN32 and QFN64 packages by determining their junction temperature for any combination of the considered generated power, tilt angle and thermal conductivity of the encapsulating resin. The control of the thermal aspect allows to enhance substantially the reliability of these widely used electronic devices.     

Template fabrication for the 32 nm node and beyond

Imprint lithography has been included on the ITRS Lithography Roadmap at the 32 and 22 nm nodes. Step and flash imprint lithography (S-FIL^™) is a unique method that has been designed from the beginning to enable precise overlay for creating multilevel devices. A photocurable low viscosity monomer is dispensed dropwise to meet the pattern density requirements of the device, thus enabling imprint patterning with a uniform residual layer across a field and across entire wafers. Further, S-FIL provides sub-100 nm feature resolution without the significant expense of multi-element, high quality projection optics or advanced illumination sources. However, since the technology is 1X, it is critical to address the infrastructure associated with the fabrication of templates.This paper addresses steps required to achieve resolution at or below 32 nm. Gaussian-beam writers are now installed in mask shops and are being used to fabricate S-FIL templates. Although the throughput of these systems is low, they can nevertheless be applied towards applications such as unit process development and device prototyping.Resolution improvements were achieved by optimizing the ZEP520A resolution and exposure latitude. Key to the fabrication process was the introduction of thinner resist films and data biasing of the critical features. By employing a resist thickness of 70 nm and by negatively biasing features as much as 18 nm, 28 nm half-pitch imprints were obtained. Further processing improvements show promise for achieving 20 nm half-pitch features on a template.     

Optimization and validation of thermal management for a RF front-end SiP based on rigid-flex substrate

This paper mainly presents a new 3D stacking RF System-in-Package (SiP) structure based on rigid-flex substrate for a micro base station, with 33 active chips integrated in a small package of 5cm × 5.5cm × 0.8cm. Total power consumption adds up to 20.1 Watt. To address thermal management and testability difficulties of this RF SiP, a thermal test package is designed with the same package structure and assembly flow, only replacing active chips with thermal test dies (TTDs). Optimization and validation of thermal management for the thermal test package is conducted. Effects of the structure, chip power distribution, and ambient temperature aspects on the thermal performance are studied. Thermal vias designed in the organic substrate provide a direct heat dissipation path from TTDs to the top heatsink, which minimizes junction temperature gap of the top substrate from 31.2 °C to 5.3 °C, and enables junction temperatures of all the chips on the face to face structure to be well below 82 °C. Chip power distribution optimization indicates placing high power RF parts on the top rigid substrate is a reasonable choice. The ambient temperature optimizes with forced air convection and cold-plate cooling method, both of which are effective methods to improve thermal performances especially for this micro base station application where environment temperature may reach more than 75 °C. The thermal management validation is performed with a thermal test vehicle. Junction temperatures are compared between finite-volume-method (FVM) simulation and thermal measurement under the natural convection condition. The accordance of simulation and measurement validates this thermal test method. Junction temperatures of typical RF chips are all below 80 °C, which shows the effectiveness of thermal management of this RF SiP.     

Durability of antisticking layer against heat in nanoimprinting evaluated using scanning probe microscopy

In nanoimprint lithography (NIL), a mold is coated with an antisticking layer for preventing resin from adhering to it. A fluorinated self-assembled monolayer (F-SAM) is mainly used as the antisticking layer. The temperature of the mold in thermal NIL increases around the glass transition temperature of the resin. It is therefore important to assess the durability of the antisticking layer against heat. We evaluated the releasing effect of F-SAMs with and without annealing by using measurements obtained from the surface free energy and scanning probe microscopy (SPM). Furthermore, we examined the surface chemical composition and the surface morphology of F-SAMs with and without annealing using X-ray photoelectron spectroscopy (XPS), Fourier transform infrared spectroscopy (FT-IR), and atomic force microscopy (AFM). From these results, we confirmed that the releasing effect of F-SAM deteriorated due to thermal decomposition when annealing over 500 °C. However, we found that F-SAMs annealed at 500 °C had a sufficiently large releasing effect in nanoimprinting.     

Large area pattern replication by nanoimprint lithography for LCD–TFT application

Nanoimprint lithography is a high-throughput, low-cost, non-conventional lithographic method for fabricating micro/nanoscale patterns. In this study, we will present recent achievement in developing nanoimprint lithography for LCD–TFT fabrication. We fabricated metal gate for LCD–TFT with imprinting process. First, mold is pressed into a thin resist cast on a Cr layer which is deposited on a glass substrate. And the pressed resin is exposed to UV for curing, followed by demolding process. To acquire metal gate for LCD–TFT, subsequent process such as RIE with O₂ Plasmas, wet etching of Cr and striping of remained resin is followed. Finally, the fabricated metal gate has 3.5 μm level width, 97% uniformity overall on 1G size in a single imprint. Herewith nanoimprint lithography can substitute conventional photolithography steps in LCD–TFT process. Also it is expected that large area fine pattering such as functional optical films and PCBs could be effectively produced by nanoimprint process.     

Optimization of demolding temperature for throughput improvement of nanoimprint lithography

Annealing effects onto the reflow of imprinted resist patterns have been investigated on 250 nm dense line arrays printed with standard hot embossing lithography and thermoplastic polymer. Atomic force microscopy measurements were performed to point out the annealing temperature and time effects, respectively. The reflow velocity with respect to annealing temperature has been determined. Its variation is ascribed to both resist dynamic viscosity and surface free energy. Our approach demonstrated that imprint cycle time could be significantly reduced by saving cooling down time.     

Determination of the average channel temperature of GaN MOSHFETs under continuous wave and periodic-pulsed RF operational conditions

We present a method to determine the average device channel temperature of AlGaN/GaN metal–oxide–semiconductor heterostructure field effect transistors (MOSHFETs) in the time domain under continuous wave (CW) and periodic-pulsed RF (radiation frequency) operational conditions. The temporal profiles of microwave output power densities of GaN MOSHFETs were measured at 2 GHz under such conditions and used for determination of the average channel temperature. The measurement technique in this work is also being utilized to determine the thermal time constant of the devices. Analytical temporal solutions of temperature profile in MOSHFETs are provided to support the method. The analytical solutions can also apply to generic field effect transistors (FETs) with an arbitrary form of time-dependent heat input at the top surface of the wafer. It is found that the average channel temperature of GaN MOSHFETs on a 300 μm sapphire substrate with the output power of 10 W/mm can be over 400 °C in the CW mode while the average channel temperature of GaN MOSHFETs on a SiC substrate with the same thickness only reaches 50 °C under the same condition. The highest average channel temperature in a pulsed RF mode will vary with respect to the duty cycle of the pulse and type of the substrate.     

Thin film encapsulation for organic light emitting diodes using a multi-barrier composed of MgO prepared by atomic layer deposition and hybrid materials

We demonstrated an organic/inorganic multi-barrier and encapsulation for flexible OLED devices. The multi-barrier consisted of a silica nanoparticle-embedded hybrid nanocomposite, in short, S-H nanocomposite, and MgO, which were used as organic and inorganic materials, respectively. The S-H nanocomposite was spin-coated followed by UV curing. The thickness of the S-H nanocomposite was 200 nm, and 40 nm of MgO was deposited by atomic layer deposition (ALD) using Mg(CpEt)₂ and H₂O at 70 °C. The results of a Ca test showed that the 4.5 dyads of the MgO/S-H nanocomposite had a low water vapor transmission rate (WVTR) of 4.33 × 10^?6 g/m²/day and an optical transmittance of 84%. The normalized luminance degradation of the thin film encapsulated OLED was also identical to that of glass-lid encapsulation after 1000 h of the real operation time. We proposed low temperature ALD as a deposition method to create relatively thin film for OLED passivation without degradation, such as creation of dark spots. The results confirmed that it may be feasible for our multi-barrier to passivate flexible OLEDs devices.     

Effects of acrylic adhesives property and optimized bonding parameters on Sn58Bi solder joint morphology for flex-on-board assembly

Acrylic resin with a fast curable property has been used in low temperature ACFs applications. However, its poor thermo-mechanical property was a concern for solder ACFs applications. In this study, a novel thermomechanical analysis (TMA) method was introduced to measure its polymer rebound amounts due to pressures removal after a thermo-compression (TC) bonding process. Polymer resin was laminated between two silicon chips (7 1 7 mm²), and then a compressive mode TMA measurement was done on the prepared samples. Constant compressive pressures were applied until the temperature was gradually increased to target temperature, and the forces were removed at the target temperatures. The polymer rebound was measured by monitoring the z-axis dimension change after the compressive forces was removed. In addition, the effects of bonding temperatures (from 150 to 250 °C) and the bonding pressures (1, 2 and 3 MPa) on the SnBi58 (139 °C melting point) solder joints morphologies and joint resistances were evaluated to investigate acrylic resin property and find out the optimized bonding conditions for low Tg acrylic-based solder ACFs applications.     

Nanoprint lithography of gold nanopatterns on polyethylene terephthalate

Nano-order metal pattern printing on plastic substrates was established by using hard stamp nanoprint lithography (NPL). A spin-on-glass (SOG) material, which is almost the same as quartz in composition, was used as the material for the hard stamp. The SOG acted as a positive-tone electron beam (EB) resist. Nanopatterns were fabricated by using electron beam lithography (EBL), and a developed pattern of SOG was used as the hard stamp. Further, two types of release coating methods were utilized. One method used a conventional silan coupling agent and the other, a chromium layer. After comparing the results of the methods, we found that the chromium layer formed a smooth surface and therefore used this layer as the release layer. In addition, chromium was changed to Cr₂O₃ because of the exposure to atmospheric air. Gold was used as the transfer metal and was deposited on the hard stamp covered with the chromium release layer. This stamp was then placed in contact with a PET substrate at 80 °C for 30 min. A gap width of less than 30 nm of gold was transferred onto the PET substrate. This process is very simple, and yet, it makes it possible to obtain a very high resolution metal pattern transfer by using hard stamp NPL.