BiCMOS amplifier–discriminator integrated circuit for gas-filled detector readout

The paper presents a 16-channel amplifier-discriminator designed in BiCMOS technology. It will be used for the binary parallel readout of gas-filled detectors being designed at the European Synchrotron Radiation Facility. The circuit (named AMS211) has been manufactured. The measured transimpedance gain (400 KΩ), bandwidth (25 MHz) and noise (1570 e⁻+95 e⁻/pF ENC) well match the simulated results. The discriminator thresholds are individually controlled by built-in Digital to Analogue Converter. The experience gained with a first prototype of readout electronics indicates that the AMS211 should meet our requirements.     

High impedance discrete delay-line readout circuit for silicon strip detector

A prototype 16-tap high impedance discrete delay-line readout circuit has been designed and fabricated for Si-strip detectors suitable for nuclear physics experiments involving moderate count rate applications. The delay-line offers a delay of 30 ns per tap with very good linearity. The energy resolution for -particles from ²⁴¹Am²³⁹Pu source is found to be satisfactory, when 16 strips are connected through the above readout circuit of a 32-strip Si-strip detector having a dead layer of 5 μm. This readout system is very useful where a large number of detectors are integrated in a compact space and accommodating their readout electronics is a cumbersome task.     

Ultra low-noise preamplifier for low-frequency noise measurementsin electron devices

The design and realization of an ultra-low-noise, high-input-impedance amplifier for low-frequency noise measurements in electronic devices is presented. Special care is devoted to the solution of typical problems encountered in the design of low-noise low-frequency equipment, such as power supply noise and temperature fluctuations. The ultra-low-noise preamplifier has a bandwidth of over seven decades with a low-frequency roll-off of 4 mHz. The noise characteristics obtained are sensibly better than those of commercial preamplifiers commonly adopted in low-frequency noise measurements. The application of this preamplifier to the realization of standard 1/f^γ noise generators is presented     

A fast current sensitive preamplifier (MSD2) for the silicon microstrip detector

The characteristics of a hybridized low noise preamplifier are described, especially the noise performance as a function of various parameters. In particular, its behaviour in conjunction with a discriminator has been studied.     

Latest results from silicon microstrip detectors with VLSI readout for the delphi microvertex detector

A silicon microstrip counter with 25 μm strip pitch and two 128-channel low noise VLSI readout chips (“MICROPLEX”) has been tested in a 3.5 GeV negative pion beam at CERN. Results are given on the signal-to-noise ratio and on the cluster size spreading due to capacitive crosstalk.     

Dynamic magneto-optic detector for analog readout

The addition of a polarization azimuth vibrator, such as a Faraday cell, to a conventional Kerr apparatus yields a dynamic detector with a high SNR capability. The method described here has been utilized in the past as a null detector to observe Kerr rotation. It can be used equally well for analog readout of the magnetic state of the film element. The improved Kerr apparatus is well-suited to a common-mode noise rejection configuration. The common-mode configuration is usable both as a measuring instrument and as a high-speed analog readout system. Dynamic single- and double-ended Kerr apparatus are discussed and typical photodetector output waveforms are shown.     

VIKING, a CMOS low noise monolithic 128 channel frontend for Si-strip detector readout

A low noise Si-strip detector readout chip has been designed and built in 1.5 μm CMOS technology. The chip is optimized w.r.t. noise. Measurements with this chip connected to several silicon strip detectors are presented. A noise performance of ENC = 135 e⁻ + 12 e⁻/pF and signal to noise ratios between 40–80, depending on the detector, for minimum ionizing particles traversing silicon has been achieved.     

Large area microchannel plate detector with amorphous silicon pixel array readout for fast neutron radiography

Fast neutron radiography is a non-destructive testing technique with a variety of industrial applications and the capability for element sensitive imaging for contraband and explosives detection.

Commonly used position sensitive detectors for fast neutron radiography are based on charge coupled devices (CCDs) and scintillators. The limited format of CCDs implies that complex optical systems involving lenses and mirrors are required to indirectly image areas that are larger than 8.6 cm×11.05 cm. The use of optics reduces the light collection efficiency of the imaging system, while the efficiency of hydrogen rich scintillators exploiting the proton recoil reaction is limited by the hydrogen concentration and the magnitude of the neutron scattering cross-section.

The light conversion step inevitably involves a tradeoff in scintillator thickness between light yield and spatial resolution.

The development of large area amorphous silicon (a-Si) panel flat panel photodiode arrays and direct neutron-to-charge converters based on microchannel plates, provide an attractive new form of high resolution, large area, fast neutron imaging detector for the non-destructive imaging of large structures. This paper describes some recent results of both Monte Carlo simulations and measurements for such a detector.     

用于硅半导体探测器的电荷灵敏放大器的研制

氧及其子体的能谱测量中常用到钝化离子注入硅探测器或金硅面垒探测器。本文介绍了一种用于这两类硅半导体探测器的电荷灵敏放大器的实例，它由电荷灵敏级和电压放大级构成。给出了它的设计思想和调试过程。介绍了测试手段并测试了它的技术指标，说明了应用场合。     

Performance of a radiation hard 128 channel analogue front-end chip for the readout of a silicon-based hybrid photon detector

The performance is described of a front-end chip, the SCT128A-LC chip, originally developed for the readout of a silicon based Hybrid Photon Detector (HPD), which is part of an RICH detector to be run in an LHC experimental environment. The relatively low signal charge from single photoelectrons, impinging on the silicon pad sensor, put very stringent requirements on the noise performance of the front-end chip. An absolute noise calibration using X-ray sources and a ²⁴¹Am γ source was performed. It is demonstrated that sufficiently good signal over noise ratio can be obtained to use this chip for the read-out of an HPD in LHC experiments.     

Development of high density readout for silicon strip detectors

A compact readout for silicon strip detectors is being developed. It employs an nMOS circuit with 128 channels of charge sensitive amplifiers and multiplexed output.     

Cryogenic SiGe ASICs for readout and multiplexing of superconducting detector arrays

This paper presents an ultra low noise instrumentation based on cryogenic electronic integrated circuits (ASICs: Application Specific Integrated Circuits). We have designed successively two ASICs in standard BiCMOS SiGe 0.35 μm technology that have proved to be operating at cryogenic temperatures. The main functions of these circuits are the readout and the multiplexing of TES/SQUID arrays. We report the cryogenic operation of a first ASIC version dedicated to the readout of a 2 × 4 pixel demonstrator array. We particularly emphasize on the development and the test phases of an ultra low white noise (0.2 nV/sqrtHz) cryogenic amplifier designed with two multiplexed inputs. The cryogenic SiGe amplifier coupled to a SQUID in a FLL operating at 4.2 K is also presented. We finally report on the development of a second version of this circuit to readout a 3 × 8 detectors array with improved noise performances and upgraded functionalities.     

Development of low-noise high value chromium silicide resistors for cryogenic detector applications

Extremely high sensitivity detectors, such as silicon bolometers are required in many NASA missions for detection of photons from the X-ray to the far infrared regions. Typically, these detectors are cooled to well below the liquid helium (LHe) temperature of 4.2 K to achieve the maximum detection performance. As photodetectors, they are generally operated with a load resistor and a pre-set bias voltage, which is coupled to the input gate of a source-follower field effect transistor (FET) circuit. It is imperative that the detector system signal-to-noise performance be limited by the noise of the detector and not by the noise of the external components. The load resistor value is selected to optimize the detector performance. These two criteria tend to be contradictory in that these detectors require load resistors in the hundreds of megaohms, which leads to a higher Johnson noise. Additionally, the physical size of the resistor must be small for device integration as required by such missions as the NASA High Resolution Airborne Wide-Band Camera instrument and the Submillimeter High-Angular Resolution Camera for the Caltech Submillimeter Observatory, both of which employ 384 detectors and resistors. We have designed, fabricated and characterized thin film resistors using a CrSi/TiW/Al metal system on optical quality quartz substrates. The resistor values range from 75 MΩ to over 650 MΩ and are Johnson noise limited to below LHe temperatures. The resistor film is sputtered with a sheet resistance ranging from 300 to 1600 Ω/□ and the processing sequence developed for these devices allows for chemically fine-tuning the sheet resistance in situ. The wafer fabrication process was of sufficiently high yield (>80%) providing clusters of good resistors for integrated multiple detector channels, a very important feature in the assembly of these two instruments.     

Fast bipolar front-end for binary readout of silicon strip detectors

A very fast low-noise low-power 64-channel front-end chip for binary readout of silicon microstrip detectors (FABRIC) has been designed and manufactured using the full-custom bipolar process SHPi by Tektronix. The circuit consists of a preamplifier, a shaper and a discriminator. A noise level of 476 e⁻ + 63 e⁻/pF has been obtained for the amplifier peaking time of 15 ns. The walk time of the discriminator is less than 5 ns for input signals ranging from 2 fC to 8 fC at a discriminator threshold of 1 fC. The dead time for two minimum ionizing particle signals is 40 ns. The above parameters have been obtained with a low power consumption of 1.3 mW per channel.     

A new analogue sampling readout system for the COMPASS RICH-1 detector

A new electronic readout for CsI-coated multiwire proportional chambers (MWPC), used as photon detectors in the COMPASS ring imaging Cherenkov (RICH) detector, is described. A prototype system comprising more than 5000 channels has been built and tested in high-intensity beam conditions. It is based on the APV25-S1 analogue sampling chip, and replaces the GASSIPLEX chip readout used previously. The APV25 chip, although originally designed for Silicon microstrip detectors, is shown to perform well even with “slow” signals from an MWPC, maintaining a signal-to-noise ratio (SNR) of 9. For every trigger the system reads out three consecutive amplitudes in time, thus allowing to extract information on both the signal amplitude and its timing. This information is used to reduce pile-up events in a high-rate environment. Prototype tests of the new readout electronics on a central RICH photocathode in nominal COMPASS beam conditions showed that the effective time window is reduced from more than for the GASSIPLEX to less than for the APV25 chip. This leads to a significant improvement of the signal-to-background ratio (SBR) with respect to the original readout. A gain by a factor of 5–6 was experimentally verified in the very forward region of phase space, where pile-up due to the muon beam halo is most significant. Owing to its pipelined architecture, the new readout system also considerably reduces the dead time per event, thus allowing to make use of trigger rates exceeding .     

Technology for the compatible integration of silicon detectors with readout electronics

Compatible integration of detectors and readout electronics on the same silicon substrate is of growing interest. As the methods of microelectronics technology have already been adapted for detector fabrication, a common technology basis for detectors and readout electronics is available. CMOS technology exhibits most attractive features for the compatible realization of readout electronics when advanced LSI processing steps are combined with detector requirements. The essential requirements for compatible integration are the availability of high resistivity (100)-oriented single crystalline silicon substrate, the formation of suitably doped areas for MOS circuits and the isolation of the low voltage circuit from the detector operated at much higher supply voltage. Junction isolation as a first approach based on present production technology and dielectric isolation based on an advanced SOI-LSI technology are discussed as the most promising solutions for present and future applications, respectively.     

Large-area sandwich veto detector with WLS fibre readout for hadron spectroscopy at COMPASS

A sandwich detector composed of scintillator and steel-covered lead layers was introduced in the fixed-target COMPASS experiment at CERN for vetoing events not completely covered by the two-stage magnetic spectrometer. Wavelength shifting fibres glued into grooves in the scintillator tiles serve for fast readout. Minimum ionising particles impinging on the 2 m ×2 m detector outside of a central hole, sparing the spectrometer's entry, are detected with a probability of 98%. The response to charged particles and photons is modelled in detail in Monte Carlo calculations. Figures of merit of the veto trigger in 190 GeV/cπ⁻+p (or nucleus) experiments are an enrichment of exclusive events in the recorded data by a factor of 3.5 and a false-veto probability of 1%.     

Novel electronic readout system for micro-channel plate detector with wedge and strip anode

A micro-channel plate detector with wedge and strip anode can be used for visible and ultraviolet light imaging. In this paper, the imager electronics are designed in order to process specific output charge characteristics. The original signal output from the detector is shaped into a Gaussian pulse signal, and a digital Constant Fraction Discriminator is used to judge the arrival time of the pulse. The resolution of the electronic output image is 1024?×?1024, and the position decoding accuracy is 1 pixel. The experimental imaging resolving power of the detector is as high as 70?µm.     

The target silicon detector for the FOCUS spectrometer

We describe a silicon microstrip detector interleaved with segments of a beryllium oxide target which was used in the FOCUS photoproduction experiment at Fermilab. The detector was designed to improve the vertex resolution and to enhance the reconstruction efficiency of short-lived charm particles.     

非晶硅平板探测器不一致性校正技术

针对非晶硅平板探测器不一致性偏大,导致探测器灵敏度出现非线性的问题,提出了基于探测器像元灵敏度均值的校正方法。此方法基于线性拟合校正的思想,在一定管电压下,改变管电流采集一组探测器基准图像,利用这组图像与其相应均值进行拟合,再把拟合系数作为校正因子对试件成像进行校正。该方法通过缩小校正的输入范围,满足线性系统成立的条件,使非线性问题线性化,实现了各像元点对点的线性校正。实验结果表明,与常规线性校正相比,该方法不仅提高了系统成像的动态范围,而且随着标准差的降低,信噪比相应地提高了近1.3倍。