Thermal drift of m.o.s. devices

Experimental results concerning the temperature dependence of an m.o.s. field-effect transistor are presented. These results show a striking linear dependence of the temperature coefficient on the gate voltage. Comparison between experiment and simplified theory gives rise to many problems of validity of the theory.     

New V-groove double-diffused m.o.s. (v.d.m.o.s.)

A new V-groove double-diffused m.o.s. (v.d.m.o s.) is proposed which combines the V-groove technology and the double-diffused m.o.s. (d.m.o.s.) technology. The fabrication processes arc qualitatively described. The gate is located on the vertical V-shaped surface, and the effective channel length is controlled by the vertical-diffusion process of the double-diffusion step. The v.d.m.o.s. is expected to have a faster speed and higher production yield than the ordinary d.m.o.s.     

Logic functions using interacting two-state m.o.s. devices

The turn-on and turn-off of a 2-state 2-terminal m.i.s. switching device is demonstrated by the introduction of an adjacent similar third electrode. Currents up to 30 times bigger have been switched off using the third terminal. The structure is then connected in a simple circuit to demonstrate first inverter action, and then the 2-input NOR gate function. The technology of the Structure is simple, the active region requiring no diffusions, and is m.o.s. compatible.     

Punchthrough currents in short-channel m.o.s.t. devices

Measurements have been performed on the source-leakage currents associated with short-channel m.o.s.t. devices. Both space-charge-limited and non-space-charge-limited punchthrough currents have been observed as a function of gate and drain voltages, and physical mechanisms describing these currents are briefly discussed.     

Leakage currents of m.o.s. devices under surface-depletion conditions

It is found that the drain current of m.o.s.t. devices depends exponentially on gate voltage over a wide range of current when the surface of the device is depleted. An explanation of this effect is given. The results show that low-current measurements of this type for a variety of substrate bias conditions can provide information on the density of midgap states and the amount of impurity segregation in practical structures.     

Polarisable dielectrics for m.o.s.t.s

The use of a new and polarisable dielectric layer has made it possible to obtain large threshold-voltage shifts in m.o.s. capacitors.     

Two-dimensional solution of the d.c. characteristics for the m.o.s.t.

A method is outlined for the determination of a 2-dimensional solution of the potential distribution in the substrate of the m.o.s.t., based on the complete depletion-neutral approximation. Channel current is derived from a 1-dimensional solution of the continuity equation along the silicon-silicon dioxide interface, for given values of extrinsically applied electrode potentials. Theoretical characteristics have been validated by comparison with those of a practical device. A discussion of pinchoff is also included.     

Integrated n.m.o.s. operational amplifier for c.c.d. transversal filters

An integrated operational amplifier employing a new high-gain input stage and implemented with n.m.o.s. enhancement devices is reported. The circuit has been designed with reference to the output differential-charge amplifier of a c.c.d. transversal filter. The performance parameters of the amplifier are presented.     

Depletion m.o.s. power transistors

A new depletion m.o.s. transistor is proposed. The structure uses anisotropic etching to define the channel in an n?p epitaxial silicon slice. The fabrication, characteristics and power capabilities of the device are discussed.     

ZOGMOST: an improved m.o.s.t. for c.c.d. peripheral circuits

An improved formation for m.o.s. transistors fabricated with the `shadow-etch? c.c.d. process is reported. The narrow self-aligned gaps produced by the process are used to provide an additional screen gate, which allows the gate-drain overlap capacitance to be minimised, thereby improving the frequency characteristics of linear and digital m.o.s. circuits. Depending on the gain of the stage involved, an improvement in the frequency performance of up to 5 times is expected, and practical results for the modified m.o.s.t. agree with this prediction.     

Synthesis and analysis of d.l.t.s. spectra from m.o.s. surface states

Given Nss and ?ss as functions of energy and temperature, a procedure is developed to synthesise d.l.t.s spectra under arbitrary experimental conditions. Methods of analysis are then considered to determine Nss and ?ss from capture experiments.     

Design for a high-speed m.o.s. associative memory

An experimental 64-bit m.o.s. associative memory has been developed from a limit-case design study. Speeds in excess of 50 MHz are reported at a cost per bit that could approach eight times that for a conventional m.o.s. dynamic r.a.m. The design of the basic associative memory cell is described.     

Novel m.o.s. differential amplifier for sampled-data applications

A novel form of differential amplifier is reported which employs a simple, capacitive input differential circuit in place of the conventional differential pair and current source. The amplifier is especially suitable for monolithic integration in an m.o.s. technology, and generates a time-multiplexed, sampled data output signal compatible with many current signal processing techniques.     

Analogue c.c.d. correlator using monolithic m.o.s.t. multipliers

A 32-stage analogue correlator has been hybridised by using a multitapped c.c.d. delay line and m.o.s.t. multipliers fabricated on the same silicon chip. A multiple-port sample?hold system has been adopted for storage of the reference signal, thereby allowing it to be refreshed continuously. The viability of a design for a fully analogue monolithic c.c.d. correlator is established.     

Temperature effects in m.o.s. transistors

The effects of temperature on m.o.s. transistors, operated in the pinchoff mode under constant-current conditions, are examined. A theoretical derivation, which accounts for interface and substrate conditions, is presented for the temperature coefficient of the gate-source voltage. Experimental measurements on both n- and pchannel silicon m.o.s. transistors are compared with theory.     

Modelling of short-channel m.o.s. transistors

The effects of both the bulk charge due to the drain depletion region and the saturation of carrier velocity on the current/voltage characteristics of short-channel m.o.s.t.s are considered. Theoretical calculations based on both 2-dimensional and 1-dimensional models show close agreement with experimental measurements.     

Complementary dynamic m.o.s. logic circuits

Allowing both p and n channel groups of transistors to be blocked between transitions of c.m.o.s. gates leads to complementary dynamic m.o.s. circuits which, in many cases, are significantly less complex than their static counterparts. The value of the concept and a method of synthesis are demonstrated with a practical example. Systematic application to frequency dividers yields very simple new structures.     

Transient response of m.o.s. transistors

The charge equation of enhancement-type m.o.s. transistors is derived. The waveforms and practical expressions of the switching times of the resistor-coupled m.o.s. switching circuit are determined.     

V groove m.o.s. transistor technology

An m.o.s. transistor structure in which the channel is defined by preferential etching of the silicon is described. The fabrication technology involves either a 3- or 4-mask process, and results in very-short-channel devices, using noncritical alignment tolerances. Experimental results obtained on the fabricated devices are presented, and possible uses of the technology are described.     

Double-extrapolation method for m.o.s.t. threshold-voltage measurements

The measurement of the m.o.s.-transistor threshold voltage under current-saturation conditions by double extrapolation to VD=0 and ID=0 is described. For comparison, it is shown that corresponding values obtained on thin- and thick-oxide devices conventionally, by single extrapolation to ID=0, may depend critically on the drain voltage and misrepresent the voltage at which the channel becomes inverted.