解决中高压铝电解电容器炸裂与开路的方法

中高压铝电解电容器老练工序出现炸裂较严重是人所共知的,并且中高压电容器常常出现开路的情况。本文通过炸裂开路统计分析,找到了电容器炸裂与开路的原因,并从理论上进行了分析,提出了解决的方法。     

开关稳压电源用铝电解电容器的失效机理

概述了开关稳压电源用铝电解电容器的工作状态和失效模式，着重讨论了开关稳压电源用铝电解电容器的开路失效和击穿失效机理。     

铝电解电容器开路和假性短路现象分析与改进

导针型铝电解电容器的开路现象主要是因为裂箔、钉接不良、钉接花瓣小、正箔表面箔灰厚及原箔腐蚀太深而造成。假性短路的现象主要是跑片、抽芯、钉花毛刺、导针毛刺、铝箔边缘毛刺、芯子高低脚等原因而造成。只要加强工艺的控制、选用适当的材料可以杜绝铝电解电容器的开路和假性短路现象的发生。     

N_2分子激光器Blumlein电路开路输出电压的研究

解回路微分方程得到了Blumlein电路开路输出电压的表示式,对W.A.Fitzsimmons等给出的Blumlein电路开路输出电压近似式以及《激光器设计基础》的表示式给以补充修正。找出了影响提高器件脉冲峰值功率的电路参数。纠正了文章《N_2分子激光器》的结论,给出了电容器转换电路开路输出电压的表示式。     

如何估算铝电解电容器的预期寿命

人们通常用平均故障间隔时间(Mean-Time-Between-Failure，简称 MTBF) 表示电子元件预期寿命的长短。用MTBF计量某一元件从正常工作到损坏或完全失去所需功能的时间，以此估计产品的寿命。 铝电解电容器的容量随使用时间的增加而缓缓减小，直到溶液枯竭，形成开路。MTBF图不能明确地反映出铝电解电容器的失效点，因而无法帮助工程师确定电容器的预期寿命。 电容器厂家一般不用MTBF，而用保证寿命时间 (Guaranteed Life Time, 简称GLT)估计电容器的寿命。例如ELNA公司的RVS系列电容器的GLT是1 000 h (精度±20%，105癈)，那么…     

点滴

装修电子设备前,应对元件逐一测试,若没有专用仪器时至少要用万用表仔细测量。根据经验,约有0.1～0.4％电阻开路、阻值与标志不符,有0.5～0.8％电容器漏电、短路、开路。测量0.01μF以上电容器相应用R×10K档,反复调换表笔观察表针,如表针晃动是好     

提高彩色电视机S校正电容器可靠性的有效途径

1 问题的提出随着彩色电视机不断向大屏幕方向发展,显像管管径增大,偏转电流随管径的增大而增大,因此,要求S校正电容器的载流能力要增强。目前,S校正电容器主要采用CBB21S型单面金属化聚丙烯电容器,该产品能满足51cm及以下屏幕的要求,如果用于53cm以上,就会因承载的电流过大而引起发热,使电容器芯子收缩、变形、接触损耗不断增大,造成恶性循环,最后导致喷金层脱落,形成开路失效.因此,设计一种能满足大屏幕彩色电视机S校正电路中使用的S校正电容器是当务之急.     

元器件与组件

紧凑型电动机运行电容器MotorCap DM系列高度紧凑型电动机运行电容器应用了新型封装技术,其中电容器芯子的封装直接采用注塑成型,从而明显减小了电容器尺寸:目     

紧凑型电动机运行电容器

MotorCap DM系列高度紧凑型电动机运行电容器应用了新型封装技术,其中电容器芯子的封装直接采用注塑成型,从而明显减小了电容器尺寸：     

用CAD确定滤波电容

在设计电源时,确定滤波电容器的合适电容量常常是件困难的事。多数设计人员倾向于把电容量选得较大,从而给电源设计增加了不必要的成本和体积。不过,我们可以用Microcap V程序中的步距设定功能(Spectrum Software公司的软件,下载网址:www. spectrumsoft. com)来确定各参数的大小,从而为电源设计选取最合适的滤波电容器的容量。图1示出了一个简单的18V的开路     

Effects of Ir electrodes on barium strontium titanate thin-filmcapacitors for high-density memory application

Excellent electrical characteristics of RF-sputtered Barium Strontium Titanate (BST) thin-film capacitors with iridium (Ir) electrodes were obtained and the influence of Ir on device properties was investigated. In contrast to conventional Pt-electroded system, BST capacitors with Ir electrodes exhibit higher polarization and slightly higher leakage current. The stronger crystallinity of a thin BST layer (~70 Å) initially grown on Ir substrate is believed to be the cause for higher charge storage density of the Ir-electroded capacitors. However, this higher polarization is accompanied by higher dielectric dispersion (3.12% per decade for Ir versus 1.98% for Pt electrodes). On the other hand, leakage current appears to be dominated by the Schottky barrier formed by Ir-BST and Pt-BST contacts, respectively, at high field. The analysis from temperature-dependent J-V data indicates a lower barrier height for the Ir-BST contact than Pt-BST contact. The slightly higher leakage current density of the BST capacitors with Ir electrodes can thus be attributed to the lower barrier height     

A substrate-dependent CAD model for ceramic multilayer capacitors

In this paper, a substrate-dependent lumped-element model for ceramic multilayer capacitors is presented. The height and dielectric constant of a substrate have a significant impact on the frequency response of a chip capacitor, and these effects cannot be treated independently from the capacitor model. Rather, the equivalent-circuit parameters in the model must be made to vary in accordance with changes in the substrate. The model presented in this paper is suitable for microstrip-mounted components, and has been applied up to 10 GHz for values from 0.5 pF to 0.47 μF, and for FR-4 substrates ranging in height from 5 to 62 mil. The modeling and extraction procedure is demonstrated for 0805- and 1206-style capacitors     

Quantum-mechanical modeling of accumulation layers in MOS structure

An original method is used for the quantum-mechanical modeling of n-type silicon accumulation layers. Unlike previous methods, which were only valid near 4.2 K, the approach is valid up to room temperature and beyond. The self-consistent results obtained are compared with those of the standard classical model for the accumulation layer, and the differences between them are found to be relevant for the modeling of important device applications. The dependences of the accumulation voltage drop and effective F-N (Fowler-Nordheim) barrier height on oxide electric field and substrate dopine are reported. Experimental F-N current-voltage characteristics of production-quality MOS capacitors are used to validate the quantum results and to show that the standard classical model is not adequate even if the barrier height is considered as a fitting parameter. Approximate analytical expressions giving the semiconductor voltage drop and the effective F-N barrier height as a function of oxide field and substrate doping are derived for <100> and <111> n-type silicon at 77 and 300 K     

Evaluation of Qbd for electrons tunneling fromthe Si/SiO2 interface compared to electron tunneling from thepoly-Si/SiO2 interface

Electrical time-to-breakdown (TTB) measurements have shown the charge to breakdown Q_bd of gate oxide capacitors fabricated on n-type well (n-well) substrates always to be higher than that of capacitors on p-type well (p-well) substrates on the same wafer when both are biased into accumulation under normal test conditions. Here the authors correlate the higher n-well Q_bd to smooth capacitor oxide/substrate interfaces and minimized grain boundary cusps at the poly-Si gate/oxide interfaces, confirming that Fowler-Nordheim tunneling is the dominant current conduction mechanisms through the oxide. They correlate higher Q_bd to higher barrier height for a given substrate type and observe that the slope of the barrier height versus temperature plot is lower for both p-well and n-well cases with electrons tunneling from the silicon substrate. This is attributed to surface roughness at the poly-Si gate/SiO₂ interface. A poly-Si gate deposition and annealing process with clean, smooth oxide/substrate interfaces will improve the p-well breakdown characteristics and allow higher Q_bd to be achieved     

Gate current and oxide reliability in p+ poly MOScapacitors with poly-Si and poly-Ge0.3Si0.7 gatematerial

Fowler-Nordheim (FN) tunnel current and oxide reliability of PRiLOS capacitors with a p⁺ polycrystalline silicon (poly-Si) and polycrystalline germanium-silicon (poly-Ge_0.3Si_0.7 ) gate on 5.6-nm thick gate oxides have been compared. It is shown that the FN current depends on the gate material and the bias polarity. The tunneling barrier heights, φ_B, have been determined from FN-plots. The larger barrier height for negative bias, compared to positive bias, suggests that electron injection takes place from the valence band of the gate. This barrier height for the GeSi gate is 0.4 eV lower than for the Si gate due to the higher valence band edge position. Charge-to-breakdown (Q_bd) measurements show improved oxide reliability of the GeSi gate on of PMOS capacitors with 5.6 nm thick gate oxide. We confirm that workfunction engineering in deep submicron MOS technologies using poly-GeSi gates is possible without limiting effects of the gate currents and oxide reliability     

聚丙烯高频功率电容器

介绍了用聚丙烯材料生产的高频功率电容器特性和生产工艺，并通过与云母电容器技术数据对比证实，用聚丙烯材料生产的高频电容器可部分替代云母电容器，讨论了聚丙烯高频功率电容器的设计及目前所达到的技术水平。     

电磁兼容设计中电容的应用

电容是EMC设计中应用最广泛的元件之一。实践表明:在EMC设计中,恰当选择与使用电容能解决许多EMI问题。但是,若电容的选择或使用不当,则可能根本达不到预期的目的,甚至会加剧EMI程度。本文根据EMC设计原理和不同结构电容的特点,结合相关研究的新进展,针对电容在EMC设计中的一些不恰当的认识与做法,讨论了电容在EMC设计中的应用技巧。对EMC设计具有指导作用。     

电容在EMC设计中的应用技巧

电容是 EMC设计中应用最广泛的元件之一。实践表明 :在 EMC设计中 ,恰当选择与使用电容能解决许多 EMI问题。但是 ,若电容的选择或使用不当 ,则可能根本达不到预期的目的 ,甚至会加剧 EMI程度。根据 EMC设计原理和不同结构电容的特点 ,结合相关研究的新进展 ,针对电容在 EMC设计中的一些不恰当的认识与做法 ,讨论了电容在 EMC设计中的应用技巧。对 EMC设计具有指导作用     

Lithium-Ion and Sodium-Ion Hybrid Capacitors: From Insertion-Type Materials Design to Devices Construction

There is a great appeal to develop an omnipotent player combining lithium-ion batteries (LIBs) with the capacitive storage communities. Hybrid capacitors as a kind of promising energy storage device are attracting increasing attention in the main playground in recent years. Unlike supercapacitors (SCs) and LIBs, hybrid capacitors combine a capacitive electrode with a Faradaic battery electrode. In these hybrid cells, the capacitive electrode brings the power while the energy mainly comes from the Faradaic one. Numerous efforts have been conducted in the past decades; however, the research about hybrid capacitors is still at its infancy stage, and it is not expected to replace LIBs or SCs in the near future utterly. Here, the advances of hybrid capacitors, including insertion-type materials, lithium-ion capacitors, and sodium-ion capacitors, are reviewed. This review aims to offer useful guidance for the design of faradic battery electrodes and hybrid cell construction. Brief challenges and opportunities for future research on hybrid capacitors are finally presented.     

Stability Improvement of 60 GHz Narrowband Amplifier Using Microstrip Coupled Lines

We present an analysis of microstrip coupled lines (MCLs) used to improve the stability of a 60 GHz narrowband amplifier. The circuit has a 4‐stage structure implementing MCLs instead of metal‐insulator‐metal (MIM) capacitors for the unconditional stability of the amplifier and yield enhancement. The stability parameter, U, is used to compare the stability of MCLs with that of MIM capacitors. Experimental results show that MCLs are more stable than MIM capacitors with the same capacitances as MCLs because the parasitic parallel resistances of MCLs are lower than those of MIM capacitors. Moreover, the bandwidth of an amplifier using MCLs is narrower than one using MIM capacitors because the parasitic series inductances of MCLs are higher than those of MIM capacitors.