An active circuit for cancellation of common-mode voltage generatedby a PWM inverter

This paper proposes an active common-noise canceler (ACC) that is capable of eliminating the common-mode voltage produced by a pulsewidth modulation (PWM) inverter. An emitter follower using complementary transistors and a common-mode transformer are incorporated into the ACC, the design method of which is also presented in detail. Experiments using a prototype ACC, whose design and construction are discussed in this paper, verify its viability and effectiveness in eliminating common-mode voltage in a 3.7 kW induction motor drive using an insulated gate bipolar transistor (IGBT) inverter. Some experimental results show that the ACC makes significant contributions to reducing a ground current and a conducted electromagnetic interference (EMI). In addition, the ACC can prevent an electric shock on a nongrounded motor frame and can suppress motor shaft voltage     

Elimination of common-mode voltage in three-phase sinusoidal powerconverters

This paper presents an active solution to a common-mode voltage created by typical three-phase inverters. It is shown that the addition of a fourth leg to the bridge of a three-phase inverter eliminates the common-mode voltage to ground created by the modulation of the inverter. An appropriate four-phase LC filter is inserted between the inverter and the load in order to create sinusoidal output line-to-line voltage. A simple modification of the modulation strategy is implemented for the four-phase inverter to achieve a three-phase wye-output neutral-to-ground voltage which is equal to zero at all times for an ideal inverter. The modulation strategy thereby completely eliminates the common-mode potential produced by traditional modulation techniques with traditional three-phase inverter topologies     

Filter networks for long cable drives and their influence on motor voltage distribution and common-mode currents

Filter networks for long cable drives have been studied in the last decade to solve the overvoltage problem at the motor terminals. However, little research has been dedicated to analyze their influence on the voltage distribution in the motor stator winding and on the circulation of the common-mode currents. In this paper, the project of dv/dt filters through simulation and analysis from previous work is extended, including the motor voltage distribution and common-mode current analysis. Simulation and experimental results are presented, demonstrating the usefulness of the filter networks on the motor overvoltage mitigation. Three filter topologies will be discussed and compared here: RLC filter at the motor terminals, RLC filter at the inverter output and reactor filter, which is extensively used in the industry. Simulation and experimental results demonstrate that the RLC filter at the inverter output is the most interesting solution among the main types of passive filter networks.     

On-line compensation of dead-time and inverter nonlinearity with disturbance voltage observer

This paper discusses and analyses a simple on-line compensation scheme for dead-time and inverter nonlinearity in the pulse width modulated (PWM) voltage source inverter (VSI). Dead-time effect and voltage drop in switching devices cause nonlinearity between reference and output voltage. In a conventional three-phase six-switch inverter, this nonideal condition adds extraneous harmonics that badly disturb voltage characteristics. In its turn, voltage disturbance causes distortion of the current waveform and degrades performance. In this paper, an on-line dead-time compensation method based on inverse dynamics control is proposed, and it is much simpler than conventional full/reduced order observation methods adopted in dead-time compensation. Disturbance voltages are observed on-line with no additional circuitry or off-line measurements. The observed disturbance voltages are fed back to the voltage reference for compensation. Stability problem of the proposed observer arisen from inverter delay and parameter mismatch was analysed. The proposed method is applied to a surface-mounted permanent-magnet synchronous motor (SPMSM) drive. The effectiveness of the proposed scheme is validated by the experimental results.     

三相电流型逆变器的PWM控制方法研究

电流型逆变器通常采用正弦调制波和高频锯齿波载波比较的方式产生PWM脉冲。对于这种方法来说,如果逆变器直流输入电流中含有脉动成分,则交流输出电流中的谐波分量就会增加。为了抑制这些谐波分量,人们采用了有源滤波和无源滤波：但都还存在着这样那样的问题,要么电路复杂化,要么成本提高了,要么抑制效果不太理想。本文提出了一种有效的三相电流型逆变器的PWM控制方法,给出了利用80C196MC单片机实现的思路,通过实验证明了这种方法的正确性。     

A 6.6-kV Transformerless Motor Drive Using a Five-Level Diode-Clamped PWM Inverter for Energy Savings of Pumps and Blowers

This paper describes a 6.6-kV adjustable-speed motor drive for pumps and blowers without transformer. The power conversion system consists of a front-end diode rectifier, a five-level diode-clamped pulsewidth modulation (PWM) inverter with a voltage balancing circuit, and a hybrid active filter for harmonic-current mitigation of the diode rectifier. The control of the inverter is characterized by superimposing a third-harmonic zero-sequence voltage on each of the three-phase reference voltages to achieve the so-called overmodulation and reduce the switching stress of insulated gate bipolar transistors (IGBTs). A 200-V 5.5-kW downscale model is designed, constructed, and tested with focus on the five-level PWM inverter and the voltage balancing circuit. Experimental results obtained from the 200-V downscale model verify the viability and effectiveness of the 6.6-kV adjustable-speed motor drive, showing that the four split dc capacitor voltages are well balanced in all the operating conditions and that the switching stress of the IGBTs is reduced at low modulation indexes.     

New three-port DC-AC inverter outputting a single-phase and a set of three-phase AC voltages

A conventional DC-AC inverter can only output either a single-phase AC voltage or a set of three-phase AC voltages. A new three-port DC-AC inverter which can simultaneously output a single-phase AC voltage and a set of three-phase AC voltages is proposed in this paper. This three-port DC-AC inverter is based on the three-port T-type multi-level power converter which is composed of three T-type power electronic legs, a decoupling transformer set, a filter inductor set, a single-phase filter capacitor, and a three-phase filter capacitor set. The DC port of the proposed power converter is connected to a DC power source to act as the input port, and the single-phase AC port and the three-phase AC port serve as two output ports to supply power to the single-phase load and the three-phase load, respectively. The zero-sequence transformer is used to decouple the single-phase and three-phase AC components, which are generated by the three T-type power electronic legs. The operation principle of this three-port DC-AC inverter is analyzed, and a hardware prototype is established to verify the performance of the proposed three-port DC-AC inverter. The experimental results are as expected.     

An improved inverter output filter configuration reduces common anddifferential modes dv/dt at the motor terminals in PWM drivesystems

In this paper, an improved inverter output filter is proposed for pulsewidth-modulated (PWM) drive systems. The proposed filter is shown to effectively reduce both the differential and common modes dv/dt at the motor terminals, even in the presence of long motor leads. Reducing differential mode dv/dt reduces overvoltages at the motor terminals and lowers the stress on the motor insulation. Lowering common mode dv/dt is shown to significantly reduce high-frequency leakage currents to ground and induced shaft voltage in the motor. An important advantage of the approach is that the filter can be installed within the inverter enclosure to achieve both the differential and common modes dv/dt reductions at the motor terminals. Thus, the use of the filter can contribute to enhanced bearing life and improve reliability of PWM drive systems. Analysis, design equations, and experimental results on a 480-V 20-hp PWM drive system are presented. The filter configuration is an excellent candidate for many new and retrofit PWM 480-V/575-V drive systems     

Common-Mode Ripple Current Estimator for Parallel Three-Phase Inverters

For the three-phase parallel voltage source inverter systems with common dc link, several control methods were developed to suppress the common-mode circulating current. The common-mode ripple current is the main disturbance source of the common-mode circulating current control system that forms part of the parallel discontinuous pulsewidth modulation (PWM) inverter system. In this paper, a real-time analysis method for the common-mode ripple voltage of the three-phase discontinuous PWM inverter is proposed, whereby the amplitude of the common-mode ripple current can be estimated correctly, the hysteresis width of the circulating current controller can be adjusted to be as small as possible, and consequently, the rms circulating current is minimized as well. The simulation and experimental results are presented to confirm the theoretical analysis method of the common-mode ripple current and the performance of the proposed common-mode ripple current estimator.      

A new active common-mode EMI filter for PWM inverter

This paper presents a new active common-mode electromagnetic interference (EMI) filter for the pulse-width modulation (PWM) inverter application. The proposed filter is based on the current sensing and compensation circuit and it utilizes a fast transistor amplifier for the current compensation. The amplifier utilizes an isolated low-voltage DC power supply for its biasing and it is possible to construct the active filter independent of the source voltage of the equipment. Thus the proposed active filter can be used in any application regardless of its working voltage. The effectiveness of the proposed circuit has been verified by experimental results.     

An active ripple filtering technique for improving common-mode inductor performance

Active ripple filtering is the replacement of large passive components in power filter circuits with smaller passive components and active control circuitry. This letter focuses on common-mode filters, where a large common-mode inductor (choke) is replaced by two smaller chokes and active op-amp control. The technique is appropriate when improved attenuation is required at relatively low frequencies and the high-frequency filtering requirements are easily met. Smaller chokes save significantly in material and winding costs. The technique is more advantageous if wire-wound chokes can be replaced by planar printed circuit board chokes. The use of the technique in an automotive electromagnetic interference (EMI) filter application is explored in detail.     

Fast Control of Filter for Sensorless Vector Control SQIM Drive With Sinusoidal Motor Voltage

A pulsewidth-modulated (PWM) voltage applied to a squirrel-cage induction motor (SQIM) can cause high bearing currents, heating of rotor shaft, voltage spike across the motor terminals, etc. Filtering of this PWM voltage to obtain a sinusoidal output voltage can be a solution to this problem. However, a passive L-C filter makes the dynamic performance of the drive poor for high-performance control application. In this paper, a feed-forward control strategy for the L-C filter is proposed to have a good bandwidth for the filter output voltage. This filter control strategy is introduced along with a sensorless vector control strategy for the SQIM drive. This complete strategy retains the high dynamic performance of the drive even with the L-C filter. In this paper, a three-level converter is used as a voltage source inverter for the drive to have a less filter-size requirement. The control strategy is verified on a 7.5-hp SQIM drive with a three-level insulated-gate bipolar-transistor inverter and L-C filter. Experimental results validate the high dynamic performance of the drive with filter.     

Four-wire dynamic voltage restorer based on a three-dimensional voltage space vector PWM algorithm

A modified voltage space vector pulse-width modulated (PWM) algorithm for a four-wire dynamic voltage restorer (DVR) is described. The switching strategy based on a three-dimensional (3-D) /spl alpha//spl beta/O voltage space is applicable to the control of three-phase four-wire inverter systems such as the split-capacitor PWM inverter and the four-leg PWM inverter. In contrast to the conventional voltage space vector PWM method, it controls positive, negative and zero sequence components of the terminal voltages instantaneously. Three 3-D modulation schemes are analyzed with respect to total harmonic distortion (THD), weighted total harmonic distortion (WTHD), neutral line ripple and switching loss over the whole range of the modulation index when the DVR experiences both balanced and unbalanced sags with phase angle jumps. Experimental results from a 9 kW DVR system using a split-capacitor PWM inverter are presented to validate the simulation results.     

Conducted electromagnetic emissions in induction motor drivesystems. I. Time domain analysis and identification of dominant modes

Stray components distributed in a pulsewidth modulation (PWM) drive system form parts of resonant circuits which can be excited to produce radio frequency (RF) noise driven by the pulsed switching action of the power devices. The dynamic response of such circuits is complex. It is essential to identify the dominant oscillation modes in the system so that electromagnetic interference (EMI) reduction techniques can be effectively implemented. This paper (Part I) investigates the mechanisms of conducted EMI emissions associated with a typical PWM inverter induction motor drive system. A numerical model, which includes the high-frequency effects within the machine, is established to evaluate the emissions in the time domain. The dominant high-frequency current paths are identified, and this allows the oscillation frequencies to be predicted from knowledge of the component values. The analysis is confirmed using laboratory measurements. Simplified frequency domain methods for direct calculation of the emission spectra based on the dominant high-frequency current paths are discussed in Part II     

An overvoltage suppression scheme for AC motor drives using a halfDC-link voltage level at each PWM transition

Passive filters are conventionally used to suppress overvoltage in the motor terminal, either by reducing the voltage rise rate at the inverter output, or by decreasing the motor terminal impedance. We propose an overvoltage suppression scheme that renders the use of passive filters unnecessary. This approach differs from general filter methods, in that it is independent,of dυ/dt and does not try to reduce dυ/dt. Our scheme utilizes the middle voltage level V_DC /2 at each pulsewidth modulation voltage transition, where V_DC represents the DC-link voltage. The duration of the middle voltage level is controlled in such a way that reflected voltages are cancelled out at the motor terminal. Optimal cancellation is achieved when the duration of V_DC/2 is equal to twice the transport delay of the cable. Further, if reflection coefficients at the motor terminal and the inverter output are equal to ±1, no overvoltage takes place. The proposed scheme requires the use of six auxiliary insulated gate bipolar transistor switches. Simulation as well as experimental results are presented here     

Output voltage integral control technique for compensating nonidealDC buses in voltage source inverters

Output harmonic minimization in standard pulse width modulation (PWM) pattern generators is based on the assumption that the input DC bus voltage is ripple-free. However, in a practical converter system, a nonideal DC bus deteriorates the quality of the inverter output voltage by introducing undesirable low-order harmonics that may be difficult to filter. The existing compensation techniques often use additional and complex circuitry to eliminate the effect of this ripple on the output voltage. This paper presents an online PWM pattern generator that inherently takes into account the DC bus ripple and generates gating signals required to produce high-quality sinusoidal output voltages. The technique is based on integrating the output voltage at a constant frequency on a pulse-by-pulse basis to ensure a sinusoidal volt-sec (V/s) distribution, irrespective of the input DC bus. The principles of operation are explained, and design equations are derived. The features of the proposed PWM pattern generator are illustrated. Comparison of the output voltage waveforms of those standard sinusoidal PWM (SPWM) techniques illustrate, in particular, the effectiveness of the ripple-rejection mechanism. Experimental results obtained on a 3-kVA laboratory prototype confirm the feasibility and features of the proposed pattern generator     

死区对PWM逆变器共模电压的影响及其抑制方法

变频器采用的空间矢量脉宽调制(SVPWM)会产生共模电压,后者对变频器和电机产生危害。改进的空间矢量脉宽调制法有利于降低共模电压,但由于没有考虑死区的影响,实际效果受到较大影响。文章详细研究了死区对PWM逆变器共模电压的影响,并提出了一种消除死区的方法来抑制死区影响并对共模电压起到一定的抑制作用,使改进的空间矢量脉宽调制法能够真正达到预想的效果。最后通过Matlab仿真实验,验证了该方法的有效性。     

Adaptive SVM to compensate DC-link voltage ripple for four-switchthree-phase voltage-source inverters

An adaptive space vector modulation (SVM) approach to compensate the DC-link voltage ripple in a B4 inverter is proposed and examined in detail. The theory, design, and performance of this pulsewidth modulation (PWM) method are presented, and the method effectiveness is demonstrated by extensive simulations and experiments. High-quality output currents are guaranteed by this approach even with substantial DC-voltage variations that might be caused by an unbalanced AC supply system, the diode rectification of the line voltages, and circulation of one output phase current through the split capacitor bank. The application of this approach to induction machine drives is also discussed. It is concluded that the DC-voltage ripple effect on the B4 inverter output can be minimized by an adaptive SVM algorithm with the advantage of improving the response of the DC-link filter and the output quality of the inverter becoming high     

A novel control scheme for the multilevel rectifier/inverter

A novel three-level pulsewidth modulation (PWM) rectifier/inverter is proposed: this single-phase three-level rectifier with power factor correction and current harmonic reduction is proposed to improve power quality. A three-phase three-level neutral point clamped (NPC) inverter is adopted to reduce the harmonic content of the inverter output voltages and currents. In the adopted rectifier, a switching mode rectifier with two AC power switches is adopted to draw a sinusoidal line current in phase with mains voltage. The switching functions of the power switches are based on a look-up table. To achieve a balanced DC-link capacitor voltage, a capacitor voltage compensator is employed. In the NPC inverter, the three-level PWM techniques based on the sine-triangle PWM and space vector modulation are used to reduce the voltage harmonics and to drive an induction motor. The advantages of the adopted th-ree-level rectifier/inverter are (1) the blocking voltage of power devices (T1, T2, S_a1-S_c4) is clamped to half of the DC-link voltage, (2) low conduction loss with low conduction resistance due to low voltage stress, (3) low electromagnetic interference, and (4) low voltage harmonics in the inverter output. Based on the proposed control strategy, the rectifier can draw a high power factor line current and achieve two balance capacitor voltages. The current harmonics generated from the adopted rectifier can meet the international requirements. Finally, the proposed control algorithm is illustrated through experimental results based on the laboratory prototype.