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FTC-29GF80R中的红外线遥控技术519000珠海建盛电子公司王守业随着微处理器(CPU)的应用,现代彩电普遍具有红外线遥控功能,红外线遥控技术成为CPU软件编程中的重要一环,下面将讲述红外线遥控程序的原理及编写方法。红外线遥控是由遥控发射器发... 相似文献
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本文探讨了CCITT.31规程所规定ISDN接入PSPDN的两种方式,即CASEA和CASEB,以及针对这两种方式的具体设备:AU(Access Unit)和PH(Pacdet Handling)。重点介绍了在“八五”国家攻关项目中实现AU的总体方案,其中包括AU的呼叫接续描述、AU硬件结构和AU软件框图。本文还对PH的实现进行了初步探讨。 相似文献
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根据UNIX操作系统的特点,提出了用UNIX系统所包含的网络软件包UUCP进行应用软件的远程维护,并详细地介绍了UUCP的工作原理、使用U-UCP时软、硬件的设置方法以及远程维护的具体实现。 相似文献
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介绍了用单片机80C552作为CPU来实现黑白静态图像可视电话的方案,以及系统的构成、软件编程和硬件实现。 相似文献
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文章以微型计算机中常用的INTEL80X86系列的微处理器———CPU为线索,介绍了目前CPU为提高整个微型计算机性能和运算速度所采用的各种新技术、新思想和新设计方法,阐述了当今CPU技术的发展现状,最后展望了CPU技术在最近几年的发展前景 相似文献
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有机聚合物CPU的结构形态 总被引:1,自引:0,他引:1
本文用扫描隧道显微镜(STM)研究了有机氰基-苯基-脲(CPU)的表面结构。在不同的CPU薄膜制备条件下,得到了不同的CPU薄膜的STM像,表明制备条件与成膜结构的密切关系。观察到了CPU薄膜中晶区和非晶区的存在,证实了聚合物晶体中晶区和非晶区的模型。 相似文献
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文章介绍一种方法,将采用MOTEL技术研制的实时日历时钟芯片MC146818应用于Z80微机系统,文中给出了Z80CPU与MC146818的接口硬件和软件。 相似文献
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研究计算机CPU芯片温升与其使用率的关系.在给定CPU芯片不同使用率的条件下,测试芯片温升的变化曲线,得出温升与时间为指数关系,时间常数随使用率变化.进而从保证电子系统可靠性的目的出发,提出将CPU平均温升作为评测软件优劣的一个判据,认为引起温升小的软件效率高,且具有提高芯片运行可靠性的优点.最后对几个软件进行了初步评测. 相似文献
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Marius Marcu 《Microelectronics Journal》2011,42(4):601-608
Power consumption and heat dissipation are becoming the major factors that limit the performance evolution of current state-of-the-art microprocessors. As they become key elements in the design of both high performance computers and battery powered devices, different power and thermal management strategies have been proposed and implemented during the last years in order to overcome this performance limitation. Considering that software applications have a large impact on power consumption and thermal map of the CPU cores, these design strategies tend to be addressed at higher levels even as they are usually implemented at lower levels of systems abstraction. The work presented in this paper evaluates the relation between power consumption and thermal response of CPU cores when different software applications are executed. The goal of this study is to identify how software applications can be used in thermal management process and whether it is feasible to implement thermal-aware software applications. 相似文献
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It is argued that the bandwidth of the CPU/memory data path on workstations will remain within the same order of magnitude as the network bandwidth delivered to the workstation. This makes it essential that the number of times network data traverses the CPU/memory data path be minimized. Evidence which suggests that the cache cannot be expected to significantly reduce the number of data movements over this path is reviewed. Hardware and software techniques for avoiding the CPU/memory bottleneck are discussed. It is concluded that naively applying these techniques is not sufficient for achieving good application-to-application throughput; they must also be carefully integrated. Various techniques that can be integrated to provide a high bandwidth data path between I/O devices and application programs are outlined 相似文献
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软硬件协同验证是系统芯片设计的重要组成部分。针对基于32 Bit CPU核的某控制系统芯片的具体要求,提出了一种系统芯片软硬件协同验证策略,构建了一个软硬件协同验证环境。该环境利用处理器内核模型支持内核指令集的特性运行功能测试程序,实现SoC软硬件的同步调试,并能够快速定位软硬件的仿真错误点,有效提高了仿真效率。该SoC软硬件协同验证环境完成了设计目的,并对其他系统芯片设计具有一定的参考价值。 相似文献
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可编程多串口接口模块的研究与设计 总被引:2,自引:2,他引:0
主要介绍了一种具有可编程特点的多串行接口模块的研究与设计工作,该模块利用自身的CPU完成对模块的控制与报文通讯,利用IDT公司推出的异步高速双口RAM IDT7130完成与主计算机的通讯,同时,通讯的模式可以通过主CPU在线设定。由于模块与主控计算机之间采用双CPU并行工作的模式,该模块在工业控制与仪表测试等实时性要求较高的领域中有着十分广阔的应用前景。 相似文献
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为了解决CAS软件通信过程中的稳定性问题,介绍了前端CAS的软件通信架构,旨在设计出一种具有高可靠性且7×24 h不间断运行的CAS软件。在已经完成相关通信接口和信息交换的基础上,从软件工程和操作系统的角度,进一步深入并着重探讨前端CAS软件的通信架构,优化TCP建立连接的方式,实现了两种模式的软件。通过比较分析,得出CPU功耗更低更稳定的软件设计方案。 相似文献
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基于可编程逻辑器件FPGA,利用Verilog硬件描述语言,采用自顶向下和模块化的设计方法,先将CPU的每个模块进行软件设计与仿真,再将每个模块综合起来,设计并验证了一种简单CPU逻辑控制器。对CPU关键功能模块进行了原理分析,并通过Max+PlusⅡ软件编译适配,给出了时序仿真图。同时在硬件上实现了简单指令控制的流水灯实例,完成了完整的Verilog硬件描述语言的简易CPU设计。该设计具有很强的灵活性与可靠性,只要适当扩展或修改指令集就可以使CPU实现更多的功能。 相似文献
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针对国产超级计算机平台上大规模电磁仿真软件相对匮乏,本文将并行高阶矩量法程序移植到国产超级计算机平台上,并以机载线天线阵列的辐射特性计算为例对其并行性能进行了测试和评估。实现了并行高阶矩量法单一任务突破10 万CPU 核规模,这是目前在国产超级计算机平台上实现的最大规模并行矩量法计算。以1440 核为基准,使用CPU 核数达到102400,并行规模扩大约70 倍时,并行矩量法矩阵方程求解并行效率仍在50%以上。这一研究工作,使利用纯国产超级计算机对复杂电大电磁系统进行精确高效仿真成为可能。 相似文献
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Andrews D. Sass R. Anderson E. Agron J. Peck W. Stevens J. Baijot F. Komp E. 《Very Large Scale Integration (VLSI) Systems, IEEE Transactions on》2008,16(1):34-44
This paper introduces hthreads, a unifying programming model for specifying application threads running within a hybrid computer processing unit (CPU)/field-programmable gate-array (FPGA) system. Presently accepted hybrid CPU/FPGA computational models-and access to these computational models via high level languages-focus on programming language extensions to increase accessibility and portability. However, this paper argues that new high-level programming models built on common software abstractions better address these goals. The hthreads system, in general, is unique within the reconfigurable computing community as it includes operating system and middleware layer abstractions that extend across the CPU/FPGA boundary. This enables all platform components to be abstracted into a unified multiprocessor architecture platform. Application programmers can then express their computations using threads specified from a single POSIX threads (pthreads) multithreaded application program and can then compile the threads to either run on the CPU or synthesize them to run within an FPGA. To enable this seamless framework, we have created the hardware thread interface (HWTI) component to provide an abstract, platform-independent compilation target for hardware-resident computations. The HWTI enables the use of standard thread communication and synchronization operations across the software/hardware boundary. Key operating system primitives have been mapped into hardware to provide threads running in both hardware and software uniform access to a set of sub-microsecond, minimal-jitter services. Migrating the operating system into hardware removes the potential bottleneck of routing all system service requests through a central CPU. 相似文献