Novel high-power-factor ZCS-PWM preregulators

This paper introduces novel zero-current-switching (ZCS) pulsewidth-modulated (PWM) preregulators based on a new soft-commutation cell, suitable for insulated gate bipolar transistor applications. The active switches in these proposed rectifiers turn on in zero current and turn off in zero current-zero voltage. In addition, the diodes turn on in zero voltage and their reverse-recovery effects over the active switches are negligible. Moreover, based on the proposed cell, an entire family of DC-to-DC ZCS-PWM converters can be generated, providing conditions to obtain naturally isolated converters, for example, derived buck-boost, Sepic and Zeta converters. The novel AC-to-DC ZCS-PWM boost and Zeta preregulators are presented in order to verify the operation of this soft-commutation cell. In order to minimize the harmonic contents of the input current, increasing the AC power factor the average-current-mode control is used, obtaining preregulators with AC power factor near unity and high efficiency at wide load range. The principle of operation, theoretical analysis, design example, and experimental results from test units for the novel preregulators are presented. The new boost preregulator was designed to nominal values of 1.6 kW output power, 220 V_rms input voltage, 400 V_dc output voltage, and operating at 20 kHz. The measured efficiency and power factor of the new ZCS-PWM boost preregulator were 96.7% and 0.99, respectively, with an input current total harmonic distortion (THD) equal to 3.42% for an input voltage with THD equal to 1.61%, at rated load     

Implementation of a three-level rectifier for power factorcorrection

In this paper, a new single-phase switching mode rectifier (SMR) for three-level pulse width modulation (PWM) is proposed to achieve high input power factor, low current harmonics, low total harmonic distortion (THD) and simple control scheme. The mains circuit of the proposed SMR consists of six power switches, one boost inductor, and two DC capacitors. The control algorithm is based on a look-up table. There are five control signals in the input of the look-up table. These control signals are used to control the power flow of the adopted rectifier, compensate the capacitor voltages for the balance problem, draw a sinusoidal line current with nearly unity power factor, and generate a three-level PWM pattern on the AC side of adopted rectifier. The advantages of using three-level PWM scheme compared with two-level PWM scheme are using low voltage stress of power switches, decreasing input current harmonics, and reducing the conduction losses. The performances of the proposed multilevel SMR are measured and shown in this paper. The high power factor and low harmonic currents at the input of the rectifier are verified by software simulations and experimental results from a laboratory prototype     

The three-level ZVS-PWM DC-to-DC converter

A novel high-frequency DC-to-DC power converter for high voltage and high power is introduced which features zero voltage switching (ZVS), operation at constant frequency, regulation by pulse width modulation (PWM), and low RMS current stress upon power switches. Its greatest attribute, in comparison with the full-bridge (FB-ZVS-PWM) converter, is that the voltage across the switches is half of the input voltage, This property is achieved due to the use of a three-level leg in place of the conventional two-switch leg. Operation, analysis, design procedure and example, and simulation are presented. A prototype operating at 100 kHz, rated at 600 V input voltage, and 1.5 kW output power and 25 A output current has been fabricated and successfully tested in the laboratory. The measured efficiency at full load was 93%     

Active damping control of a high-power PWM current-source rectifier for line-current THD reduction

The use of active damping to reduce the total harmonic distortion (THD) of the line current for medium-voltage (2.3-7.2 kV) high-power pulsewidth-modulation (PWM) current-source rectifiers is investigated. The rectifier requires an LC filter connected at its input terminals, which constitutes an LC resonant mode. The lightly damped LC filter is prone to series and parallel resonances when tuned to a system harmonic either from the utility or from the PWM rectifier. These issues are traditionally addressed at the design stage by properly choosing the filter resonant frequency. This approach may result in a limited performance since the LC resonant frequency is a function of the power system impedance, which usually varies with power system operating conditions. In this paper, an active damping control method is proposed for the reduction in line current THD of high-power current-source rectifiers operating at a switching frequency of only 540 Hz. Two types of LC resonances are investigated: the parallel resonance excited by harmonic currents drawn by the rectifier and the series resonance caused by harmonic pollution in the source voltage. It is demonstrated through simulation and experiments that the proposed active damping control can effectively reduce the line-current THD caused by both parallel and series resonances.     

An improved ZCS-PWM commutation cell for IGBT's application

An improved zero-current-switching pulsewidth-modulation (ZCS-PWM) commutation cell is proposed, which is suitable for high-power applications using insulated gate bipolar transistors (IGBTs) as the power switches. It provides ZCS operation for active switches with low-current stress without voltage stress and PWM operating at constant frequency. The main advantage of this cell is a substantial reduction of the resonant current peak through the main switch during the commutation process. Therefore, the RMS current through it is very close to that observed in the hard-switching PWM converters. Also, small ratings auxiliary components can be used. To demonstrate the feasibility of the proposed ZCS-PWM commutation cell, it was applied to a boost converter. Operating principles, theoretical analysis, design guidelines and a design example are described and verified by experimental results obtained from a prototype operating at 40 kHz, with an input voltage rated at 155 V and 1 kW output power. The measured efficiency of the improved ZCS-PWM boost converter is presented and compared with that of hard-switching boost converter and with some ZCS-PWM boost converters presented in the literature. Finally, this paper presents the application of the proposed soft-switching technique in DC-DC nonisolated power converters     

A novel suppressed-link rectifier-inverter topology with near unity power factor

This work describes a novel method in improving the input current total harmonic distortion (THD) as well as the power factor of a three-phase suppressed-link rectifier-inverter circuit. This proposed method makes use of only three bi-directional low power static switches with a relatively simple gating circuit. This paper illustrates how the proposed method is superior in reducing the input current THD of a rectifier-inverter set to about 5%, which is in line with the requirements of IEEE standard 519-1992. This is accomplished without the use of any filter or complex wave shaping techniques. A delta-modulated (DM) voltage source inverter (VSI) with proportional integrator forms the output stage of the converter. It helps to provide constant volts per hertz operation without the need for additional feedback circuitry and complexity. Moreover, this novel DM technique also helps to provide a smooth transition from the pulse width modulation (PWM) to square wave, hence allowing full utilization of the DC bus voltage.     

Zero-voltage-zero-current switching in high-output-voltagefull-bridge PWM converters using the interwinding capacitance

A novel zero-voltage and zero-current-switching (ZVZCS) full-bridge (FB) pulsewidth-modulated (PWM) power converter is proposed. The new converter uses the interwinding capacitance and a small primary-side inductor to achieve a zero-current-zero-voltage turn off and a zero-current turn on of the passive-to-active leg transistors. The turn off of the active-to-passive leg transistors is with zero voltage, and the turn on is with zero voltage and zero current across them. The ringing caused by the parasitic interwinding capacitance and by the reverse recovery of the rectifiers is reduced. The new converter is attractive for high-output-voltage applications (600-1000 V), where the interwinding capacitance is sufficiently dominant. In addition, switches such as insulated gate bipolar transistors (IGBTs) and MCTs can be used at higher frequencies which is particularly desirable for high-power application (above 2 kW). The experimental results obtained from an IGBT-based 62.5-kHz DC/DC power converter with a rated output voltage of 600 V and a nominal power of 1.2 kW are presented     

Resonant-boost-input three-phase power factor corrector

This paper presents a novel three-phase power factor corrector (PFC) circuit which uses two power switches working in zero-voltage-switching (ZVS) condition. The two switches along with a high-frequency inductor constitute a high-frequency current source which is responsible for the energy transfer in the circuit. The input current is partly continuous and partly discontinuous. The total harmonic distortion (THD) in the input current has a low value of 4.5%, and the output DC voltage is very close to the peak line voltage. The operation of the converter is explained by identifying the different switching modes, and the simulation and experimental waveforms are presented     

A novel ZCS-PWM power-factor preregulator with reduced conduction losses

This paper proposes a new single-phase high-power-factor rectifier, which features regulation by conventional pulsewidth modulation (PWM), soft commutation, and instantaneous average line current control. A new zero-current-switching PWM (ZCS-PWM) auxiliary circuit is configured in the presented ZCS-PWM rectifier to perform ZCS in the active switches and zero-voltage switching in the passive switches. Furthermore, soft commutation of the main switch is achieved without additional current stress by the presented ZCS-PWM auxiliary circuit. A significant reduction in the conduction losses is achieved, since the circulating current for the soft switching flows only through the auxiliary circuit and a minimum number of switching devices are involved in the circulating current path and the proposed rectifier uses a single converter instead of the conventional configuration composed of a four-diode front-end rectifier followed by a boost converter. Nine transition states for describing the behavior of the ZCS-PWM rectifier in one switching period are described. The PWM switch model is used to predict the system performance. A prototype rated at 1 kW, operating 50 kHz, with an input ac voltage of 220 V/sub rms/ and an output voltage 400 V/sub dc/ has been implemented in laboratory. An efficiency of 97.3% and power factor over 0.99 has been measured. Analysis, design, and the control circuitry are also presented in this paper.     

A new single-phase ZCS-PWM boost rectifier with high power factor and low conduction losses

This paper proposes a new single-phase high-power-factor rectifier, which features regulation by conventional pulsewidth modulation (PWM), soft commutation, and instantaneous average line current control. A new zero-current switching PWM (ZCS-PWM) auxiliary circuit is configured in the presented ZCS-PWM rectifier to perform ZCS in the active switches and zero-voltage switching (ZVS) in the passive switches. Furthermore, soft commutation of the main switch is achieved without additional current stress by the presented ZCS-PWM auxiliary circuit. A significant reduction in the conduction losses is achieved because of the following reasons: 1) the circulating current for the soft switching flows only through the auxiliary circuit; 2) a minimum number of switching devices are involved in the circulating current path; and 3) the proposed rectifier uses a single converter instead of the conventional configuration composed of a four-diode front-end rectifier followed by a boost converter. Seven transition states for describing the behavior of the ZCS-PWM rectifier in one switching period are described. The PWM-switch model is used to predict the system performance. A prototype rated at 1 kW, operating at 60 kHz, with an input alternating current voltage of 220 V/sub rms/ and an output voltage of 400 V/sub dc/, has been implemented in laboratory. An efficiency of 98.3% and a power factor over 0.99 have been measured. Analysis, design, and the control circuitry are also presented in this paper.     

The ZVS-PWM commutation cell applied to the DC-AC converter

This paper presents the analysis of a DC-AC power converter using a zero-voltage-switching (ZVS) commutation cell. First, the authors show the cell applied to the buck power converter. The stages of operation are presented along with the main current and voltage equations. Next, they adapt the power converter to the regenerative-operation mode. Hence, the full-bridge power converter at low-frequency operation is connected in the DC-DC output stage (at high frequency). The main switches commute at zero voltage. The power converter operated at constant frequency with pulse-width modulation (PWM), and neither overvoltage nor additional current stress was observed by digital simulation. A design example and experimental results obtained by prototype, rated at 275 V and 1 kW, are also presented     

A three-phase neutral point clamped inverter for motor control

A microprocessor-controlled PWM (pulse-width-modulated) inverter has been developed in which the neutral point at a star-connected load is clamped in potential. In addition to PWM waveforms, the inverter can generate six-step or eight-step waveforms in response to the appropriate software, using the MC68000 microprocessor. Operation takes places in the PWM model for 1-40 Hz and in a step mode for 40-100 Hz. The inverter used 12 power switches compared with the customary six switches in a standard inverter. Darlington power transistors were used in a laboratory prototype rated at 6 kW. A design feature is that power to the drive circuits of the twelve switches come directly from the DC supply, eliminating the need for individual power supplies. The root-mean-square value of the fundamental line voltage is 0.64 V DC compared to 0.5 V DC for conventional PWM operation with a six-switch inverter     

A three-phase half-controlled rectifier with pulse width modulation

A three-phase pulse-width-modulated (PWM) half-controlled rectifier using a novel PWM control strategy whereby the low-order harmonic content in both the input current and the output voltage is reduced is presented. The circuit operates with a unity displacement factor at its input and uses minimum power components. The PWM strategy developed can be implemented on a three-phase half-controlled rectifier bridge with only three controlled switches to obtain PWM controlled rectification. Although the circuit operation is explained with force-commutated SCR switches, the basic controlled PWM operation is valid for any type of switch control. The circuit has wide applications ranging from rectifiers to battery chargers to motor drives. Even if an input current filter is desired, its size will be small due to the PWM pattern used     

An improved family of ZVS-PWM active-clamping DC-to-DC converters

A new family of DC-to-DC converters featuring clamping action, PWM modulation and soft-switching (ZVS) in both active and passive switches, is proposed to overcome the limitations of clamped mode DC-to-DC converters. The new family of converters is generated and the new circuits are presented. As the resonant circuits absorb all parasitic reactances, including transistor output capacitance and diode junction capacitance, these converters are suitable for high-frequency operation. Principle of operation of the boost converter, theoretical analysis, simulation and experimental results are presented, taken from a laboratory prototype rated at 1600 W, input voltage of 300 V, output voltage of 400 V, and operating at 100 kHz. The measured efficiency at full load was 98%     

A new UPS scheme provides harmonic suppression and input powerfactor correction

A new parallel processing uninterruptible power supply (UPS) configuration is proposed in this paper. It provides active power line conditioning to minimize mains current distortion. This performance is superior to a conventional UPS. A prototype has been implemented and tested to verify its performance. The experimental results show that the input power factor of the proposed UPS is nearly unity, and the total harmonic distortion (THD) of the input current under nonlinear loading is only 3.618% for a mains voltage with THD of 1.633%     

A high efficiency PWM CMOS class-D audio power amplifier

Based on the difference close-loop feedback technique and the difference pre-amp, a high efficiency PWM CMOS class-D audio power amplifier is proposed. A rail-to-rail PWM comparator with window function has been embedded in the class-D audio power amplifier. Design results based on the CSMC 0.5 μm CMOS process show that the max efficiency is 90%, the PSRR is -75 dB, the power supply voltage range is 2.5-5.5 V, the THD+N in 1 kHz input frequency is less than 0.20%, the quiescent current in no load is 2.8 mA, and the shutdown current is 0.5 μA. The active area of the class-D audio power amplifier is about 1.47 × 1.52 mm2. With the good performance, the class-D audio power amplifier can be applied to several audio power systems.     

Three-Mode Dual-Frequency Two-Edge Modulation Scheme for Four-Switch Buck–Boost Converter

Four-switch buck–boost (FSBB) converter features low-voltage stress across the power switches and positive output voltage. They have two active power switches and two synchronous rectifiers, so two freedoms, i.e., the duty cycles of the two active switches, are available to regulate the output voltage. This paper proposes a two-edge modulation (TEM), in which the two active switches are trailing-edge and leading-edge modulated, respectively. Thus, the inductor current ripple can be reduced. Furthermore, a 3-mode TEM is derived to reduce the root-mean-square value of the inductor current to reduce the conduction loss. The line range is divided into three regions, and FSBB operates at boost, buck–boost, and buck modes in the lower, medium, and higher input voltage regions, respectively. At buck and boost modes, only two switches are high-frequency switched, so that the total switching loss is reduced. In the buck–boost mode, the inductor current ripple is very low compared with other two modes. Hence, the switching frequency is lowered to reduce the switching loss. The 3-mode TEM can achieve high efficiency over the line range, which is verified by a 48-V (36–75 V) input, 48-V @ 6.25-A output prototype. The measured efficiency is higher than 96.5% over the line range and the efficiency at the nominal input voltage is 97.8%.      

Analysis and Design of a Novel Three-Phase AC–DC Buck-Boost Converter

This paper proposes a novel three-phase ac-dc buck-boost converter. The proposed converter uses four active switches, which are driven by only one control signal. This converter is operated in discontinuous conduction mode (DCM) by using the pulsewidth modulation (PWM) technique, and the control scheme very easily and simply achieves purely sinusoidal input current, high power factor, low total harmonic distortion of the input current and step-up/down output voltage. Also, the proposed converter provides a constant average current to the output capacitor and load in each switching period. Thus, the ripple component of sixth times line frequency will not appear in the output voltage. Therefore, a smaller output capacitor can be used in the proposed converter. Moreover, the steady-state analysis of voltage gain and boundary operating condition are presented. Also, the selections of inductor, output capacitor and input filter are depicted. Finally, a prototype circuit with simple control logic is implemented to illustrate the theoretical analysis.     

Novel Current-Mode AC/AC Converters With High-Frequency AC Link

A novel circuit-topology family of the current-mode AC/AC converter with high-frequency AC link, based on a Flyback converter, is proposed. These circuit topologies, which can transfer one unregulated sinusoidal voltage with high total harmonic distortion (THD) into another regulated constant-frequency sinusoidal voltage with low THD, are composed of input cycloconverter, high-frequency storage transformer, and output cycloconverter. The circuit-topology family includes single four-quadrant power switch mode, push-pull mode, half-bridge mode, and full-bridge mode circuits. The single four-quadrant power switch mode and push-pull mode converters are suitable for low input voltage fields, but the half-bridge mode and full-bridge mode converters are suitable for high input voltage fields. The operational mode, steady principle, and transient voltage feedback control strategy of the kind of converter are investigated. The output characteristic curve, its relation to internal resistance, and the design criteria for the key circuit parameters are given. The theoretical analysis and the test result of the 500 VA 220 V 15% 50 HzAC/220 V 50 HzAC prototype have shown that the converters have advantages such as high-frequency galvanic isolation, simple topology, two-stage power conversion [low frequency alternating current (LFAC)/high frequency alternating current (HFAC)/LFAC], bidirectional power flow, high efficiency, high power density, low THD of the output voltage, strong adaptability to various loads, higher line power factor, low audio noise, etc.     

Narrow Pulse Elimination PWM for Multilevel Digital Audio Power Amplifiers Using Two Cascaded H-Bridges as a Nine-Level Converter

This paper presents a methodology to reduce total harmonic distortion (THD) in digital audio power amplifiers, using two new approaches: 1) a multilevel converter made of two cascaded full-bridges, with suitable power supplies to operate as a nine-level hybrid type converter and 2) a new pulsewidth modulation (PWM) technique called narrow pulse elimination (NPE) PWM. The proposed nine-level converter uses only eight MOSFETs. Unlike conventional PWM, the NPE PWM does not generate excessively narrow pulses, so that power semiconductors nonideal delays and switching times are still negligible. Therefore, the nine-level output voltage THD, mostly introduced in the power stage, is strongly reduced. With the NPE technique, the resolution of the generated PWM is no longer limited by the switching speed of the output switches, but only by the frequency of digital processing circuit. Simulation and experimental results from a laboratory prototype are presented in order to show the effectiveness of the proposed approaches