System-level synthesis of multi-ASIP platforms using an uncertainty model

In this paper we propose a system-level synthesis for MPSoCs that integrates multiple Application Specific Instruction Set Processors (ASIPs). Each ASIP is customized for a specific set of tasks. The system-level synthesis is responsible for assigning the tasks to the ASIPs, exploring different platform alternatives. We can allocate tasks to the different ASIPs and determine if the applications are schedulable only knowing the worst-case execution time (WCET) of each task. We can estimate the WCET only after establishing the micro-architecture of the ASIP. At the same time, an ASIP micro-architecture can be derived only knowing the assignment of tasks to ASIP. To address this circular dependency, we propose an Uncertainty Model for the WCETs, which captures the performance of tasks running on a range of possible ASIP implementations. We propose a novel stochastic schedulability analysis to evaluate each multi-ASIP platform. We use an Evolutionary Algorithm-based approach to explore the design space of macro-architecture possibilities and we evaluate it using real case studies.     

基于自适应引导滤波的子带分解多尺度Retinex红外图像增强

利用引导滤波的边缘保持特性及梯度保持特性,提出一种基于自适应引导滤波的子带分解多尺度Retinex红外图像增强算法.首先利用自适应引导滤波对光照分量进行精确估计,生成光谱不重叠的Retinex子带,然后对各个子带进行自适应增强,最后将各个增强后的子带加权融合.实验证明,该算法可有效消除光晕现象及凸显红外图像细节.     

ASIP处理器的可重定位编译器的设计

可重定位的编译器对特定应用的指令集处理器ASIP(ApplicationSpecificInstructionProcessor)的设计至关重要。文章利用开源的ORC(OpenResearchCompiler)编译器框架,以提出的一种ASIP处理器的结构模型为目标,进行了其可重定位的编译器的设计。并在指令调度和寄存器分配阶段针对这种ASIP处理器的结构做了优化。实验结果表明,编译器具有很好的可重定位性,指令调度和寄存器分配的优化也获得了较好的效果。     

一种基于Retinex理论的图像增强算法

提出了一种基于Retinex理论的图像增强算法。Retinex理论的实质就是从图像S中抛开照射光L的影响来获得物体的反射性质R,即获得物体本来的面貌。在对Retinex理论进行研究的基础上,论述了该算法的原理和实现方法,并通过实验与几种传统的图像增强方法以及单尺度、多尺度和带彩色恢复的多尺度Retinex进行了比较,表明该算法对于图像阴影细节的增强和色彩的保真较一般的图像增强算法能够达到更好的效果。     

An investigation of Retinex algorithms for image enhancement

This letter introduces color constancy and Retinex theory for image enhancement.It clas- sifies Retinex algorithms into four categories and provides their principles and implementations in general.The experimental results of Frankle-McCann,MSR (Multi-Scale Retinex) and PNSD (Pro- jected Normalized Steepest Descent) Retinex algorithms are presented and compared.Moreover, variance and average gradient are proposed to evaluate the performance of the different algorithms.     

基于路径的Retinex算法在红外图像增强中的应用

为了方便红外目标的检测、识别等后续处理,针对传统红外图像增强算法存在的图像细节增强能力差,视觉效果模糊的问题,提出一种基于Retinex理论的红外图像增强算法.该算法利用固定路径获取反射分量的方法,对整体偏暗的红外图像目标进行增强处理.仿真结果表明,该方法比单尺度Retinex和多尺度Retinex算法更能增强红外图像的细节信息,有效改善虹外图像的视觉效果.     

尺度变化的Retinex红外图像增强

经典Retinex模型增强算法采用固定尺度高斯核平滑滤波,导致单一尺度Retinex无法进行全局有效增强,而多尺度Retinex权重系数选取困难,二者均不能满足视觉要求。针对以上问题,基于人眼视觉掩盖效应提出一种尺度变化高斯核平滑滤波的Retinex算法。首先利用人眼视觉掩盖效应的屏蔽函数检测像素邻域空间细节,依据像素区域细节信息丰富程度设计出尺度变化的高斯平滑滤波器,实现照度估计,最后对尺度变化高斯平滑滤波器实现提出实用方法。实验证明本文算法有效提高红外图像对比度,增强细节信息,在主观视觉效果和客观评价指标上整体优于修正对比度限制直方图均衡算法、单尺度Retinex、多尺度Retinex及平稳小波和Retinex增强算法。     

Analysis of BICM-ID Receivers Exploiting Transformations of Extrinsic Information

One of the key problems in the field of Computer Vision is recovering the geometry from multiple views of the same scene. Once the homography of two images is known, the motion of a stereo camera system can be determined, images can be rectified or image registration can be performed. A feature-based approach to determine the homography between two images bases on the extraction and matching of SIFT features (SIFT, Scale-Invariant Feature Transform). By extracting image features from varying images of one scene and finding corresponding image features in both images, the homography of the scene can be determined. The extraction of image features, which provide sufficient quality for computation of the homography of a scene, leads to an algorithm complexity, that prevents real-time applications on conventional CPUs. Therefore, we present and discuss an application-specific instruction-set extensions for a Tensilica Xtensa LX5 ASIP to accelerate a SIFT feature extraction (ASIP, Application-Specific Instruction-set Processor). In total, the complete SIFT feature extraction, executed on an extended processor is accelerated by a factor of x125 compared to the baseline processor. At the same time, the accuracy of the SIFT features is preserved. In addition, the proposed processor extensions maintain the full flexibility of an ASIP for a fast integration of further feature extractors.     

Application Domain Specific Embedded FPGAs for Flexible ISA-Extension of ASIPs

This paper presents a novel architecture combining an application specific instruction set processor (ASIP) core and an application domain specific embedded FPGAs (eFPGAs) used as flexible accelerator for the ASIP. The eFPGA is based on a parametrisable architecture template optimised for arithmetic oriented applications. It was designed as a physically optimised VLSI-macro using a flexible design methodology also sketched in this paper. Quantitative comparisons of the eFPGA with a commercial standard FPGA show significant improvements in energy, area and timing delays. Simulations of the new ASIP-eFPGA architecture have been conducted using a model based approach to evaluate its efficiency. The results show that power- and area-efficiencies similar to an FPGA can be achieved for the flexible ASIP-eFPGA while preserving the flexibility of a software programmable processor.     

FACE: Fine-tuned Architecture Codesign Environment for ASIP Development

High-performance, reliable, and robust products with a short development schedule are general design aims. FACE was developed to achieve these goals, including the organization of a design flow, a frequency-driven information analyzer, compiler techniques (code generator and instruction optimization), and a hierarchical object design library. This paper explores the design space of a retargetable compiler and a reconfigurable hardware, which combine both software and hardware reprogrammability. The environment, FACE, we have developed allows us to quickly move the functions between software and hardware in a state of flux. Finally, it generates the application specific integrated processor (ASIP) and a compiler for the new ASIP architecture. The case study is considered which demonstrates the efficiency in ASIP design of FACE.     

基于人眼视觉的红外图像增强算法研究

红外图像具有低对比度、噪声大、动态范围大以及视觉效果差等特点。传统的图像增强算法具有各自的局限性,处理后的视觉效果并不理想。为了改善红外图像的视觉效果,增强图像中目标的识别力,研究了基于人眼视觉特性的Retinex算法,结合红外图像的成像机制,将适用于可见光图像的Retinex增强算法应用于红外图像,取得了良好的视觉效果。在此基础上,对算法进行自适应改进,提出了AMSR算法。采用几种传统的图像增强算法和基于Retinex的算法对具有典型特性的红外图像进行增强处理,并计算客观评价指标。通过对实验结果的主观评价和客观指标分析,验证了AMSR增强算法对红外图像具有适用性和优越性。本文的研究工作对红外目标探测和识别具有重要的意义。     

A Novel Application-specific Instruction-set Processor Design Approach for Video Processing Acceleration

Application-specific instruction-set processors (ASIPs) provide a good alternative for video processing acceleration, but the productivity gap implied by such a new technology may prevent leveraging it fully. Video processing SoCs need flexibility that is not available in pure hardware architectures, while pure software solutions do not meet video processing performance constraints. Thus, ASIP design could offer a good tradeoff between performance and flexibility. Video processing algorithms are often characterized by intrinsic parallelism that can be accelerated by ASIP specialized instructions. In this paper, we propose a new approach for exploiting sequences of tightly coupled specialized instructions in ASIP design applicable to video processing. Our approach, which avoids costly data communications by applying data grouping and data reuse, consists of accelerating an algorithm’s critical loops by transforming them according to a new intermediate representation. This representation is optimized and loop parallelism possibilities are also explored. This approach has been applied to video processing algorithms such as the ELA deinterlacer and the 2D-DCT. Experimental results show speedups up to 18 (on the considered applications, while the hardware overhead in terms of additional logic gates was found to be between 18 and 59%.     

基于暗原色先验模型的Retinex算法

 现有雾天图像增强的Retinex算法采用固定滤波器,无法适应多种景深和雾化程度的情况.对此,本文提出一种基于暗原色先验模型的Retinex算法.暗原色先验模型反映了雾天图像中雾的分布与景深信息.受此启发,根据局部区域暗原色值设计一种尺度可变滤波器,针对不同景深和雾化区域采用不同尺度的滤波器估算雾天图像的照度分量,实现对雾天图像的增强.分别使用主观观察和客观数据分析方法,将本文算法与HE算法、固定尺度MSR算法进行对比,本文算法在细节增强以及图像整体效果上均优于HE算法和固定尺度MSR算法.     

高性能PLC专用指令集处理器设计与仿真

该高性能PLC专用指令集处理器采用自主设计的PLC专用指令集,符合PLC指令特征,可减少该PLC专用指令集处理器执行的指令数,并采用32位RISC体系结构加快PLC程序的执行速度.该高性能PLC专用指令集处理器采用哈佛总线结构,寄存器组采用位编址模式,位处理器可加速PLC布尔运算,功能块单元可提高功能块指令执行的精度,并采用四级流水线提高PLC指令的执行速度.现已完成了该高性能PLC专用指令集处理器的系统功能仿真,经测试仿真结果正确.     

专用指令集处理器系统级设计方法

以专用指令集处理器（ASIP）为核心的SoC系统是基于特定应用，设计嵌入式处理器的一个重要发展方向。给出了一种高效的系统级指令集模型设计空间搜索和体系结构仿真的方法。该方法可以在设计的早期阶段对软件和硬件进行协同设计和仿真，针对应用优化系统性能。利用该方法成功设计的ASIP系统，完成基4-64点DIF FFT需要310个时钟周期。     

Variational Retinex model based on an extension of TV regularization with relative gradient and its application

In view of the shortcomings of the total variational Retinex model which use the total variation (TV) of the reflection as the regularization.An extension of TV regularization with the concept of relative gradient was introduced and finally a new variational Retinex model was proposed.Compared with variational Retinex and total variational Retinex model,the proposed model can preserve the estimated reflectance with more details as well as the more smoothed illumination.Further,a new integrated image enhancement model considering both the illumination and the reflectance was proposed.By adjusting the model parameters,the proposed model can be effectively applied to high dynamic range image tone mapping and non-uniform illumination enhancement.Compared with other algorithms,the proposed model can better handle the above image enhancement problems.     

Random spray Retinex: a new Retinex implementation to investigate the local properties of the model.

In order to investigate the local filtering behavior of the Retinex model, we propose a new implementation in which paths are replaced by 2-D pixel sprays, hence the name "random spray Retinex." A peculiar feature of this implementation is the way its parameters can be controlled to perform spatial investigation. The parameters' tuning is accomplished by an unsupervised method based on quantitative measures. This procedure has been validated via user panel tests. Furthermore, the spray approach has faster performances than the path-wise one. Tests and results are presented and discussed.     

Retinex based visual identicalness detection for videos corrupted by imaging noise

Detecting the visually identical regions among successive frames for noisy videos, called visual identicalness detection (VID) in this paper, is a fundamental tool in video applications for lower power consumption and higher efficiency. In this paper, instead of performing VID on the original video signal or on the de-noised video signal, a Retinex based VID approach is proposed to perform VID on the Retinex signal to eliminate the noise influence introduced by imaging system. Several Retinex output generation approaches are compared, within which the proposed Cohen–Daubechies–Feauveau wavelet based approach is demonstrated to have better efficiency in detection and higher adaptability to the video content and noise severity. Compared with approaches performing detection in the de-noised images, the proposed algorithm presents up to 4.78 times higher detection rate for the videos with moving objects and up to 30.79 times higher detection rate for the videos with static scenes, respectively, at the same error rate. Also, an application of this technique is provided by integrating it into an H.264/AVC video encoder. Compared with compressing the de-noised videos using the existing fast algorithm, an average of 1.7 dB performance improvement is achieved with up to 5.47 times higher encoding speed. Relative to the reference encoder, up to 32.47 times higher encoding speed is achieved without sacrificing the subjective quality.