三值电路和电路三要素理论

本文基于四值代数,提出三值电路的统一理论－电路三要素（信号,网络和负载）理论,该理论表明,门民开关级电路间,开关级电路结构间,动态与静态电路间存在简单的转换关系,依照这个关系很容易由三值函数式设计出三值电路,尤其能基于一个电路方程同时推出三值动态和静态电路。     

电路短要素理论和布尔代数失效原因分析

本文提出一个克服布尔代数失效的电路短要素理论。言语中首先分析布尔代数在数字电路中失峁的原因,接着证明开关运算定理等,它概括了文献中曾需一一证明的绝大多数开关运算等式,然后表明;数字电路的统一性暨存在于六级和元件级电路间,也存在于各型元件级电路结构间,以及动态与静态电路间,此外,本语文提出元件级电路垢卡诺图方法代数方法。     

电路三要素理论和布尔代数失效原因分析

本文提出一个克服布尔代数失效的电路三要素理论。文中首先分析布尔代数在数字电路中失效的原因,接着证明开关运算定理等,它概括了文献中曾需一一证明的绝大多数开关运算等式,然后表明:数字电路的统一性既存在于门级和元件级电路间,也存在于各型元件级电路结构间,以及动态与静态电路间。此外,本文提出元件级电路设计的卡诺图方法和代数方法。     

三值动态和静态广义时序机理论

该文在三值电路三要素理论的基础上提出了三值动态和静态广义时序机理论。首先找出三值状态图和电路方程间的关系,该关系既适用于静态电路,又适用于动态电路。对静态电路文中推导出各型三值触发器完整特性方程,它描述了触发器全时刻的行为,用以代替常规特性方程,使三值同步和异步时序电路统一。对动态电路该文用电容代替触发器存储三值信息,实现三值动态时序电路(特别是三值同步动态时序电路,属于非触发器式的时序电路)。因动态电路和静态电路主要差别是负载行为,故此可以在三值电路三要素理论和广义时序机理论下统一三值动态和静态,同步和异步时序电路。     

对称传输电流开关理论与对称三值电流型CMOS算术电路

本文应用开关－信号理论建立了基于对称三值逻辑适用于对称三值电流型ＣＭＯＳ电路开关级设计的对称传输电流开关理论。     

三值绝热多米诺文字运算电路开关级设计

通过对绝热多米诺电路和多值电路的研究,提出一种新颖的低功耗三值文字运算电路的开关级设计方案。该方案首先通过开关—信号理论推导出逻辑0和2的文字运算电路开关级结构式及电路;然后利用三种文字运算之间互斥与互补的约束关系得到逻辑1的文字运算输出信号,同时通过波形转换电路使电路的输出转换为较规则的缓变梯形波;最后利用Spice软件对所设计的电路进行仿真,结果显示所设计的三值绝热多米诺文字运算电路具有正确的逻辑功能,与常规多米诺三值文字运算电路相比,能耗节省约39%。     

动态时序电路和广义时序机

本文基于用广义输入信号表示的广义时序机，研究动态时序电路，考虑电容负载时得出动态单元电路特征方程，利用电容存储信息和触发器的类似性，建立了时序电路统一理论，将常规时序电路和动态时序电路理论统一起来，证明实现动态时序电路的条件，结合实例论述各型动态时序电路，伪动态时序电路和静态时序电路的开关级结构间的等价转换。     

基于开关信号理论的四值ECL电路

从一个有效的多值代数系统应能反映多值电路中的物理过程的这一原则出发,本文提出了一组可以描写多值ECL电路中信号与开关元件间相互作用的运算。讨论了这些运算的物理对应及有关性质,并由此建立了适用于ECL电路的开关信号理论。本文设计了若干基本四值ECL电路,用SPICE程序模拟证明了它们均具有正确的逻辑功能与理想的DC特性。     

三值绝热多米诺加法器开关级设计

通过对绝热多米诺电路和加法器的研究,该文提出一种新颖低功耗三值加法器的开关级设计方案。该方案首先利用开关-信号理论,结合绝热多米诺电路结构特点,推导出三值加法器本位和电路与进位电路的开关级结构式,由此得到一位三值加法器单元电路;然后通过单元电路的级联得到四位三值绝热多米诺加法器;最后,利用Spice软件对所设计的电路进行模拟,结果显示所设计的四位三值绝热多米诺加法器具有正确的逻辑功能,与四位常规多米诺三值加法器相比,能耗节省约61%。     

基于传输开关理论的电流型多值CMOS电路设计

本文以开关信号理论为指导，对电流型CMOS电路中开关变量和信号变量的相互作用进行了分析，并引入了适用于CMOS电路的电流开关理论。基于电流传输开关理论，对几类重要的三值CMOS电路进行了设计，结果表明，应用该理论能获得简单的电路设计。从而进一步完善了开关级逻辑电路设计的研究。     

Theory of differential current switches and logic design of ternary ECL circuits at switch level

Starting from the viewpoint that the switch states and signal values in a digital circuit should be described separately by two different kinds of variable, the interaction between the switching element and signal in multi-valued ECL circuits is analysed and two types of connection operations, threshold switching operation and current switching operation, are proposed. The properties and circuit realizations of these new operations are discussed and the theory of differential current switches applicable to ECL circuits is established. Examples of basic ternary ECL circuits confirm that this theory can effectively guide the logic design of ternary ECL circuits at switch level. The circuits are verified by using the SPICE II program. They have the same logic level difference and transient characteristic as binary ECL circuits. Since the multi-valued ECL circuit uses only one set of power supply and can set several threshold values by using reference levels, it can be fabricated using conventional ECL techniques and is compatible with binary ECL circuits.     

DESIGN OF TERNARY CURRENT-MODE CMOS CIRCUITS BASED ON SWITCH-SIGNAL THEORY

By applying switch-signal theory, the interaction between MOS transmission switch-ing transistor and current signal in current-mode CMOS circuits is analyzed, and the theory oftransmission current-switches which is suitable to current-mode CMOS circuits is proposed. Thecircuits, such as ternary full-adder etc., designed by using this theory have simpler circuit struc-tures and correct logic functions. It is confirmed that this theory is efficient in guiding the logicdesign of current-mode CMOS circuits at switch level.     

Floating-body effects in partially depleted SOI CMOS circuits

This paper presents a detailed study on the impact of a floating body in partially depleted (PD) silicon-on-insulator (SOI) MOSFET's on various CMOS circuits. Digital very large scale integration (VLSI) CMOS circuit families including static and dynamic CMOS logic, static cascade voltage switch logic (static CVSL), and dynamic cascade voltage switch logic (dynamic CVSL) are investigated with particular emphasis on circuit topologies where the parasitic bipolar effect resulting from the floating body affects the circuit operation and stability. Commonly used circuit building blocks for fast arithmetic operations in processor data-flow, such as static and dynamic carry lookahead circuits and Manchester carry chains, are examined. Pass-transistor-based designs including latch, multiplexer, and pseudo two-phase dynamic logic are then discussed. It is shown that under certain circuit topologies and switching patterns, the parasitic bipolar effect causes extra power consumption and degrades the noise margin and stability of the circuits. In certain dynamic circuits, the parasitic bipolar effect is shown to cause logic state error if not properly accounted for     

Design of ternary clocked adiabatic static random access memory

Based on multi-valued logic,adiabatic circuits and the structure of ternary static random access memory (SRAM),a design scheme of a novel ternary clocked adiabatic SRAM is presented.The scheme adopts bootstrapped NMOS transistors,and an address decoder,a storage cell and a sense amplifier are charged and discharged in the adiabatic way,so the charges stored in the large switch capacitance of word lines,bit lines and the address decoder can be effectively restored to achieve energy recovery during reading and writing of ternary signals.The PSPICE simulation results indicate that the ternary clocked adiabatic SRAM has a correct logic function and low power consumption.Compared with ternary conventional SRAM,the average power consumption of the ternary adiabatic SRAM saves up to 68%in the same conditions.     

基于开关信号理论的控阈技术与三值ECL施密特电路

基于开关信号理论，本文对ＥＣＬ电路中的阈值控制进行了研究，建立了用于描述旋密特电路中阈值可控开关工作过程听数学表示式。在此基础上设计了具有二次跳阈反应的三值ＥＣＬ旋密特电路。对所设计电路的ＰＳＰＩＣＥ模拟表明它具有理想的施密特电路特性。