Monolithic Integration of a Multiplexer/Demultiplexer With a Thermo-Optic VOA Array on an SOI Platform

In this letter, a nine-channel 100-GHz arrayed waveguide grating multiplexer/demultiplexer is monolithically integrated with a Mach–Zehnder interferometer thermo-optic variable optical attenuators (VOAs) arrayed on a silicon-on-insulator platform. The on-chip transmission loss is $sim$6 dB and the crosstalk is less than $-$25 dB for the transverse-electric mode. The maximum modulation depths of different thermo-optic VOAs are similar, $sim$ 15 dB with 2.7-V bias. The frequency response of our device is fast ($geq$ 100 kHz) for thermo-optic effect devices. The maximum power consumption of a single VOA is less than 35 mW.      

Delta-Sigma Modulation for Direct Digital Frequency Synthesis

This paper compares different $DeltaSigma$ modulation techniques for direct digital frequency synthesis (DDS). $DeltaSigma$ modulators such as MASH, feedforward, feedback, and error feedback have been implemented in both the phase and frequency domains in a CMOS DDS prototype IC fabricated in a 0.35-$mu$m CMOS technology with core area of $1.7times 2.1 {hbox {mm}}^{2}$ and total current consumption of 75 mA. Measured DDS performance demonstrates that the frequency domain $DeltaSigma$ modulation technique achieves better output spectrum purity than the phase domain method. Moreover, a programmable feedforward $DeltaSigma$ modulator is proposed to achieve different in-band and out-band noise shaping effects for DDS applications.      

Pulsed $I_{d}$– $V_{g}$ Methodology and Its Application to Electron-Trapping Characterization and Defect Density Profiling

The pulsed current–voltage ($I$– $V$) measurement technique with pulse times ranging from $sim$17 ns to $sim$ 6 ms was employed to study the effect of fast transient charging on the threshold voltage shift $Delta V_{t}$ of MOSFETs. The extracted $Delta V_{t}$ values are found to be strongly dependent on the band bending of the dielectric stack defined by the high-$kappa$ and interfacial layer dielectric constants and thicknesses, as well as applied voltages. Various hafnium-based gate stacks were found to exhibit a similar trap density profile.      

Schottky Barrier Height Modulation of Nickel–Dysprosium-Alloy Germanosilicide Contacts for Strained P-FinFETs

This letter reports on the fabrication and hole Schottky barrier $(Phi_{ rm B}^{rm p})$ modulation of a novel nickel (Ni)–dysprosium (Dy)-alloy germanosilicide (NiDySiGe) on silicon–germanium (SiGe). Aluminum (Al) implant is utilized to lower the $Phi_{rm B}^{rm p}$ of NiDySiGe from $sim$0.5 to $sim$ 0.12 eV, with a correspondingly increasing Al dose in the range of $ hbox{0}$–$hbox{2}timeshbox{10}^{15} hbox{atoms}/ hbox{cm}^{2}$. When integrated as the contact silicide in p-FinFETs (with SiGe source/drain), NiDySiGe with an Al implant dose of $hbox{2}timeshbox{10}^{14} hbox{atoms}/ hbox{cm}^{2}$ leads to 32% enhancement in $I_{rm DSAT}$ over p-FinFETs with conventional NiSiGe contacts. Ni–Dy-alloy silicide is a promising single silicide solution for series-resistance reduction in CMOS FinFETs.      

Effect of Hole-Trap Distribution on the Power-Law Time Exponent of NBTI

This letter presents a phenomenological relationship between the energy distribution of stress-induced hole traps and the power-law time exponent of NBTI. Experimental results show that increased generation of deep-level hole traps (DLHTs), i.e., trap-energy levels are near and/or above the Si conduction-band edge, yields a small exponent ($≪hbox{0.2}$). Annealing the DLHTs results in the exponent increasing to $sim$0.3. Measurement on the n-MOSFET (in which the effect of DLHTs is suppressed) shows an exponent of $sim$ 0.4–0.5 for interface-state generation. This implies that the relatively small exponent ( $sim$0.3) of the p-MOSFET is due to remnant DLHTs which charge-up positively again when subjected to negative gate biasing during measurement. This new insight calls for a reexamination of the notion that as-measured exponents of $sim$ 0.14–0.17 are experimental proof of $hbox{H}_{2}$ -diffusion-driven interface-state generation.      

Controlled Transfer of Single Rolled-Up InGaAs–GaAs Quantum-Dot Microtube Ring Resonators Using Optical Fiber Abrupt Tapers

We report on the controlled transfer of single rolled-up semiconductor microtube-based optical cavities from their host substrate to a foreign one. Such microtube devices, with diameters of $sim$5 $muhbox{m}$, wall thicknesses of $sim$50 nm, and lengths of $>$100 $muhbox{m}$, are fabricated by selectively releasing a coherently strained InGaAs–GaAs quantum-dot layer from the handling GaAs substrate. With the use of fiber abrupt tapers inserted into two ends of the tubes, rolled-up microtubes are lifted off from the substrate and subsequently transferred, with a precisely controlled position, onto the cleaved facet of a single-mode fiber. The resulting devices exhibit strong coherent emission at room temperature and may lead to integrated micro- and nanoscale lasers with greatly simplified packaging.      

An FIR-Embedded Noise Filtering Method for $Delta Sigma$ Fractional-N PLL Clock Generators

This paper describes a noise filtering method for $Delta Sigma$ fractional- $N$ PLL clock generators to reduce out-of-band phase noise and improve short-term jitter performance. Use of a low-cost ring VCO mandates a wideband PLL design and complicates filtering out high-frequency quantization noise from the $Delta Sigma$ modulator. A hybrid finite impulse response (FIR) filtering technique based on a semidigital approach enables low-OSR $Delta Sigma$ modulation with robust quantization noise reduction despite circuit mismatch and nonlinearity. A prototype 1-GHz $Delta Sigma$ fractional-$N$ PLL is implemented in 0.18 $muhbox{m}$ CMOS. Experimental results show that the proposed semidigital method effectively suppresses the out-of-band quantization noise, resulting in nearly 30% reduction in short-term jitter.      

Demonstration of Tunneling FETs Based on Highly Scalable Vertical Silicon Nanowires

This letter demonstrates a vertical silicon-nanowire (SiNW)-based tunneling field-effect transistor (TFET) using CMOS-compatible technology. With a $hbox{Si} hbox{p}^{+}{-}hbox{i}{-} hbox{n}^{+}$ tunneling junction, the TFET with a gate length of $sim$200 nm exhibits good subthreshold swing of $sim$ 70 mV/dec, superior drain-induced-barrier-lowering of $sim$ 17 mV/V, and excellent $I_{rm on} {-} I_{rm off}$ ratio of $sim!!hbox{10}^{7}$ with a low $I_{rm off} (sim!!hbox{7} hbox{pA}/muhbox{m})$. The obtained 53 $muhbox{A}/muhbox{m} I_{rm on}$ can be further enhanced with heterostructures at the tunneling interface. The vertical SiNW-based TFET is proposed to be an excellent candidate for ultralow power and high-density applications.      

Impacts of $hbox{N}_{2}$ and $hbox{NH}_{3}$ Plasma Surface Treatments on High-Performance LTPS-TFT With High-$kappa$ Gate Dielectric

Low-temperature polycrystalline-silicon thin-film transistors (LTPS-TFTs) with high- $kappa$ gate dielectrics and plasma surface treatments are demonstrated for the first time. Significant field-effect mobility $mu_{rm FE}$ improvements of $sim$86.0% and 112.5% are observed for LTPS-TFTs with $hbox{HfO}_{2}$ gate dielectric after $hbox{N}_{2}$ and $ hbox{NH}_{3}$ plasma surface treatments, respectively. In addition, the $hbox{N}_{2}$ and $ hbox{NH}_{3}$ plasma surface treatments can also reduce surface roughness scattering to enhance the field-effect mobility $mu_{rm FE}$ at high gate bias voltage $V_{G}$, resulting in 217.0% and 219.6% improvements in driving current, respectively. As a result, high-performance LTPS-TFT with low threshold voltage $V_{rm TH} sim hbox{0.33} hbox{V}$, excellent subthreshold swing S.S. $sim$0.156 V/decade, and high field-effect mobility $mu_{rm FE} sim hbox{62.02} hbox{cm}^{2}/hbox{V} cdot hbox{s}$ would be suitable for the application of system-on-panel.      

Compact In-Fiber Interferometer Formed by Long-Period Gratings in Photonic Crystal Fiber

We reported the design and implementation of an in-fiber Mach–Zehnder interferometer (MZI) based on a pair of long-period gratings (LPGs) written on a photonic crystal fiber (PCF). The LPG was fabricated by using a pulsed CO$_{2}$ laser to carve grooves periodically along the PCF. The MZI relies on the interference between the fundamental core mode and a cladding mode of the PCF. The MZI was further demonstrated as a temperature sensor and a strain sensor. The temperature and strain sensitivities were measured to be 42.4 pm/$^{circ}hbox{C}cdot hbox{m}$ and $-$ 2.6 pm/$mu varepsilon $, respectively. We also fabricated an MZI on a single-mode fiber, which has a temperature sensitivity of 1215.56 pm/( $^{circ}hbox{C}cdot hbox{m}$) and a strain sensitivity of $+$ 0.445 pm/$mu varepsilon $.      

Ultracompact Intrinsic Micro Air-Cavity Fiber Mach–Zehnder Interferometer

A compact intrinsic fiber Mach–Zehnder interferometer (MZI) is proposed and experimentally demonstrated by incorporating a micro air-cavity ablated by femtosecond laser irradiation. A short cavity of length $sim$10 $muhbox{m}$ along the single-mode fiber core provided two optical paths: one propagating through the air and the other guided along the ring-shaped silica cladding. A spectral analysis confirmed MZI in a good agreement with experimental results. Temperature-dependent spectral shifts were measured and analyzed.      

Fast Low-Cost Implementation of Single-Clock-Cycle Binary Comparator

This paper presents a new efficient architecture for the design of fast low-cost single-clock-cycle binary comparators. The proposed 64-bit circuit requires only 1051 transistors and, when implemented by using the ST 90-nm 1-V CMOS technology, it exhibits a running frequency higher than 4 GHz with an average power dissipation of only $sim$ 4 mW. Comparison with the fastest comparator known in the literature demonstrates that, at a parity of technology used, the novel architecture is $sim$12% faster and requires $sim$ 69% less transistors.      

A Hybrid Spur Compensation Technique for Finite-Modulo Fractional-N Phase-Locked Loops

A finite-modulo fractional-$N$ PLL utilizing a low-bit high-order $DeltaSigma$ modulator is presented. A 4-bit fourth-order $DeltaSigma$ modulator not only performs non-dithered 16-modulo fractional-$N$ operation but also offers less spur generation with negligible quantization noise. Further spur reduction is achieved by charge compensation in the voltage domain and phase interpolation in the time domain, which significantly relaxes the dynamic range requirement of the charge pump compensation current. A 1.8–2.6 GHz fractional-$N$ PLL is implemented in 0.18 $mu{hbox {m}}$ CMOS. By employing high-order deterministic $DeltaSigma$ modulation and hybrid spur compensation, the spur level of less than $-$55 dBc is achieved when the ratio of the bandwidth to minimum frequency resolution is set to 1/4. The prototype PLL consumes 35.3 mW in which only 2.7 mW is consumed by the digital modulator and compensation circuits.      

High Conversion Efficiency InP/InGaAs Strained Quantum Well Infrared Photodetector Focal Plane Array With 9.7 $mu$m Cut-Off for High-Speed Thermal Imaging

InP/InGaAs material system is an alternative to AlGaAs/GaAs for long wavelength quantum well infrared photodetectors (QWIPs). We demonstrate a large format (640 $times$ 512) QWIP focal plane array (FPA) constructed with the strained InP/InGaAs material system. The strain introduced to the structure through utilization of $hbox{In}_{0.48}hbox{Ga}_{0.52}hbox{As}$ (instead of $hbox{In}_{0.53}hbox{Ga}_{0.47}hbox{As}$ ) as the quantum well material shifts the cut-off wavelength from $sim$8.5 to 9.7 $muhbox{m}$. The FPA fabricated with the 40-well epilayer structure yields a peak quantum efficiency as high as 12% with a broad spectral response $(Deltalambda/lambda_{rm p}=17%)$. The peak responsivity of the FPA pixels is 1.4 A/W corresponding to 20% conversion efficiency in the bias region where the detectivity is reasonably high ($2.6times 10^{10} hbox{cmHz}^{1/2}/hbox{W}$ , f/1.5, 65 K). The FPA providing a background limited performance temperature higher than 65 K (f/1.5) satisfies the requirements of most low integration time/low background applications where AlGaAs/GaAs QWIPs suffer from read-out circuit noise limited sensitivity due to lower conversion efficiencies. Noise equivalent temperature differences of the FPA are as low as 19 and 40 mK with integration times as short as 1.8 ms and 430 $muhbox{s}$ (f/1.5, 65 K).      

Cubic-Structured $hbox{HfO}_{2}$ With Optimized Doping of Lanthanum for Higher Dielectric Constant

It is demonstrated that $hbox{HfO}_{2}$ films can have much higher dielectric-constant values than the usual reported value of 20–24 by optimized incorporation of lanthanum element and crystallization to cubic structure. When $hbox{HfO}_{2}$ with 8% La is crystallized into cubic structure, the film exhibits the $kappa$ value of $sim$ 38 which is the highest among ever reported $hbox{HfO}_{2}$ -based high-$kappa$ dielectrics. The increased $kappa$ value of $ hbox{HfO}_{2}$ with 8% La enables the leakage current to be reduced more than one order of magnitude lower, compared to amorphous-phase $hbox{HfO}_{2}$ under the same electric field. The dependence of film thickness and annealing temperature on the cubic crystallization is also reported.      

$hbox{TiN/ZrO}_{2}$/Ti/Al Metal–Insulator–Metal Capacitors With Subnanometer CET Using ALD-Deposited $hbox{ZrO}_{2}$ for DRAM Applications

We provide the first report of the structural and electrical properties of $hbox{TiN/ZrO}_{2}$/Ti/Al metal–insulator–metal capacitor structures, where the $hbox{ZrO}_{2}$ thin film (7–8 nm) is deposited by ALD using the new zirconium precursor ZrD-04, also known as Bis(methylcyclopentadienyl) methoxymethyl. Measured capacitance–voltage ($C$– $V$) and current–voltage ( $I$–$V$) characteristics are reported for premetallization rapid thermal annealing (RTP) in $hbox{N}_{2}$ for 60 s at 400 $^{circ}hbox{C}$, 500 $^{circ}hbox{C}$, or 600 $^{ circ}hbox{C}$. For the RTP at 400 $^{circ}hbox{C}$ , we find very low leakage current densities on the order of nanoamperes per square centimeter at a gate voltage of 1 V and low capacitance equivalent thickness values of $sim$ 0.9 nm at a gate voltage of 0 V. The dielectric constant of $ hbox{ZrO}_{2}$ is 31 $pm$ 2 after RTP treatment at 400 $^{circ}hbox{C}$.      

Waveguided Ge/Si Avalanche Photodiode With Separate Vertical SEG-Ge Absorption, Lateral Si Charge, and Multiplication Configuration

A novel Si-waveguide-integrated Ge/Si avalanche photodiode (APD) is demonstrated for the first time, in which light propagating along the Si waveguide is evanescently absorbed by an overlaying Ge layer selectively grown on it, whereas the avalanche multiplication of photoexcited carriers occurs laterally in the Si-waveguide layer. The APD provides a responsivity of $sim$7.2 A/W at 1550 nm, which is $sim$26 times larger than the corresponding vertical Ge/Si p-i-n photodiode, and exhibits a 3-dB bandwidth of $sim$3.3 GHz, a dark current of $sim!hbox{22} muhbox{A}$ at 22-V bias, and an excess noise factor of $sim$4, respectively.      

Temperature-Insensitive Micro Fabry–PÉrot Strain Sensor Fabricated by Chemically Etching Er-Doped Fiber

Micro extrinsic Fabry–PÉrot interferometric (MEFPI) sensors are fabricated by chemically etching Er-doped fibers with mixed hydrochloric (HCl) and hydrofluoric (HF) acid and fusion splicing. Compared with MEFPI sensors fabricated by etched single-mode fibers, the sensor performance is greatly improved by the chemical reaction between HCl acid and doped ${hbox {Er}}_{2}hbox{O}_{3}$ . A maximum visibility of $sim$ 24 dB is obtained, comparable to that of MEFPI sensors fabricated by excimer lasers. Our MEFPI sensor has high mechanical strength as the etching rate difference between fiber core and cladding is enlarged. Preliminary results indicate that this kind of sensor is insensitive to temperature while highly sensitive to strain, with sensitivities of $sim$0.65 $hbox{pm}/^{circ}hbox{C}$ and $sim$3.15 $hbox{pm}/muvarepsilon$ , respectively.      

Fabrication and Characterization of Fused Microfiber Resonators

We fabricate a 2.6-mm-diameter loop resonator from a tapered, step-index silica fiber of thickness $sim$ 7.2 $mu$ m. The resonator has a coupling region that is fused with a CO$_{2}$ laser for reducing structural instabilities and improving the overall stability of the device. We experimentally demonstrate optical resonances with a $Q$-factor ${ge}$25 000 at a free-spectral range of 0.19 nm.      

Novel NiGe MSM Photodetector Featuring Asymmetrical Schottky Barriers Using Sulfur Co-Implantation and Segregation

We report the first demonstration of a novel germanium (Ge) metal–semiconductor–metal (MSM) photodetector featuring asymmetrical Schottky-barrier height for low dark current and high-speed photodetection applications. Through co-implantation and segregation of valence-mending adsorbate such as sulfur at the NiGe/Ge interface, the germanide Fermi level can be pinned close to the conduction band edge. This results in an effective modulation of hole Schottky-barrier height, leading to a significant dark current suppression by $≫$3 orders of magnitude over a conventional MSM photodetector. When operated at a bias voltage $V_{A}$ of 1.0 V, a detector with an area of 804 $muhbox{m}^{2}$ shows a spectrum response of $sim$0.36 A/W or a corresponding quantum efficiency of $sim$34%. In addition, a frequency response measurement reveals the achievement of a $-$3-dB bandwidth of $sim!$15 GHz at an illumination photon wavelength of 1550 nm.