Multipartite Secret Sharing by Bivariate Interpolation

Given a set of participants that is partitioned into distinct compartments, a multipartite access structure is an access structure that does not distinguish between participants belonging to the same compartment. We examine here three types of such access structures: two that were studied before, compartmented access structures and hierarchical threshold access structures, and a new type of compartmented access structures that we present herein. We design ideal perfect secret sharing schemes for these types of access structures that are based on bivariate interpolation. The secret sharing schemes for the two types of compartmented access structures are based on bivariate Lagrange interpolation with data on parallel lines. The secret sharing scheme for the hierarchical threshold access structures is based on bivariate Lagrange interpolation with data on lines in general position. The main novelty of this paper is the introduction of bivariate Lagrange interpolation and its potential power in designing schemes for multipartite settings, as different compartments may be associated with different lines or curves in the plane. In particular, we show that the introduction of a second dimension may create the same hierarchical effect as polynomial derivatives and Birkhoff interpolation were shown to do in Tassa (J. Cryptol. 20:237–264, 2007). A preliminary version of this paper appeared in The Proceedings of ICALP 2006.     

对搜索引擎中评分方法的研究

针对搜索引擎评分较为困难的问题,文中提出了一种评分方法.该方法使用协同过滤技术,在同一兴趣组中各用户所提供的搜索结果集的基础上,采用文中提出的并行关联规则算法对各用户的局部有向图进行预处理,找出兴趣组中各成员都感兴趣的页面.然后对这些页面的内容和超链接附近出现的文本以及链接结构进行分析.计算权威页面和引导页面,以找到虽不包括在检索结果中,但相关的页面.此外,在对所获得的页面进行评价时,除考虑Web页自身的链接结构和兴趣组中查询用户对页面的评价,还考虑兴趣组中其它成员对页面的评价和所有成员对页面的使用情况等因素,从而使推荐给用户的页面排序更加合理.     

Highly effective junction isolation structures for PICs based on standard CMOS Process

This paper presents novel and highly effective junction isolation structures for power integrated circuits. The negative feedback-activated junction isolation is presented and it is proven to be very effective in blocking substrate current from reaching the logic circuitry (orders of magnitude more effective than standard junction isolation techniques). Additionally, in an attempt to further improve the blocking capabilities of junction isolations the use of multiple or combined structures is investigated whilst keeping the surface area used for isolation device in the same range as for the single structures. All isolation structures presented here are based on a 0.6-/spl mu/m CMOS technology.     

三种手机扬声器腔体设计的频率响应分析

运用等效线路图法研究了3种典型的声学结构对手机扬声器的频响特性的影响,并加以实验验证。通过与相同容积的简单结构的频响特性比较,分析了这三种结构各自的优缺点,并提出了设计建议。     

The characteristic studies of VMOS and UMOS

Under the same process conditions in the conventional diffusion and anisotropic etching technology, short channel MOST with V-shape and U-shape arc fabricated under the same substrate conditions by the standard photolithographical technology. The short channel effect in which the threshold voltage and transconductance vary with the channel length is measured for both VMOS and UMOS structures. Detailed comparisons between both structures are made, and a simple physical interpretation is given     

Modeling of SOI-MOS capacitors C-V behavior: partially- andfully-depleted cases

A model is presented for the C-V characteristics of partially-depleted (PD) and fully-depleted (FD) SOI-MOS capacitors. The proposed model is flexible, allowing introduction of all types of nonidealities typical to MOS type structures. New formulae for the low- and high-frequency capacitances of these structures are derived. Due to the various charges stored in these structures, unusual and more complex C-V curves are obtained. C-V curves where interface-state densities have been individually introduced (one at a time) at all three SiO₂-Si interfaces of the SOI-MOS-C are also demonstrated. The model has been validated by fitting the predicted HF C-V curves for SOI-MOS-C and its inherent structure, the SIS capacitor, to the experimental data. The extracted electrophysical parameters of the studied structures, for both PD and FD cases, are very close, if not the same as the values determined during their fabrication     

Hardware-Efficient Systolic-Like Modular Design for Two-Dimensional Discrete Wavelet Transform

A systolic-like modular architecture is presented for hardware-efficient implementation of two-dimensional (2-D) discrete wavelet transform (DWT). The overall computation is decomposed into two distinct stages; where column processing is performed in stage-1, while row processing is performed in stage-2. Using a new data-access scheme and a novel folding technique, the computation of both the stages are performed concurrently for transposition-free implementation of 2-D DWT. The proposed design can offer nearly the same throughput rate, and requires the same or less the number of adders and multipliers as the best of the existing structures. The storage space is found to occupy most of the area in the existing 2-D DWT structures but the proposed structure does not require any on-chip or off-chip storage of input samples or storage/transposition of intermediate output. The proposed one, therefore, involves considerably less hardware complexity compared with the existing structures. Apart from that, it has less duration of cycle period in comparison to the existing structures, and has a latency of cycles while all the existing structures have latency of cycles, the filter order being small compared to the input size .     

Design and performance of adaptive systems based on structured stochastic optimization strategies

The theory and design of linear adaptive filters based on FIR filter structures is well developed and widely applied in practice. However, the same is not true for more general classes of adaptive systems such as linear infinite impulse response adaptive filters (MR) and nonlinear adaptive systems. This situation results because both linear IIR structures and nonlinear structures tend to produce multi-modal error surfaces for which stochastic gradient optimization strategies may fail to reach the global minimum. After briefly discussing the state of the art in linear adaptive filtering, the attention of this paper is turned to MR and nonlinear adaptive systems for potential use in echo cancellation, channel equalization, acoustic channel modeling, nonlinear prediction, and nonlinear system identification. Structured stochastic optimization algorithms that are effective on multimodal error surfaces are then introduced, with particular attention to the particle swarm optimization (PSO) technique. The PSO algorithm is demonstrated on some representative IIR and nonlinear filter structures, and both performance and computational complexity are analyzed for these types of nonlinear systems.     

Structure-enhanced MOSFET degradation due to hot-electron injection

Device degradation due to channel hot-electron injection in several nonconventional MOSFET structures including minimum-overlap gate, offset gate, graded drain, and lightly doped drain (LDD) structures are evaluated. In these nonconventional structures the device degradation is much faster than that in conventional devices when biased with the same amount of hot electrons in the channel. This faster degradation rate is proposed to be due to external channel pinchoff at the more lightly doped drain edge. This behavior implies even more severe constraints on the operating regime for these nonconventional device structures at submicrometer gatelengths to maintain adequate reliability margins.     

含至多四个参与者的量子秘密共享方案的最优信息率

信息率是衡量量子秘密共享方案性能的一个重要指标.在本文中,我们利用超图的相关理论刻画了量子存取结构.然后,利用超图和量子存取结构间的关系给出了参与者人数至多为4的所有13个量子存取结构,并基于量子信息论研究了其最优信息率及所对应的完善的量子秘密共享方案.对其中的5种存取结构的最优信息率的准确值进行了计算,并讨论了达到此信息率的方案的具体构造;对余下的8种存取结构的最优信息率的上界进行了计算.     

3D materials made of gold using Nanoimprint Lithography

In this work we show large area 3D stacking of gold structures like Split Ring Resonators (SRRs) and fishnet structures using Nanoimprint Lithography (NIL).Two main fabrication processes are used to stack multiple layers of such structures on top of each other: For the stacked fishnet structures a finished double-layer of gold structures is covered with a spacer layer which is planarized using chemical mechanical polishing so that a second layer can be processed on top. For the SRR structures a transfer printing process is used. Here the gold structures are transferred from one substrate onto another substrate. Especially this process is a new and unique possibility to stack gold patterns by transferring gold structures several time on the same substrate and therefore to build up 3D materials in a fast and cost efficient way.     

High-Throughput Memory-Based Architecture for DHT Using a New Convolutional Formulation

A new formulation is presented for the computation of an -point discrete Hartley transform (DHT) from two pairs of [(N/2-1)/2]-point cyclic convolutions, and further used to obtain modular structures consisting of simple and regular memory-based systolic arrays for concurrent pipelined realization of the DHT. The proposed structures for direct-memory-based implementation is found to involve nearly the same hardware complexity as those of the existing structures, but offers two to four times more throughput and two to four times less latency compared with others. The distributed-arithmetic (DA)-based implementation is also found to offer very less memory-complexity and considerably low area-delay complexity compared with the existing DA-based structures.     

High Q microwave inductors on silicon by surface tensionself-assembly

A new technique is presented for the fabrication of three-dimensional metal structures by surface tension-induced folding of flat structures. This fully parallel, low temperature method is suitable for post-processing on integrated circuits, and in a first application is used to decouple inductors for radio and microwave-frequency integrated circuits from their substrates, to reduce losses and parasitic capacitance. Meandered microwave inductors have been fabricated on a low resistivity silicon substrate. A peak Q of 10 was measured at 1 GHz, for a 2 nH inductor standing vertically, compared to a peak Q of 4 for the same structure before self assembly     

Fold 2D Woven DNA Origami to Origami+ Structures

DNA origami strategy has greatly promoted the development of DNA nanotechnology as it can construct delicate 2D/3D nanostructures. The current method to prepare DNA origami is through a woven approach to fix a long strand of DNA into certain shapes. This article describes a novel strategy to fold the same 2D DNA sheet into multiple complex structures driven by introducing hydrophobic interaction. The pathway of the folding process can be adjusted by tuning the distribution and chronic order of cholesterol, resulting in different complicated structures. This method is proven efficient for constructing variable nanostructures based on the same DNA origami sheet, and termed as origami⁺. This work represents a new strategy in DNA nanotechnology and will improve the ability to manipulate objects at nanoscale.     

光突发交换核心节点的缓存结构设计

提出了光突发交换（OBS）核心节点上缓存结构的合理而高效的设计方案。在建立核心节点的突发流与突发竞争模型的基础上,提出缓存结构设计应满足的基本条件,进而义提出将缓存结构和交换结构相结合的集成结构方案;同时,通过归纳和扩展,提出缓存结构的多角度综合分类规则。分析和仿真结果显示,集成结构方案满足所提出的缓存设计基本条件,在不受成本等限制时,尽量使用光纤共享型,而且在同样的共享范围,输出型要比输入型好,特别是光纤共享情况更为明显。     

基于空间控制的ICP量子阱混杂技术

本文提出了一种针对InP/InGaAsP材料,基于空间控制技术的ICP量子阱混杂方法。同一片晶片上带隙能量的偏移程度可以通过掩膜上图形的不同占空比灵活的控制。通过一组优化的参数包括ICP-RIE刻蚀深度,二氧化硅沉积厚度,退火过程等,一个样品上,同时实现了五个不同的蓝移,其中最大的蓝移量达到75nm。结果显示在单片集成器件特别是多带隙结构器件的制作中这是一种有效的方法。     

Compact left-handed microstrip line based on multiple layered step impedance resonators

A novel compact left-handed (LH) microstrip transmission line is presented. To establish a negative permeability and permittivity, the transmission line is loaded with step impedance resonators (SIRs) and an array of thin wires on dual-layer architecture. Compared to existing LH structures, which incorporate conventional split ring resonators (SRRs), the proposed structure is three times smaller in size whilst achieving the same performance. To illustrate the electromagnetic properties of the metamaterial, both analytical and full wave analysis were performed and utilized to determine the effective electromagnetic parameters of the proposed structures. The experimental results show that a microstrip line periodically loaded with SIR only produces a rejection of ?6?dB at a resonant frequency of 5.50?GHz. The results also indicate a pass-band response for a left-handed microstrip line (LHML) constructed from SIR and thin wire arrays at the same resonant frequency.     

Impact ionisation in multilayered heterojunction structures

Calculations are reported showing that in multilayered heterojunction structures the effective impact ionisation rates for electrons and holes can be very different, even if they are the same in the basic bulk materials. The reason for this is the difference in the band-edge discontinuities for electrons and holes and the lower phonon mean free path for holes in quantum well structures.     

Announcements and calls for papers

The stability of recursive time-variant digital filters depends on the variable filter coefficients as well as on the chosen state-space structure. A condition for the behaviour of the state vector is given, that guarantees asymptotic stability in the sense of Lyapunov. Some structures do always yield this behaviour. However, all other structures produce the same output signal with a suitable transformation of the state vector with every coefficient change. This transformation can be implemented without increase of the computational complexity when the filter coefficients are altered. This will be demonstrated by an example for a structure with the minimum number of multipliers.     

A very short planar silica spot-size converter using a nonperiodicsegmented waveguide

To reduce the coupling loss of a fiber-to-ridge waveguide connection, a planar silica spot-size converter for a wavelength of 1.55 μm is implemented in the form of a nonperiodic segmented waveguide structure with irregular tapering. A simple single-step lithography process is sufficient for the fabrication of the planar structures. An evolutionary algorithm has been successfully applied for the optimization. The simulated results obtained with a three-dimensional (3-D) finite difference beam propagation method (FD-BPM) program are compared with measurements of implemented couplers, showing very good agreement. A waveguide-to-fiber coupling efficiency improvement exceeding 2 dB per converter is shown. Structures obtained with this approach are very short (~140 μm) and simple to integrate on the same wafer with other planar structures such as phased arrays or ring resonator structures