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1.
This paper presents a novel technique for reducing the intermodulation distortions (IMDs) in power amplifiers. In this method, both second- and third-harmonic components generated by the transistor are reflected back simultaneously by the compact microstrip resonant cell (CMRC) at the input port with proper phases to mix with the fundamental signal for the reduction of IMDs. A rigorous mathematical analysis on the effectiveness of multiharmonic reflections has been formulated and derived using the Volterra series. Moreover, the delay mismatch factor of the proposed method is analytically studied and the result shows that a better tolerance to the delay error can be achieved by using CMRC circuitry. Standard two-tone test measurements reveal 32- and 22-dB reductions for the third-order IMD and fifth-order IMD, respectively, without affecting the fundamental signal at 2.45 GHz. Meanwhile, the proposed approach gives a peak power added efficiency of 53% with 11.5 dB transducer gain and 15 dBm output power for a single-stage SiGe bipolar junction transistor. The adjacent channel power ratio (ACPR) is -55dBc for a data rate of 384-kb/s quadrature phase shift keyed modulated signal with 2-MHz spanning bandwidth, and this ACPR is maintained for a broad range of output power level.  相似文献   

2.
Typical frequency doublers achieve high conversion gain by reflecting back the 2nd harmonic to the input port of the active device through a quarter-wave open-circuited stub. In this paper, a S-band frequency doubler with a 12 dB conversion gain outperforms the conventional design by 5 dB, after replacing the conventional stub with a Compact Microstrip Resonant Cell (CMRC). The CMRC serves as suitable terminations for both the 2nd and 3rd harmonics to enhance the desired output power of the 2nd harmonic, while appearing as a good pass-band for the fundamental frequency.  相似文献   

3.
This letter presents a new type of resonator, namely, the split quarterwave microstrip resonator (SQMR), to improve the poor harmonic suppression and low Q‐factors in conventional quarterwave microstrip resonators. An oscillator incorporating the proposed SQMR is designed, fabricated, and tested to demonstrate that, not only the second harmonic suppression, but also the phase noise of the oscillator can be improved. The oscillator with the SQMR shows improved second harmonic suppression of –74.59 dBc and phase noise figure of merit of –169.77 dBc/Hz at 1 MHz offset.  相似文献   

4.
微波振荡器作为通信系统中的关键器件,已经被广泛地研究和设计。因此,设计具有优秀性能的微波振荡器是至关重要的。提出一种具有深度二次谐波抑制性能的新型微波负阻型振荡器。该设计的新颖性在于利用一个装配于双极结型晶体管射极的并联结构(由一段短微带线和电容并联组成)来实现二次谐波抑制。该结构作为振荡器基波信号的反馈元件,同时作为二次谐波处的带阻结构。因为二次谐波没有反馈回路(接地),所以能被极大地抑制。更重要的是在振荡器的输出端无额外的滤波器来抑制二次谐波,这使得电路尺寸得以减小。给出了一个振荡器设计实例,并给出其测试结果来论证理论的正确性。测试结果表明相较于传统振荡器的二次谐波抑制度有25 dB 的提高。  相似文献   

5.
Measurements have been made of the circuit admittance at the fundamental and second harmonic frequencies for an LSA relaxation oscillator when tuned to give maximum output at either the fundamental or the second harmonic frequency.  相似文献   

6.
在太赫兹频段,无源器件电容电感的品质因数低、电路的寄生参数以及MOS管的截止频率影响使太赫兹振荡器电路难以实现高功率输出。提出一种300 GHz可调谐振荡器,首先,采用改进的交叉耦合双推(Push-Push)振荡器结构,通过输出功率叠加的方法输出二次谐波300 GHz信号,增加了振荡器的输出功率并突破了MOS管截止频率,并通过增加栅极互连电感增加输出功率。其次,太赫兹振荡器摒弃传统片上可变电容调谐的方式,通过调节MOS管衬底电压改变MOS管的栅极寄生电容实现频率调谐,避免太赫兹频段引入低Q值电容,进一步增加了输出功率。提出的太赫兹振荡器采用台积电40 nm CMOS工艺,基波工作频率为154.5 GHz,输出二次谐波为 309.0 GHz,输出功率可达-3.0 dBm,相位噪声为-79.5 dBc/Hz@1 MHz,功耗为28.6 mW,频率调谐范围为303.5~315.4 GHz。  相似文献   

7.
Fully integrated W-band microstrip oscillator   总被引:2,自引:0,他引:2  
A fully integrated microstrip oscillator is described. The active element is an InP transferred-electron device operating in its fundamental mode of oscillation. For measurement purposes, the oscillator structure is mounted in a test assembly and fitted with a waveguide to microstrip transition. Output powers of 16 mW have been observed at the waveguide output port at frequencies in the range 80 GHz to 83 GHz. Transition and circuit losses are approximately 3 dB indicating a device output power of 32 mW.  相似文献   

8.
Triple-push oscillator approach: theory and experiments   总被引:1,自引:0,他引:1  
This paper presents the theory and experiments of the triple-push oscillator approach. This oscillator architecture is combined with three identical oscillator subcircuits. An analytical mode analysis is used to describe the behavior of all modes. As will be shown, odd-mode currents in each oscillator subcircuit have a 120° phase shift to one another and thus produce in-phase combining for the third harmonic. The time domain analysis was performed to simulate a triple-push oscillator, showing that the phenomenon of 120° phase shift exists among each oscillator subcircuit. To prove this concept, a 4.9-GHz hybrid bipolar junction transistor (BJT) circuit and a 28.4-GHz heterojunction bipolar transistor (BJT) MMIC chip were demonstrated. The measured results showed that the 4.9-GHz BJT triple-push oscillator delivered an output power of 1.0 dBm at 4.9 GHz with 12.0-dB fundamental rejection, and the 28.4-GHz HBT MMIC chip exhibited a measured center frequency at 28.4 GHz with an output power of -15.4 dBm, while the output powers of the fundamental and the second harmonic signals were suppressed to -21 and -34 dBm  相似文献   

9.
In this paper a feedback model of second harmonic oscillators is developed. By using describing functions of nonlinearity of active devices, the performances of second harmonic oscillators are studied. Frequency dependence of I–V characteristics of active element are taken into account. The ratio of maximum output power of second harmonic to fundamental is given. The maximum harmonic locking bandwidth of injected harmonic oscillator is derived. The theoretical prediction is compared with experimental results.  相似文献   

10.
A V-band 1/2 frequency divider is developed using harmonic injection-locked oscillator. The cross-coupled field effect transistors (FETs) and low quality-factor microstrip resonator are employed as a wide-band oscillator to extend the locking bandwidth. The second harmonic of free-running oscillation signal is injected to the gates of cross-coupled FETs for high-sensitivity superharmonic injection locking. The fabricated microwave monolithic integrated circuit frequency divider using 0.15-/spl mu/m GaAs pHEMT process showed a maximum locking range of 7.4 GHz (from 65.1 to 72.5 GHz) under a low power dissipation of 100 mW. The maximum single-ended output power was as high as -3 dBm.  相似文献   

11.
InP TED (transferred electron device) oscillators have been experimentally investigated for frequencies between 170 and 279 GHz. It has been found that output powers of more than 7 and 0.2 mW are possible at 180 and 272 GHz using second- and third-harmonic mode operation, respectively. Conversion efficiencies of more than 13% and 0.3% between fundamental and second harmonic and fundamental and third harmonic, respectively, have been found. The conversion efficiencies are comparable to GaAs TEDs. The output powers, conversion efficiencies, and tuning ranges (more than 22%) are the biggest reported for InP TEDs at these frequencies. The output power at third harmonic was sufficient for supplying a superconducting mixer with local oscillator power  相似文献   

12.
Deng  K. Xue  Q. Che  W. 《Electronics letters》2007,43(8):463-464
An improved compact microstrip resonance cell (CMRC) structure is presented. Good lowpass performance and wide stopband characteristics can be achieved with a simple single resonant cell; four transmission zeros are introduced into the stopband and thus out-of-band rejection is significantly improved. Measured results of the fabricated prototype show that the insertion loss is less than 0.1 dB in the whole passband, and stopband bandwidth better than -10 dB is obtained from 2.9 to 15.9 GHz, which is an improvement of 138.3% from a conventional CMRC  相似文献   

13.
Two-port harmonic oscillators have been developed which are suitable for voltage-controlled-oscillator (VCO) operation in frequency stabilized systems. Two oscillator designs are presented. The first has a fundamental frequency cavity located above the harmonic output cavity and the fundamental is coupled by means of the Gunn device bias-line filter. The second design is an in-line structure which uses a waveguide taper as the filter element separating the fundamental and harmonic frequency components. The latter design is a translation of the first oscillator concept onto a single plane, so that the prospect of an integrated monolithic version is conceivable. The performance of the oscillators is discussed, and a demonstration of their use in a heterodyne phase-locked loop control system is presented  相似文献   

14.
An inset-fed antenna with a shorting pin and slots is presented for harmonic suppression of an active integrated antenna. Its fundamental resonant frequency is 5.8 GHz. At fundamental and harmonic frequencies, return loss and radiation characteristics are measured and compared with those of the conventional microstrip patch antenna. The second and third harmonic return losses of the proposed antenna are suppressed to 6.7 dB and 17.7 dB with respect to the conventional patch antenna, respectively.  相似文献   

15.
Cryan  M.J. Hall  P.S. 《Electronics letters》1997,33(24):1998-1999
A microstrip patch oscillator is modelled using a dual LCR Van der Pol oscillator. Closed form expressions are obtained for the fundamental and first harmonic voltage amplitudes and results show reasonably good agreement with a commercial circuit simulator. These type of expressions will be useful for computer aided design of active antennas and give circuit designers greater physical insight into their operation  相似文献   

16.
In this paper, we investigate both open- and short-ended half-wavelength microstrip resonators and their applications to bandpass filter designs. Using voltage-wave analyses, we examine the resonance and coupling properties of these resonators at their fundamental and harmonic frequencies. Loading them with a lumped-circuit element at the locations of zero-voltage point of the second harmonic allows control of fundamental frequency response without altering that of the second harmonic. A resistive loading can suppress the second harmonic while a p-i-n diode loading yield a switchable bandpass filter. The coupling regions between an open-ended resonator and a short-ended resonator of higher order bandpass filters can be chosen such that second-, third-, and fourth-harmonic suppression, as well as dual passband, can be achieved. Simulation and experimental results agree well, validating the proposed bandpass filter design methodology.  相似文献   

17.
Balanced voltage-controlled oscillator (VCO) monolithic microwave integrated circuits (MMICs) based on a coupled Colpitt topology with a fully integrated tank are presented utilizing SiGe heterojunction bipolar transistor (HBT) and InGaP/GaAs HBT technologies. Minimum phase noise is obtained for all designs by optimization of the tank circuit including the varactor, maximizing the tank amplitude, and designing the VCO for Class C operation. Fundamental and second harmonic VCOs are evaluated. A minimum phase noise of less than -112 dBc at an output power of 5.5 dBm is achieved at 100-kHz carrier offset and 6.4-GHz oscillation frequency for the fundamental InGaP/GaAs HBT VCO. The second harmonic VCO achieves a minimum measured phase noise of -120 dBc at 100 kHz at 13 GHz. To our best knowledge, this is the lowest reported phase noise to date for a varactor-based VCO with a fully integrated tank. The fundamental frequency SiGe HBT oscillator achieves a phase noise of -108 dBc at 100 kHz at 5 GHz. All MMICs are fabricated in commercial foundry MMIC processes.  相似文献   

18.
An equivalent circuit model of millimeter wave second harmonic oscillator stabilized with a transmission cavity has been proposed for constructing analytical formulations between performance parameters of the oscillator and parameters of the circuit. The model consists of an equivalent circuit of fundamental wave and that of second harmonic wave. Each of the circuits comprises circuit models of main cavity, transmission waveguide, and transmission cavity. Absorbing material placed between the transmission waveguide and the transmission cavity can suppress additional resonances originated from transmission cavity. The behavior of the second harmonic oscillator can be effectively described by the circuit model. Furthermore, based on this model, mechanical tuning characteristics have been studied at first, and then analytical formulas for quality factor and efficiency depending on circuit parameters have been derived. The circuit parameters can be conveniently extracted by electromagnetic field simulation. Hence the formulas exhibit both compact form and enough accuracy. Thereafter, general rules of performance parameters varying with circuit parameters have been deduced for the harmonic oscillators. Then some design considerations have been derived according to the corresponding analysis. The equivalent circuit model is useful for designing and adjusting millimeter wave second harmonic stabilizing oscillator with a transmission cavity.  相似文献   

19.
In this paper, a novel design of frequency tripler monolithic microwave integrated circuit (MMIC) using complementary split-ring resonator (CSRR) is proposed based on 0.5-μm InP DHBT process. The CSRR-loaded microstrip structure is integrated in the tripler as a part of impedance matching network to suppress the fundamental harmonic, and another frequency tripler based on conventional band-pass filter is presented for comparison. The frequency tripler based on CSRR-loaded microstrip generates an output power between ?8 and ?4 dBm from 228 to 255 GHz when the input power is 6 dBm. The suppression of fundamental harmonic is better than 20 dBc at 77–82 GHz input frequency within only 0.15?×?0.15 mm2 chip area of the CSRR structure on the ground layer. Compared with the frequency tripler based on band-pass filter, the tripler using CSRR-loaded microstrip obtains a similar suppression level of unwanted harmonics and higher conversion gain within a much smaller chip area. To our best knowledge, it is the first time that CSRR is used for harmonic suppression of frequency multiplier at such high frequency band.  相似文献   

20.
文中提出了一种具有宽阻带的紧凑型双频带通滤波器,它采用了折叠短路枝节负载谐振器、紧凑型微 带单元谐振器(CMRC)和阶跃阻抗谐振器结构。由于多个谐振器产生了五个可控传输零点(TZ),该滤波器实现了两个 通带之间的良好隔离度以及宽阻带特性。制作并测试了尺寸紧凑的双频带通滤波器实验样品,测试结果显示,第一通 带和第二通带的中心频率/ 插入损耗分别为0. 66 GHz/0. 8 dB 和1. 73 GHz/0. 7 dB,阻带频率高达10. 5 GHz,抑制水平 超过15 dB。  相似文献   

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