A PAPR reduction technique using Hadamard transform combined with clipping and filtering based on DCT/IDCT for IM/DD optical OFDM systems

In Intensity Modulator/Direct Detection (IM/DD) optical OFDM systems, the high peak-to-power average ratio (PAPR) will cause signal impairments through the nonlinearity of modulator and fiber. In this paper, a joint PAPR reduction technique based on Hadamard transformation and clipping and filtering using DCT/IDCT transform has been proposed for mitigating the impairments in IM/DD optical OFDM system. We then experimentally evaluated the effect of PAPR reduction on the bit error rate (BER) performance and the results show the effectiveness of the proposed technique. At a bit error rate (BER) of 1 × 10⁻³, the receiver sensitivity of the proposed 2.5 Gb/s IM/DD optical OFDM system after 100-km standard single-mode fiber transmission has been improved by 0.8 dB, 1.3 dB and 3.1 dB for a launch power of 6.4 dBm, 8 dBm and 10 dBm respectively when compared with the classical system.     

115 Gbit/s downstream and 10 Gbit/s upstream TWDM-PON together with 11.25 Gbit/s wireless signal utilizing OFDM-QAM modulation

In this work, we propose and investigate a 115 Gbit/s (4 × 28.75 Gbit/s) downstream and 10 Gbit/s upstream time- and wavelength-division-multiplexing passive optical network (TWDM-PON) together with 11.25 Gbit/s wireless broadcasting signal using multi-band orthogonal-frequency-division-multiplexing (OFDM) modulation within 10 GHz bandwidth. Here, to compensate the power fading and chromatic dispersion in the higher frequency, we utilize a −0.7 chirp parameter Mach–Zehnder modulator (MZM) for the OFDM signal. Hence, negative power penalties of −0.3 and −0.4 dB in the downstream and broadcasting wireless signals; and power penalty of 0.3 dB in the upstream signal are measured at the bit error rate (BER) of 3.8 × 10⁻³ after 20 km standard single mode fiber transmission without dispersion compensation.     

Ferroelectric random access memory based on one-transistor–one-capacitor structure for flexible electronics

We have demonstrated a low temperature process for a ferroelectric non-volatile random access memory cell based on a one-transistor–one-capacitor (1T1C) structure for application in flexible electronics. The n-channel thin film transistors (TFTs) and ferroelectric capacitors (FeCaps) are fabricated using cadmium sulfide (CdS) as the semiconductor and poly(vinylidene fluoride-trifluoroethylene) [P(VDF-TrFE)] copolymer as the ferroelectric material, respectively. The maximum processing temperature for the TFTs is 100 °C and 120 °C for the FeCaps. The TFT shows excellent access control of the FeCap in the 1T1C memory cell, and the stored polarization signals are undisturbed when the TFT is off. The fabricated 1T1C memory cell was also evaluated in a FRAM circuit. The memory window on the bit line was demonstrated as 2.3 V, based on the 1T1C memory cell with a TFT having dimensions of 80 μm/5 μm (W/L) and a FeCap with an area of 0.2 × 10^?3 cm² using a bit line capacitor of 1 nF pre-charged at 17.2 V. The 1T1C memory cell is fabricated using photolithographic processes, allowing the integration with other circuit components for flexible electronics systems.     

Improved pilot-aided optical carrier phase recovery using average processing for pilot phase estimation

We propose and numerically investigate an improved pilot-aided (PA) optical carrier phase recovery (CPR) method using average processing for pilot phase estimation in order to suppress the amplified spontaneous emission (ASE) noise in PA coherent transmission systems. Extensive simulations for 28 Gbuad QPSK systems are implemented. The performance of proposed PA-CPR with averaging is comprehensively investigated and compared with PA-CPR without averaging and Viterbi & Viterbi phase estimation (VVPE). Results show that, PA-CPR with averaging can significantly improve the performance of PA-CPR without averaging, and the best averaging length in the average operation is determined by trading off between ASE noise and laser phase noise (PN). By comparing the optical-signal-to-noise-ratio (OSNR) penalties at bit error rate (BER) of 1 × 10^?3 using PA-CPR without averaging, PA-CPR with averaging and VVPE, the advantage of PA-CPR with averaging is further confirmed. Quantitatively, the tolerable linewidth-symbol-duration products (Δf · T) at 1-dB OSNR penalty by using PA-CPR without averaging, VVPE, and PA-CPR with averaging are 6 × 10^?5, 1.2 × 10^?4, and 5 × 10^?4, respectively.     

A Regenerative Prescaled Clock Recovery for High-Bit-Rate OTDM Systems

A regenerative prescaled clock recovery device based on an optoelectronic version of the Miller divider has been tested in high-bit-rate OTDM systems. Tests at 4 × 2.5 and 4 × 10 Gbit/s have been performed to characterize the locking range and the frequency response of the device. The timing jitter of the recovered signal in the case of the 4 × 10 Gbit/s OTDM system does not exceed 0.5 ps. Finally, a comparison of two bit-error-rate measurements (with and without the clock recovery system) were carried out for the 4 × 10 Gbit/s OTDM system. The relevant penalty for each channel is negligible, while the maximum received power difference among the four channels at a bit error rate value of 10 ^− 10 is around 0.7 dB.     

Direct transfer patterning on three dimensionally deformed surfaces at micrometer resolutions and its application to hemispherical focal plane detector arrays

Formation of high performance organic electronic devices on three dimensionally deformed surfaces is severely constrained by the tensile stresses and shear that are introduced during the deformation process. Here, we overcome these limitations to demonstrate the direct transfer of unstrained metals via cold welding onto preformed, 1.0 cm radius plastic hemispheres with micrometer scale feature resolutions to realize 10 kilopixel organic photodetector focal plane arrays (FPAs) that mimic the size, function, and architecture of the human eye. The passive matrix FPA consists of (40 μm)² organic double heterojunction photodetectors with response extending across the visible spectrum. The detector dark current density is 5.3 ± 0.2 μA/cm² at −1 V bias, and with a peak external quantum efficiency of 12.6 ± 0.3% at a wavelength of 640 nm. The photodetector impulse response was 20 ± 2 ns, making the FPA suitable for video recording applications. The measured dynamic range allows for 7 bit image resolution, and the FPA is used to create a simple image. This demonstration significantly extends the ability to transfer active electronic devices that has previously only been demonstrated on planar substrates.     

Improving energy efficiency using a link adaptation algorithm dedicated for 100 Gbps wireless communication

This paper presents a link adaptation algorithm dedicated for 100 Gbps wireless transmission. Interleaved Reed-Solomon codes are selected as forward error correction (FEC) algorithms. The redundancy of the codes is selected according to the channel bit error rate (BER). The uncomplicated FEC scheme allows implementing a complete data link layer processor in an FPGA (field programmable gate array). In our case, we use the Virtex7 FPGA to validate the functionality of our implementation. The proposed FPGA-processor achieves 169 Gbps throughput. Moreover, the implementation is synthesized into 40 nm CMOS technology and the described link adaptation algorithm allows reducing consumed energy per bit to values below 1 pJ/bit at BER <1e−4. With higher BER, the energy increases up to ∼13 pJ/bit.     

Scaling down of organic complementary logic gates for compact logic on foil

In this work, we realize complementary circuits with organic p-type and n-type transistor integrated on polyethylene naphthalate (PEN) foil. We employ evaporated p-type and n-type organic semiconductors spaced side by side in bottom-contact bottom-gate coplanar structures with channel lengths of 5 μm. The area density is 0.08 mm² per complementary logic gate. Both p-type and n-type transistors show mobilities >0.1 cm²/V s with V_on close to zero volt. Small circuits like inverters and 19-stage ring oscillators (RO) are fabricated to study the static and the dynamic performance of the logic inverter gate. The circuits operate at V_dd as low as 2.5 V and the inverter stage delay at V_dd = 10 V is as low as 2 μs. Finally, an 8 bit organic complementary transponder chip with data rate up to 2.7 k bits/s is fabricated on foil by successfully integrating 358 transistors.     

An 8 bit, 100 kS/s,switch-capacitor DAC SAR ADC for RFID applications

An 8 bit switch-capacitor DAC successive approximation analog to digital converter (SAR-ADC) for sensor-RFID application is presented in this paper. To achieve minimum chip area, maximum simplicity is imposed on capacitive DAC; replacing capacitor bank with only a one switch-capacitor circuit. The regulated dynamic current mirror (RDCM) design is introduced to provide stabilized current. This invariable current from RDCM, charging or discharging the only capacitor in circuit is controlled by pulse width modulated signal to realize switch capacitor DAC. The switch control scheme is built using basic AND gates to generate the control signals for RDCM. Only one capacitor and reduced transistor count in digital part reduces the silicon area occupied by the ADC to only 0.0098 mm². The converter, designed in GPDK 90 nm CMOS, exhibits maximum sampling frequency of 100 kHz & consumes 6.75 µW at 1 V supply. Calculated signal to noise and distortion ratio (SNDR) at 1 V supply and 100 kS/s is 48.68 dB which relates to ENOB of 7.79 bits. The peak values of differential and integral nonlinearity are found to be +0.70/−0.89 LSB and +1.40/−0.10 LSB respectively. Evaluated figure of merit (FOM) is 3.87×10²⁰, which show that the proposed ADC acquires minimal silicon area and has sufficiently low power consumption compared to its counterparts in RFID applications.     

Design and characterization of high-voltage NMOS and PMOS devices in standard 0.25 μm CMOS technology

This paper presents the design of high-voltage NMOS and PMOS devices with shallow trench isolation (STI) in standard 0.25 μm/5 V CMOS technology. Breakdown voltages of 20 V for n-channel device with a specific on resistance of 1.06 mΩ cm² and −20 V for p-channel device with a specific on resistance of 2.83 mΩ cm² have been achieved without any modification of existing standard CMOS process.     

Economic and system impact of hybrid Raman–EDFA amplification in a 40 × 40 Gbps optical transmission network with DPSK modulation

Demands of modern high-bandwidth services drive the need to constantly improve existing optical amplification technology beyond its current bounds. In this paper, we demonstrate a hybrid broadband amplification scheme which is capable of improving the system performance of a wavelength-division-multiplexed (WDM) network. We present the study of optical signals with differential-phase-shift keying (DPSK) modulation at 40 Gbps and its transmission in a 50-GHz spaced, 40-channel WDM system over an 80-km link with hybrid optical amplification. A comparison of the system and cost impacts of a Raman-only amplification scheme with two hybrid Raman–erbium doped fiber amplifier schemes (Hybrids I and II) is performed. It is shown that one of the proposed hybrid schemes (Hybrid II) outperforms the other by (i) improving the tolerance to signal input power by 17 dB and (ii) increasing the system reach by 55 km for input signal power of 5 dBm, for a bit error rate (BER) performance of 10⁻¹².     

Frequency up-conversion of optical microwaves for multichannel optical microwave system on a WDM network

We propose a multichannel optical microwave system employing a frequency up-converting optoelectronic oscillator (FU-OEO) [FU-OEO: frequency up-converting optoelectronic oscillator] as a low-phase noise local oscillator (LO) and a multichannel frequency up-converter. Employing the FU-OEO, we demonstrated an optical microwave system capable of 16 optical microwave links in the C-band on a WDM network; the generated optical microwaves were distributed to their designated remote stations according to the channel wavelength. When the FU-OEO was used as the system LO, the phase noise of the optical microwaves was under ?80 dBc/Hz at a 10 kHz offset from a 20 GHz carrier frequency. As a frequency up-converter, the FU-OEO simultaneously up-converted all optical data channels at a 1.25 Gbps data rate for optical microwaves in the 20 GHz band of an optical carrier suppression mode having almost 100% modulation depth. The overall system performance was verified by measuring the bit error rates (BER) of the data recovered from optical microwaves received through single-mode fibers. The measured BER indicated that the system can transmit over 50 km with a power penalty of less than 1 dB. This method can be useful for high-frequency applications where the generation and transmission of optical microwaves are greatly restricted by optical or electrical bandwidths.     

A highly efficient OLED based on terbium complexes

A neutral ligand 9-(4-tert-butylphenyl)-3,6-bis(diphenylphosphineoxide)-carbazole (DPPOC) and its complex Tb(PMIP)₃DPPOC (A, where PMIP stands for 1-phenyl-3-methyl-4-isobutyryl-5-pyrazolone) were synthesized. DPPOC has a suitable lowest triplet energy level (24,691 cm^?1) for the sensitization of Tb(III) (⁵D₄: 20,400 cm^?1) and a significantly higher thermal stability (glass transition temperature 137 °C) compared with the familiar ligand triphenylphosphine oxide (TPPO). Experiments revealed that the emission layer of the Tb(PMIP)₃DPPOC film could be prepared by vacuum co-deposition of the complex Tb(PMIP)₃(H₂O)₂ (B) and DPPOC (molar ratio = 1:1). The electroluminescent (EL) device ITO/N,N′-diphenyl-N,N′-bis(1-naphthyl)-1,1′-diphenyl-4,4′-diamine (NPB; 10 nm)/Tb(PMIP)₃ (20 nm)/co-deposited Tb(PMIP)₃DPPOC (30 nm)/2,9-dimethyl-4,7-diphenyl-1,10-phenanthroline (BCP; 10 nm)/tris(8-hydroxyquinoline) (AlQ; 20 nm)/Mg_0.9Ag_0.1 (200 nm)/Ag (80 nm) exhibited pure emission from terbium ions, even at the highest current density. The highest efficiency obtained was 16.1 lm W^?1, 36.0 cd A^?1 at 6 V. At a practical brightness of 119 cd m^?2 (11 V) the efficiency remained above 4.5 lm W^?1, 15.7 cd A^?1. These values are a significant improvement over the previously reported Tb(PMIP)₃(TPPO)₂ (C).     

Self-heating and destruction of high-voltage 4H-SiC rectifier diodes under a single short current surge pulse

Self-heating of high-voltage (6 kV class) 4H-SiC rectifier p⁺–n–n⁺ diodes under the action of a single 20 μs forward current surge pulse has been studied experimentally up to current densities j ≈ 100 kA/cm². The diode parameters are stable after a single surge pulse with current density j ≈ 60 kА/cm², although the estimated temperature of the diode at the end of this pulse is ～1650 K. After several pulses of this amplitude or after subjecting the diode to pulses with higher current density, the diode degrades. The degradation is manifested in an irreversible decrease of the differential resistance of the diode under a high forward bias. Even a single 20 μs pulse with peak current density j ≈ 100 kA/cm² leads to total destruction of the device.     

NEMS switch with 30 nm-thick beam and 20 nm-thick air-gap for high density non-volatile memory applications

We developed two types of titanium nitride (TiN) based nanoelectromechanical systems (NEMS) switches with the smallest dimensions ever made by typical “top-down” complementary metal–oxide–semiconductor (CMOS) fabrication technology. NEMS cantilever switch (NCLS) and NEMS clamp switch (NCS) with 30 nm-thick TiN beam and 20 nm-thick air-gap were successfully fabricated and electrically characterized. The fabricated NCLS showed ideal on/off current characteristics with an essentially zero off current, a sub-threshold slope of less than 3 mV/decade, and an on/off current ratio over 10⁵ in air ambient. Also, the NCLS exhibited an endurance of over several hundred of switching cycles under dc and ac bias conditions in air ambient. Suspended beam memory (SBM) cell array structure was suggested for high density non-volatile memory applications.     

High-speed organic transistors with three-dimensional organic channels and organic rectifiers based on them operating above 20 MHz

Three-dimensional organic transistors (3D-OFETs) comprising vertical short channels are developed to raise the operational speed of organic transistors. The devices with a short-channel length of 0.8 μm and reduced parasitic capacitance operate at up to 20 MHz with an applied drain voltage of −15 V. Organic rectifiers based on the diode-connected 3D-OFETs are also demonstrated to operate at above 20 MHz, even with an applied effective voltage of about 4 V, which is higher than the speed of radio frequency identification tags of 13.56 MHz required in near field communication. These techniques boost the performance of organic transistors and can help to realize the breakthrough for practical applications of organic logic circuits used as key components in various flexible or plastic devices.     

Formation of low-resistance and transparent indium tin oxide ohmic contact for high-brightness GaN-based light-emitting diodes using a Sn–Ag interlayer

We report on the formation of low-resistance and highly transparent indium tin oxide (ITO) ohmic contacts to p-GaN using a Sn–Ag alloy interlayer. Although the as-deposited Sn–Ag(6 nm)/ITO(200 nm) contacts show non-ohmic behaviors, the scheme becomes ohmic with specific contact resistance of 4.72×10⁻⁴ Ω cm² and produce transmittance of ∼91% at wavelength of 460 nm when annealed at 530 °C. Blue light-emitting diodes (LEDs) fabricated with the Sn–Ag/ITO contacts give forward-bias voltage of 3.31 V at injection current of 20 mA. LEDs with the Sn–Ag/ITO contacts show the improvement of the output power by 62% (at 20 mA) compared with LEDs with Ni/Au contacts.     

Nano-dot arrays with a bit pitch and a track pitch of 25 nm formed by EB writing for 1 Tb/in2 storage

The possibility of forming very fine pits or dots with a bit pitch (BP) and a track pitch (TP) of 25 nm was investigated using a conventional electron-beam (EB) writing system and positive and negative EB resists ZEP520 and calixarene, respectively. In our experiments, we obtained very small dots with a diameter of around 13 nm, and ultrahigh-density dot arrays with a BP and a TP of 25 nm using calixarene resist. Calixarene resist is very suitable for the formation of ultrahigh-packed dot array patterns, and promises to open the way toward 1 trillion bits/in² storage. We believe that calixarene is more suitable for ultrahigh-density pattern formation than ZEP520 because of its exposure intensity distribution function and its resist structure.     

Flexible nonvolatile organic ferroelectric memory transistors fabricated on polydimethylsiloxane elastomer

The flexible organic ferroelectric nonvolatile memory thin film transistors (OFMTs) were fabricated on polydimethylsiloxane (PDMS) elastomer substrates, in which an organic ferroelectric poly(vinylidene-trifluoroethylene) and an organic semiconducting poly(9,9-dioctylfluorene-co-bithiophene) layers were used as gate insulator and active channel, respectively. The carrier mobility, on/off ratio, and subthreshold swing of the OFMTs fabricated on PDMS showed 5 × 10⁻² cm² V⁻¹ s⁻¹, 7.5 × 10³, and 2.5 V/decade, respectively. These obtained values did not markedly change when the substrate was bent with a radius of curvature of 0.6 cm. The memory on/off ratio was initially obtained to be 1.5 × 10³ and maintained to be 20 even after a lapse of 2000 s. The fabricated OFMTs exhibited sufficiently encouraging device characteristics even on the PDMS elastomer to realize mechanically stretchable nonvolatile memory devices.