Modeling power and intermodulation behavior of microwave transistors with unified small‐signal/large‐signal neural network models

This article presents a detailed procedure to learn a nonlinear model and its derivatives to as many orders as desired with multilayer perceptron (MLP) neural networks. A modular neural network modeling a nonlinear function and its derivatives is introduced. The method has been used for the extraction of the large‐signal model of a power MESFET device, modeling the nonlinear relationship of drain‐source current I_ds as well as gate and drain charge Q_g and Q_d with respect to intrinsic voltages V_gs and V_ds over the whole operational bias region. The neural models have been implemented into a user‐defined nonlinear model of a commercial microwave simulator to predict output power performance as well as intermodulation distortion. The accuracy of the device model is verified by harmonic load‐pull measurements. This neural network approach has demonstrated to predict nonlinear behavior with enough accuracy even if based only on first‐order derivative information. © 2003 Wiley Periodicals, Inc. Int J RF and Microwave CAE 13: 276–284, 2003.     

A HEMT large‐signal model for use in the design of microwave switching circuits

The nonlinear sources of switch‐HEMTs have been well analyzed by using the measured data. The small signal intrinsic capacitances (under both positive and negative V _ds operation) have been extracted by an extended small signal model. one‐dimension capacitance model has been effectively applied to model the small signal incremental capacitances directly extracted from the key operation region, which has also automatically taken into account the surface trapping effects. A new capacitance model has been effectively proposed to well fit the key nonlinear source (the deep subthreshold capacitance) of switch‐HEMTs. Simple switching function and additional voltage dependence have been applied to model the wide linear‐region (from high‐ V _gs region to deep subthreshold region) of channel current. On/off state small signal insertion loss, small signal isolation, weak harmonics, and power carrying capabilities are accurately predicted by the large signal model. The model shows very good convergence of circuit simulation. Meanwhile, the simple equations and distinguishing among the capacitances accurately make the scaling rules simple and accurate.     

Growth and characterization of 0.8-μm gate length AlGaN/GaN HEMTs on sapphire substrates

AlGaN/GaN high electron mobility transistor (HEMT) structures were grown on 2 inch sapphire substrates by MOCVD, and 0.8-μm gate length devices were fabricated and measured. It is shown by resistance mapping that the HEMT structures have an average sheet resistance of approximately 380 Θ/sq with a uniformity of more than 96%. The 1-mm gate width devices using the materials yielded a pulsed drain current of 784 mA/mm atV _gs=0.5 V andV _ds=7 V with an extrinsic transconductance of 200 mS/mm. A 20-GHz unity current gain cutoff frequency (f _T) and a 28-GHz maximum oscillation frequency (f _max) were obtained. The device with a 0.6-mm gate width yielded a total output power of 2.0 W/mm (power density of 3.33 W/mm) with 41% power added efficiency (PAE) at 4 GHz.     

Neural network modeling of microwave FETs based on third‐order distortion characterization

A new method for characterization of HEMT distortion parameters, which extracts the coefficents of a Taylor series expansion of I_ds(V_gs, V_ds), including all cross‐terms, is developed from low‐frequency harmonic measurements. The extracted parameters will be used either in a Volterra series model around a fixed bias point for 3^rd‐order characterization of small‐signal I_ds nonlinearity, or in a large‐signal model of I_ds characteristic, where its partial derivatives are locally characterized up to the 3^rd order in the whole bias region, using a novel neural‐network representation. The two models are verified by one‐tone and two‐tone intermodulation distortion (IMD) tests on a PHEMT device. © 2006 Wiley Periodicals, Inc. Int J RF and Microwave CAE, 2006.     

A novel gate driver circuit for depletion‐mode a‐IGZO TFTs

In this paper, a novel gate driver circuit, which can achieve high reliability for depletion mode in a‐InGaZnO thin‐film transistors (TFTs), was proposed. To prevent the leakage current paths for Q node effectively, the new driving method was proposed by adopting the negative gate‐to‐source voltage (V_GS) value for pull‐down units. The results showed all the V_OUT voltage waveforms were maintained at VGH voltage despite depletion‐mode operation. The proposed circuit could also obtain stable V_OUT voltage when the threshold voltage for all TFTs was changed from ?6.5 to +11.5 V. Therefore, the circuit can achieve high reliability regardless of threshold voltage value for a‐IGZO TFTs. In addition, the output characteristics and total power consumption were shown for the alternating current (AC)–driven and direct current (DC)–driven methods based on 120‐Hz full‐HD graphics (1920 × 1080) display panel. The results showed that the AC‐driven method could achieve improved V_OUT characteristics compared with DC‐driven method since the leakage current path for Q node can be completely eliminated. Although power consumption of the AC‐driven method can be slightly increased compared with the DC‐driven method for enhancement mode, consumption can be lower when the operation has depletion‐mode characteristics by preventing a leakage current path for pull‐down units. Consequently, the proposed gate driver circuit can overcome the problems caused by the characteristics of a‐IGZO TFTs.     

Look-up table based I-V model for GaN HEMT devices for Microwave Applications

In this work, a newly found innovative interposable lookup table based nonlinear empirical DC I-V model for GaN HEMT device has been formulated. Angelov and Yang's models have been taken as reference models to study the effects of bias (V_gs, V_ds) dependent traps (gate lag and drain lag), self-healing, virtual gate formation, etc. on I-V characteristics functions and their inclusion into I-V equation functions of the proposed model. A new polynomial ratio function of V_ds with its coefficients varying with V_gs has been formulated as a first function of the I-V model equation, to describe the transfer characteristics of the GaN HEMT. The obtained coefficients of the polynomial ratio function have been calculated by the curve fitting tool, are used to form a look-up table so that the I-V model is fast and accurate. Model verification has been done using 8 × 75 µm gate periphery and 0.25 µm gate length GaN HEMT of UMS foundry. The measured and modeled results of I-V characteristics as well as transfer characteristics are compared and found to be matched accurately with each other. Because of this, this model is more accurate and proficient in the representation of GaN HEMT I-V characteristics when compared to the Angelov DC I-V model. The proposed methodology can be used to model all GaN HEMT devices.Using the proposed nonlinear I-V equation, an empirical model has been generated in AWR MWO using an interpolable lookup table of coefficients varying with V_gs for the GaN HEMT of UMS, CREE and WIN foundry, which can be used for Computer-Aided Design (CAD) of RF circuits, etc.     

Application of data mining methods to efficient microwave active device modeling

In this work, the signal and noise behaviors of a microwave transistor within its operation domain (voltage drain to source–V_DS, current of drain to source—I_DS, frequency—f) are modeled by data mining techniques (DMT) without using any information on the microwave circuit theory. The device is modeled by a black box whose small signal (S) and noise parameters are evaluated through data mining techniques, based on the fitting of both of these parameters for multiple bias and configuration. It has been shown that DMT have a high potential of faithful and efficient device modeling. © 2012 Wiley Periodicals, Inc. Int J RF and Microwave CAE, 2013.     

Pulsed I/V and S‐parameters measurement system for isodynamic characterization of power GaN HEMT transistors

This article presents a system capable of performing isodynamic I/V and S‐parameter measurements. It is focused on the necessary characterization signals, laboratory equipment, and pulser (power head). Proper biasing waveforms are developed and used to extract accurate nonlinear measurements that take into account the frequency dispersive phenomena, namely, the drain lag and temperature rise observed in GaN HEMTs. The pulser can drive high power devices (120 V and 45 A) for very fast and accurate pulses (widths between 300 and 800 ns). As validation, a commercial 15 W GaN device (CGH27015P) from Wolfspeed was characterized using this setup. The consistency between the obtained pulsed I/V curves and others obtained by the integration of the small signal transcondutance (g_m) and output conductance (g_ds) proves that the presented system is capable of performing isodynamic characterization of power transistors.     

Enhancement of Johnson figure of merit in III‐V HEMT combined with discrete field plate and AlGaN blocking layer

The performance of AlGaN/GaN HEMT is enhanced by using discrete field plate (DFP) and AlGaN blocking layer. The AlGaN blocking layer provides an excellent confinement of electrons toward the GaN channel, resulting very low subthreshold drain current of 10^?8 A/mm. It reveals very high off state breakdown voltage (BV) of 342 V for 250 nm gate technology HEMT. The breakdown voltage achieved for the proposed HEMT is 23% higher when compared to the breakdown voltage of conventional field plate HEMT device. In addition, the DFP reduces the gate capacitance (C_G) from 12.04 × 10^?13 to 10.48 × 10^?13 F/mm. Furthermore, the drain current and transconductance (g_m) reported for the proposed HEMT device are 0.82 A/mm and 314 mS/mm, respectively. Besides, the cut‐off frequency (f_T) exhibited for the proposed HEMT is 28 GHz. Moreover, the proposed HEMT records the highest Johnson figure of merit (JFOM) of 9.57 THz‐V for 250 nm gate technology without incorporating T‐gate.     

Fabrication of poly‐Si complementary metal oxide semiconductor inverter by all sputtering deposition process

Direct current sputtering was used for deposition of Si film for precursor film of excimer laser annealing, n⁺‐Si/p⁺‐Si film for source/drain contact, and SiO₂ film for gate insulator of polycrystalline silicon thin‐film transistor. Using these methods, poly‐Si thin‐film complementary metal oxide semiconductor inverter was fabricated by all sputtering process for the first time. The field‐effect mobility was, respectively, 6.5 and 12.5 cm²/Vs for n‐TFTs and p‐TFTs. This inverter exhibits a full rail‐to‐rail swing and abrupt voltage transfer characteristics over the entire voltage range, and the output voltage gain was ~117 at V_dd = 20 V.     

Circuits and AMOLED display with self‐aligned a‐IGZO TFTs on polyimide foil

A process to make self‐aligned top‐gate amorphous indium‐gallium‐zinc‐oxide (a‐IGZO) thin‐film transistors (TFTs) on polyimide foil is presented. The source/drain (S/D) region's parasitic resistance reduced during the SiN interlayer deposition step. The sheet resistivity of S/D region after exposure to SiN interlayer deposition decreased to 1.5 kΩ/□. TFTs show field‐effect mobility of 12.0 cm²/(V.s), sub‐threshold slope of 0.5 V/decade, and current ratio (I_ON/OFF) of >10⁷. The threshold voltage shifts of the TFTs were 0.5 V in positive (+1.0 MV/cm) bias direction and 1.5 V in negative (?1.0 MV/cm) bias direction after extended stressing time of 10⁴ s. We achieve a stage‐delay of ~19.6 ns at V_DD = 20 V measured in a 41‐stage ring oscillator. A top‐emitting quarter‐quarter‐video‐graphics‐array active‐matrix organic light‐emitting diode display with 85 ppi (pixels per inch) resolution has been realized using only five lithographic mask steps. For operation at 6 V supply voltage (V_DD), the brightness of the display exceeds 150 cd/m².     

Study of enhanced DC and analog/radio frequency performance of a vertical super-thin body FET by high-k gate dielectrics

This article reports the DC and analog/radio frequency (RF) response of a newly invented device called vertical super-thin body (VSTB) FET towards high-k (Si₃N₄/HfO₂) and low-k (SiO₂) gate dielectrics in conjunction with the scaling effect through a well-calibrated Sentaurus TCAD tool. At channel length (L_G) of 20 nm, compared to SiO₂, Si₃N₄ improves various DC parameters such as off-state leakage current (I_off), on-current (I_on), on-to-off current ratio (I_on/I_off ratio), subthreshold swing (SS), and drain-induced-barrier-lowering (DIBL) by 77.15%, 26.2%, one order of magnitude, 15.78%, and 36.2%, respectively. On the other hand, a higher improvement is seen in all these DC parameters for the HfO₂ gate dielectric (I_off, I_on, I_on/I_off ratio, SS, DIBL improves respectively by 91.8%, 41.57%, two orders of magnitude, 28.28%, and 62.71%). The underlying physics behind such excellent improvement is explained by the device off-state energy band diagram, electrostatic potential, and channel electron density profile for each dielectric. Further, for all the gate dielectrics considered, the device characteristics were studied for a wide range of L_G from 10 to 50 nm to reveal the scaling impact on the device performance. Irrespective of the gate dielectric material, the device exhibits excellent performance at L_G = 10 nm, which in turn indicates to the brilliant scalability of this new device. Besides, although Si₃N₄ and HfO₂ increase gate capacitance (C_gg)/gate-drain capacitance (C_gd), due to the extremely low values of C_gg/C_gd, enhanced unit gain cut-off frequency, and gain-bandwidth-product is achieved. In addition, the increased transconductance (g_m) of the device applying Si₃N₄/HfO₂ gate dielectric leads to a higher peak value of TGF, intrinsic gain, TFP, GFP, and GTFP. This study intends to expand the fundamental knowledge about such a new device as a VSTB FET and hence, aims to be utilized in the future research of this novel device.     

New small‐signal extraction method applied to GaN HEMTs on different substrates

In this article, a new extraction technique is proposed to extract the small‐signal parameters of gallium nitride (GaN) high electron mobility transistors (HEMTs) on three different substrates namely, Si, SiC, and Diamond. This extraction technique used a single small‐signal circuit model to efficiently describe the physical and electrical properties of GaN on different substrates. This technique takes into account any asymmetry between the gate‐source and gate‐drain capacitances on the asymmetrical GaN HEMT structure, charge‐trapping effects, passivation layer inclusion, as well as leakage currents associated with the nucleation layer between the GaN buffer layer and the different substrates. The extracted values were then optimized using the grey wolf optimizer. The proposed technique was demonstrated through a close agreement between simulated and measured S‐parameters.     

Novel self‐aligned top‐gate oxide TFT for AMOLED displays

Abstract— A novel highly reliable self‐aligned top‐gate oxide‐semiconductor thin‐film transistor (TFT) formed by using the aluminum (Al) reaction method has been developed. This TFT structure has advantages such as small‐sized TFTs, lower mask count, and small parasitic capacitance. The TFT with a 4‐μm channel length exhibited a field‐effect mobility of 21.6 cm²/V‐sec, a threshold voltage of ?1.2 V, and a subthreshold swing of 0.12 V/decade. Highly reliable TFTs were obtained after 300°C annealing without increasing the sheet resistivity of the source/drain region. A 9.9‐in.‐diagonal qHD AMOLED display was demonstrated with self‐aligned top‐gate oxide‐semiconductor TFTs for a low‐cost and ultra‐high‐definition OLED display. Excellent brightness uniformity could be achieved due to small parasitic capacitance.     

Poststress RF‐drifts of dual‐band LC VCO in 0.18‐μm CMOS technology

This article studies the RF‐property of a dual‐band voltage‐controlled oscillator (VCO). The designed circuit consists of a dual‐resonance LC resonator and a Colpitts negative resistance cell. The dual‐resonance LC resonator comprises a series‐tuned LC resonator and a parallel resonant resonator. The proposed VCO has been implemented with the TSMC 0.18 μm 1P6M CMOS technology. The VCO can generate differential signals in the frequency range of 3.0–3.37 GHz and 6.95–7.40 GHz with core power consumption of 10.08 and 10.24 mW at the dc drain‐source bias V_DD of 1.4 V, respectively. The die area of the dual‐band VCO is 0.485 × 0.800 mm². The circuit was operated at V_DD = 3 V for 8 h and significant drift in RF parameters was found. © 2013 Wiley Periodicals, Inc. Int J RF and Microwave CAE 24:243–248, 2014.     

Annealing effect of low‐temperature (<150°C) Cat‐CVD gate dielectric silicon nitride films diluted with atomic hydrogen

Abstract— The effect of in‐situ hydrogen pretreatment on dielectric properties of silicon nitride (SiN^x) thin films for a gate dielectric layer has been studied. SiN^xthin films were grown at a low temperature (150°C) by Catalytic CVD followed by conventional furnace annealing at 150°C for 2 hours. The in‐situ hydrogen pretreatment was performed without vacuum break before the sample was transferred to the furnace for thermal annealing. Capacitance—voltage (C‐V) and current‐density—voltage (J‐V) measurement showed that the hydrogen pretreatment was effective in reducing the hysteresis in the C‐V curve and in increasing the breakdown voltage. Without the treatment, the 150°C annealing failed to produce reliable C‐V and I‐V characteristics. The C‐V hysteresis and the threshold voltage shift of SiN^x were improved by furnace annealing as the hydrogen dilution ratio increased. Also, addition of hydrogen to the deposition gas mixture helped to improve the dielectric properties of the SiN^x films after thermal annealing. The combination of hydrogen dilution of the source gas and the in‐situ hydrogen treatment was successful in producing low‐temperature SiN^x films applicable to a‐Si TFTs. The TFT fabricated by using these films showed a field‐effect mobility of 0.23 cm²/V‐sec and a Vth of 3.1 V.     

Flexible color LCD panel driven by low‐voltage‐operation organic TFT

Abstract— A flexible color LCD panel driven by organic TFTs (OTFTs) was successfully demonstrated. A pentacene OTFT with an anodized Ta₂O₅ gate insulator, which can be operated at low voltage, was developed. In order to improve the electrical performance of the OTFT, the gate insulator was surface treated by processes such as O₂ plasma, UV light irradiation, and hexamethyldisilane treatments. The fabricated OTFT exhibited a mobility of 0.3 cm²/V‐sec and a current on/off ratio of 10⁷ with a low operating drain voltage of ?5 V. A fast‐response‐time flexible ferroelectric LCD, which contains polymer networks and walls, was integrated with the OTFTs by using a lamination and a printing technique. As a result, color images were achieved on the fabricated panel by using a field‐sequential‐color method at a low driving voltage of less than 15 V_pp.     

Electrical and photoelectrical characterizations of isotype GaAs15P85/GaP heterojunctions prepared by liquid phase epitaxy

The present work deals with the electrical and optoelectronic characterizations of the isotype GaAs₁₅P₈₅/GaP devices prepared by liquid phase epitaxy. The electrical properties of the fabricated junction were studied by analyzing its current–voltage (I–V) characteristics, capacitance–voltage (C–V) characteristics in the dark at different temperatures in the range of 300–450 K. The analysis of dark current–voltage (I–V) characteristics at different temperatures were presented in order to elucidate the conduction mechanism and to evaluate the important device parameters. The predominant charge transport mechanism in these devices was found to be thermionic emission in the depletion layer and over the barrier of GaAs₁₅P₈₅/GaP heterojunction at forward bias voltage. From the capacitance–voltage, measurements at high frequency (1 MHz) information can be obtained about the carrier concentration, the diffusion potential, the barrier height of GaAs₁₅P₈₅/GaP heterojunction. The current–voltage characteristics of the GaAs₁₅P₈₅/GaP heterojunction under different illumination intensities were studied. The power low dependence of the reverse current voltage is characterized by space charge limited conduction, SCLC dominated by exponential trap distribution at the higher reverse voltage region.     

Robust event‐triggered output feedback learning algorithm for voltage source inverters with unknown load and parameter variations

We consider the output feedback event‐triggered control of an off‐grid voltage source inverter (VSI) with unknown inductance‐capacitance (L ? C) filter dynamics and connected load in the presence of an input disturbance acting at the inverter. Due to uncertain dynamics and unmodeled parameters in the L ? C filter connected to the VSI, we use an adaptive observer to reconstruct the system's states by measuring only the voltage at the output. The control mechanism is constructed based on an impulsive actor/critic framework that approximates the cost, the event‐triggered controller, and the worst case disturbance and generates the desired AC output with the least energy dissipation. We provide rigorous stability proofs and illustrate the applicability of our results through a simulation example.     

Spice model for detection of dynamic threshold voltage shift during failure analysis of oxide TFT‐based AMD gate drivers

We present an accelerated SmartSpice model that can detect dynamic threshold voltage shift (ΔV_th)‐related failure of an oxide thin‐film transistor (TFT)‐based gate driver. During gate driver operation, the alternating HIGH and LOW input signals repeatedly stress and relax the TFT components of the gate driver. Because oxide TFTs do not recover completely during the LOW input level, ΔV_th cumulated during the HIGH input levels may result in failure of gate drivers. For correct failure analysis, a TFT model that can detect dynamic ΔV_th is, therefore, needed to replace current TFT models, as they cannot account for dynamic ΔV_th. The model presented herein works correctly with varying temperature and input signals of any shape.