H.263编码中DCT在定点DSP上的实现

简要介绍了H.263编码标准及H.263编码采用的正交变换编码离散余弦变换。文中着重讨论了DCT算法的定点化,并根据TMS320C6201DSP的特点对IDCT的算法进行了改进。最后采用DSP汇编语言实现DCT快速算法。     

基于H.264的子带DCT快速算法

DCT快速算法是H.264编码的关键问题之一。该文根据H.264中44块残差系数的分布特征及DCT系数的能量分布特性,提出一种基于DCT系数子带划分的子带DCT快速算法。该算法在DCT和量化前预判出为零的DCT系数,节省了这些系数的DCT和量化计算开销,提高编码效率。该文提出了划分DCT系数子带的判断标准,预判出子带中量化后为零的DCT系数后,仅计算非零的DCT系数,相应地也减少量化(Q),反DCT(IDCT),反量化(IQ)的计算。实验结果表明,该文算法在保持图像质量和码率的同时,极大地节省了DCT, Q,IQ,IDCT的计算量,提高了H.264的编码效率。     

基于TMS320C5409的图像压缩系统

本文基于DSP芯片的特点和JPEG图像压缩原理,重点描述了一个基于TMS320C5409的图像压缩系统。对传统的JPEG算法的DCT变换和量化过程作了一些改进,使本系统压缩速度更快,在压缩率相同的情况下,图像的质量更高。     

AVC/H.264整数离散余弦变换及反变换的结构设计

根据AVC/H.264标准中提出的整数离散余弦变换(DCT)及其反变换(iDCT)算法,旨在给出一种能够同时实现4×4,8×8 DCT/IdCT和Hadamard变换的设计方法.设计中充分利用DCT和iDCT的相似性和算法对称性,用高度并行结构来加快处理速度.采用一维DCT/iDCT单元复用的方式实现二维DCT/iDCT运算,同时提出实现设计的全定制实现方法,对全定制实现此设计进行初步布局规划.     

一种基于Arnold置乱和离散余弦变换的信息隐藏算法

介绍了基于Arnold置乱变换和离散余弦变换(DCT)的图像信息隐藏算法.首先对秘密图像进行Arnold置乱变换,形成秘密信息,然后对载体图像进行DCT变换,秘密信息通过量化处理嵌入到DCT域中.从试验结果来看,该算法在一定程度上满足了信息隐藏的鲁棒性要求.     

图像压缩编码中Walsh变换与DCT变换及其比较

图像变换是图像处理的基础,是图像压缩的第一步。在图像压缩中,DCT变换因其变换效果好而被广泛采用,成为目前最常用的图像压缩变换方法,而Walsh变换还未被广泛采用。通过对这两种变换的算法分析以及Matlab仿真实验和峰值信噪比的对比,结果表明,walsh变换在算法上比DCT简单,实现较为容易,其变换性能并不亚于DCT变换,在某些量化级上甚至还优于DCT变换,Walsh变换有着广泛的应用前景。     

H.264变换编码及量化策略分析

H.264采用4×4的整数变换替代通用的8×8DCT变换.并将其融合在量化过程中,有效降低了变换算法的复杂度和运算量.避免了逆变换的失配问题.对H.264变换编码及量化策略进行了详细的分析,给出了其具体的实现过程.     

一种基于分块DCT变换的嵌入式图像压缩编码算法

本文该算法充分利用DCT变换系数具有的天然塔式结构,用符号代替数值编码以减少编码容量,采用逐次逼近量化策略,通过设置阈值对DCT变换系数进行重要性检测,按图像信息重要性从最重要到最不重要的顺序排序依次对变换系数进行编码。实验结果表明,采用本文算法,在重构图像的人眼视觉质量上有显著的提高,客观质量上有更高的峰值信噪比,并且在DCT域实现了图像的嵌入性。     

全相位沃尔什双正交变换及其在图像压缩中的应用

本文提出了全相位沃尔什双正交变换和对偶双正交基向量的新概念,并提出了一种基于这种变换的、新的图像压缩算法.与JPEG压缩编码算法中的DCT变换做比较,在相同码率下,采用全相位沃尔什双正交变换的重建图像峰值信噪比与DCT变换的大致相同,而该方法最大的优点是量化简单,能对变换系数进行均一量化,从而大大缩短运算时间,且便于硬件实现.     

MPEG-4像素压缩模块的DSP实现

文章在TMS320C6204定点DSP芯片上实现了MPEG-4像素压缩模块的优化.重点讨论了一种快速的DCT/IDCT算法在DSP上的实现,并针对其中最耗时的DCT/IDCT、量化/反量化算法做了软件优化,有效的降低了整个模块的运行时钟数.实验结果表明本文的算法和优化结果都取得了良好的效果.     

A video-rate JPEG chip set

A two-chip set has been designed, fabricated and is fully functional which performs the baseline JPEG image compression and decompression algorithm. The major functions of the devices include: DCT and IDCT, forward and inverse quantization, Huffman coding and decoding. The devices operate with pixel rates beyond 30 MHz at 70 degrees C and 4.75 V. Each die is less than 10 mm on a side and was implemented in a 1.0 µ CMOS cell-based technology to achieve a 9 man-month design time.     

A video-rate JPEG chip set

A two-chip set has been designed, fabricated and is fully functional which performs the baseline JPEG image compression and decompression algorithm. The major functions of the devices include: DCT and IDCT, forward and inverse quantization, Huffman coding and decoding. The devices operate with pixel rates beyond 30 MHz at 70 degrees C and 4.75 V. Each die is less than 10 mm on a side and was implemented in a 1.0 µ CMOS cell-based technology to achieve a 9 man-month design time.     

DCT域网格编码量化及其在图像量化中的应用

本文提出了在离散余弦变换(DCT)域内作网格编码量化(TCQ)的新方法.该方法不仅利用了信号间的时间相关性,而且也利用了信号变换域内的相关性,该方法首先用一维或二维DCT变换减小变换域内的相关性,然后利用卷集编码和信号空间扩展来增大量化信号间的欧氏距离,并用维持比算法寻找最优量化序列.仿真结果表明,基于二维DCT的TCQ方法在相对大的灰度率下,比传统的TCQ方法好2dB左右,与此同时,TCQ又比最优标量量化好2dB左右.该方法还具有编码计算复杂度适中,解码简单以及对误差扩散不敏感的优点.     

Rate distortion optimization for H.264 interframe coding: a general framework and algorithms.

Rate distortion (RD) optimization for H.264 interframe coding with complete baseline decoding compatibility is investigated on a frame basis. Using soft decision quantization (SDQ) rather than the standard hard decision quantization, we first establish a general framework in which motion estimation, quantization, and entropy coding (in H.264) for the current frame can be jointly designed to minimize a true RD cost given previously coded reference frames. We then propose three RD optimization algorithms--a graph-based algorithm for near optimal SDQ in H.264 baseline encoding given motion estimation and quantization step sizes, an algorithm for near optimal residual coding in H.264 baseline encoding given motion estimation, and an iterative overall algorithm to optimize H.264 baseline encoding for each individual frame given previously coded reference frames-with them embedded in the indicated order. The graph-based algorithm for near optimal SDQ is the core; given motion estimation and quantization step sizes, it is guaranteed to perform optimal SDQ if the weak adjacent block dependency utilized in the context adaptive variable length coding of H.264 is ignored for optimization. The proposed algorithms have been implemented based on the reference encoder JM82 of H.264 with complete compatibility to the baseline profile. Experiments show that for a set of typical video testing sequences, the graph-based algorithm for near optimal SDQ, the algorithm for near optimal residual coding, and the overall algorithm achieve on average, 6%, 8%, and 12%, respectively, rate reduction at the same PSNR (ranging from 30 to 38 dB) when compared with the RD optimization method implemented in the H.264 reference software.     

Compression of hyperspectral imagery using the 3-D DCT and hybridDPCM/DCT

Two systems are presented for compression of hyperspectral imagery which utilize trellis coded quantization (TCQ). Specifically, the first system uses TCQ to encode transform coefficients resulting from the application of an 8×8×8 discrete cosine transform (DCT). The second systems uses DPCM to spectrally decorrelate the data, while a 2D DCT coding scheme is used for spatial decorrelation. Side information and rate allocation strategies are discussed. Entropy-constrained code-books are designed using a modified version of the generalized Lloyd algorithm. These entropy constrained systems achieve compression ratios of greater than 70:1 with average PSNRs of the coded hyperspectral sequences exceeding 40.0 dB     

MPEG—2视频解码的VHDL描述与验证

本文提出一种MPEG－2视频解码的硬件结构,并采用VHDL进行了描述。辚实现MPEG－2视频时的实时解码,本文针对时序控制、变长码解码、反量化、TDCT、运动补偿和输入输出控制等各部分都提出了相应的性能的电路结构。验证和仿真的结果表明：本文的设计可以完成相应的功能,能被用于实现MPEG－2MP@ML的实时解码芯片。     

DAB+音频解码器中TNS模块优化设计及硬件实现

时域噪声整形技术被广泛地应用于各种感知音频编解码方案中,能有效地消除由量化噪声所产生的预回声现象。由于数字音频广播音频解码器(HE-AAC v2)算法复杂、运算量大,目前多采用DSP或嵌入式软件方式实现,本设计基于数字音频广播音频解码纯硬件系统,通过对时域噪声整形(TNS)解码算法的优化,以极低的硬件代价完成了时域噪声整形全硬件解码模块设计,具有高硬件资源利用率、低复杂度、高解码效率等特点。     

一种快速DCT算法的研究

由于在H．261、H．263、MPEG-1以及MPEG-2等视频编解码标准中,运行频率最高的运算是离散余弦变换(DCT)。因此,运用DCT矩阵的基本性质和基本定律分析,提出了一种快速的离散DCT算法,对于视频编解码的实时处理有着重要的意义。     

Zero-Block Mode Decision Algorithm for H.264/AVC

In the previous paper , we proposed a zero-block intermode decision algorithm for H.264 video coding based upon the number of zero-blocks of 4 $,times,$4 DCT coefficients between the current macroblock and the co-located macroblock. The proposed algorithm can achieve significant improvement in computation, but the computation performance is limited for high bit-rate coding. To improve computation efficiency, in this paper, we suggest an enhanced zero-block decision algorithm, which uses an early zero-block detection method to compute the number of zero-blocks instead of direct DCT and quantization (DCT/Q) calculation and incorporates two adequate decision methods into semi-stationary and nonstationary regions of a video sequence. In addition, the zero-block decision algorithm is also applied to the intramode prediction in the P frame. The enhanced zero-block decision algorithm brings out a reduction of average 27% of total encoding time compared to the zero-block decision algorithm.