PDSOI工艺下单粒子瞬态脉冲宽度分析

单粒子瞬态脉冲宽度是评价电子系统软错误率的重要参数之一。针对0.13 μm、部分耗尽型绝缘体上硅(PDSOI)工艺下的反相器链,解析地计算了反相器中产生的单粒子瞬态脉冲宽度,仿真了产生的单粒子瞬态脉冲在反相器链中传播时的临界脉冲宽度和传输率随级数变化情况。仿真结果表明,单粒子瞬态脉冲宽度的大小在几十皮秒到几百皮秒之间,反相器链的级数对临界脉冲宽度和传输率影响较大。最后仿真得到在输入单粒子瞬态脉冲宽度较小时,建立保持时间与输入脉冲宽度有关。该结果有利于电气掩蔽建模和锁存掩蔽建模准确性的提高。     

一种低开销加固锁存器的设计

针对单粒子翻转问题,设计了一种低开销的加固锁存器。在输出级使用钟控C单元,以屏蔽锁存器内部节点的瞬态故障;在输出节点所在的反馈环上使用C单元,屏蔽输出节点上瞬态故障对电路的影响;采用了从输入节点到输出节点的高速通路设计,延迟开销大幅降低。HSPICE仿真结果表明,相比于FERST,SEUI,HLR,Iso-DICE锁存器,该锁存器的面积平均下降23.20%,延迟平均下降55.14%,功耗平均下降42.62%。PVT分析表明,该锁存器的性能参数受PVT变化的影响很小,性能稳定。     

0.18μm工艺下单粒子加固锁存器的设计与仿真

在近年国际上出现的两种记忆单元DICE（DualInterlockedstoragecell）和GDICE（DICEwithguard—gates）基础上，设计了两种抗单粒子加固锁存器，称为DICE锁存器和GDICE锁存器，加工工艺为0.18μm。对这两种锁存器的改进减少了晶体管数量，降低了功耗，增强了抗单粒子瞬态（singleeventtransient，SET）能力。分别对比了两种锁存器的优缺点。建立了一种单粒子瞬态仿真模型。将该模型连接到锁存器的敏感点．仿真测试了这两种锁存器的抗单粒子翻转（singleeventupset，SEU）能力，得到一些对版图设计有意义的建议。通过比较得知：如果没有特殊版图设计，在单个敏感点被打翻时，DICE锁存器和GDICE锁存器的抗单粒子翻转能力比较强：而在两个敏感点同时被打翻时，抗单粒子翻转能力将比较弱。但如果考虑了特殊版图设计。那么这两种锁存器抗单粒子翻转的优秀能力就能体现出来。     

组合逻辑电路中的软错误（Soft Error）生成模型的分析

在深亚微米集成电路设计领域,电路可靠性问题日益严重。这个问题的一个重要方面是组合逻辑电路的软错误。现有的关于软错误率的分析和模型表明电压脉冲宽度对电气掩蔽（Electrical Masking）以及锁存窗掩蔽（Latch Window Masking）两种效应都有很大的影响。电压脉冲的宽度通过影响这两种效应进而决定了电路的软错误率。但是这些分析和模型在这个问题上不够深入。在这篇文章中,我们首次提出一个脉冲生成的解析模型。这个模型表明,越过一个拐点后,电路中由射线粒子注入的电荷量同电压脉冲宽度之间存在指数关系。这个模型的平均误差约为2.6%。这个模型还揭示了逻辑门延时与软错误率之间的折中关系。这个关系是最近的一篇有关组合逻辑电路软错误率降低方法的论文的基础[19]。     

一种检测冗余故障的瞬态电流测试方法

数字电路中的冗余故障是不能被传统的电压测试方法(VoltageTesting)和稳态电流测试方法(IDDQTest-ing)检测出来的。根据瞬态电流测试(IDDQTesting)的思想,提出一种检测冗余故障的方法,该方法利用扇出重汇聚结构当中从扇出点到重汇聚点的不同路径的延迟差,在重汇聚点形成冒险,以激活故障并进行传播。实验表明,此方法能够有效地检测冗余故障。     

基于向量传播的单粒子瞬态模拟方法研究

提出了一种基于向量传播的单粒子瞬态(SET)模拟方法。基于4值参数的模型来表征SET脉冲的形状,建立脉冲参数传播的数据库。使用查找表及经验公式来计算SET脉冲形状参数在逻辑门节点之间的传播。为了模拟SET脉冲在传播过程中的重汇聚,定义了4种重汇聚模式,并给出对应的等效脉冲计算方法。提出的基于向量传播的分析算法能够对SET脉冲的产生、传播及捕获过程进行精确分析。ISCAS''89电路的实验结果表明,该方法与Hspice仿真方法的平均误差为1.827%,计算速度提升了1 700倍。在不损失精度的前提下,该方法可对VLSI电路在通用或特定测试向量下的可靠性进行快速自动分析。     

用于广播接收的数字式锁相环频率合成调谐器(续)

四、脉冲吞咽计数的两种预置方式前面提到数据锁存器对主计数器和吞咽计数器的预置有两种方式,在本节中我们将结合具体电路来分别加以介绍。1. 预置所需分频比的方案当我们从键盘输入所需接收的波段和频率数据或从微机的RAM 中调出事先所预置存储的某一频率数据时,微机自动计算出所需分频比N,然后将N 送入数据锁存器中锁存起来。在每一个计数周期开始时数据锁存器将分频比N 预置到由主计数器(N_P)和吞咽计数器(N_S)组成的整个计数链中,达到不同频率下可变分频比的要求。     

基于四值脉冲参数模型的单粒子瞬态传播机理与软错误率分析方法

随着工艺尺寸的不断缩小,由单粒子瞬态(Single Event Transient, SET)效应引起的软错误已经成为影响宇航用深亚微米VLSI电路可靠性的主要威胁,而SET脉冲的产生和传播也成为电路软错误研究的热点问题。通过研究SET脉冲在逻辑链路中的传播发现:脉冲上升时间和下降时间的差异能够引起输出脉冲宽度的展宽或衰减;脉冲的宽度和幅度可决定其是否会被门的电气效应所屏蔽。该文提出一种四值脉冲参数模型可准确模拟SET脉冲形状,并采用结合查找表和经验公式的方法来模拟SET脉冲在电路中的传播过程。该文提出的四值脉冲参数模型可模拟SET脉冲在传播过程中的展宽和衰减效应,与单参数脉冲模型相比计算精度提高了2.4%。该文应用基于图的故障传播概率算法模拟SET脉冲传播过程中的逻辑屏蔽,可快速计算电路的软错误率。对ISCAS89及ISCAS85电路进行分析的实验结果表明:该方法与HSPICE仿真方法的平均偏差为4.12%,计算速度提升10000倍。该文方法可对大规模集成电路的软错误率进行快速分析。     

一种高性能低功耗SEU免疫锁存器

为了缓解瞬态故障引发的软错误,提出一种对单粒子翻转完全免疫的加固锁存器。该锁存器使用4个输入分离的反相器构成双模互锁结构,使用具有过滤瞬态故障能力的C单元作为输出级,采用快速路径设计和钟控设计以提升速度和降低功耗。Hspice仿真结果表明,该电路结构没有未加固节点,所有节点都具有自恢复能力,适用于门控时钟电路。相比于SIN-LC,Cascode ST,FERST,TMR和SEUI加固等类型的锁存器,该锁存器的延迟、功耗、功耗延迟积平均下降82.72%,25.45%,84.24%。此外,该电路结构受工艺角、供电电压和温度扰动的影响较小。     

复杂数字电路中的单粒子效应建模综述

单粒子效应产生的软错误是影响航天电子系统可靠性的主要因素之一。对其进行建模是研究单粒子效应机理和电路加固技术的有效方法。介绍了深亚微米及以下工艺中影响模型准确性的几种效应机制,包括脉冲展宽机制、电荷共享机制和重汇聚机制等。重点分析了单粒子瞬态、单粒子翻转的产生模型和单粒子瞬态的传播模型。阐述了基于重离子和脉冲激光的模型验证方法。最后,分析了单粒子效应随特征尺寸的变化趋势,并提出了未来单粒子效应建模技术的发展方向。     

PIPBQ Effect Aware SER Analysis for Combinational Logic Circuits

Technology scaling results in the propagation-induced pulse broadening and quenching (PIPBQ) effect become more noticeable. In order to effectively evaluate the soft error rate for combinational logic circuits, a soft error rate analysis approach considering the PIPBQ effect is proposed. As different original pulse propagating through logic gate cells, pulse broadening and quenching are measured by HSPICE. After that, electrical effect look-up tables (EELUTs) for logic gate cells are created to evaluate the PIPBQ effect. Sensitized paths are accurately retrieved by the proposed re-convergence aware sensitized path search algorithm. Further, by propagating pulses on these paths to simulate fault injection, the PIPBQ effect on these paths can be quantified by EELUTs. As a result, the soft error rate of circuits can be effectively computed by the proposed technique. Simulation results verify the soft error rate improvement comparing with the PIPBQ-not-aware method.     

Circuit and Latch Capable of Masking Soft Errors with Schmitt Trigger

In VLSIs, soft errors resulting from radiation-induced transient pulses frequently occur. In recent high-density and low-power VLSIs, the operation of systems is seriously affected by not only soft errors occurring on memory systems and the latches of logic circuits but also those occurring on the combinational parts of logic circuits. The existing tolerant methods for soft errors on the combinational parts do not provide enough high tolerant capability with small performance penalty. This paper proposes a class of soft error masking circuits by using a Schmitt trigger circuit and a pass transistor. The paper also presents a construction of soft error masking latches (SEM-latches) capable of masking transient pulses occurring on combinational circuits. Moreover, simulation results show that the proposed method has higher soft error tolerant capability than the existing methods. For supply voltage V _DD ?=?3.3 V, the proposed method is capable of masking transient pulses of magnitude 4.0 V or less.     

The effect of propagation delay uncertainty on the speed oftime-of-flight digital optoelectronic circuits

Time-of-flight synchronization is a new digital design methodology for optoelectronics that eliminates latches, allowing higher clock rates than alternative timing schemes. Synchronization is accomplished by precisely balancing connection delays. Circuits use pulse-mode signaling and clock gates to restore pulse timing. Many effective pipeline stages are created within combinational logic without extra hardware bounding the stages. Time-of-flight design principles are applicable to packet routing and sorting processors for optical interconnection networks. Circuits are unique because the clock rate is limited primarily by imprecision in propagation delay rather than absolute delay, as in circuits with latches. We develop a general model of delay uncertainty and focus on the effect that static and dynamic uncertainty accumulated over circuit paths has on the minimum feasible clock period. We present a method for traversing the circuit graph representation of a time-of-flight circuit to compute arrival time uncertainty at each pulse interaction point. Arrival time uncertainties give rise to pulse width and overlap constraints. From these constraints we formulate a constrained minimization to find the minimum clock period. We demonstrate our method on circuits implemented with 2×2 electro-optic switches and optical waveguides and find the electronic component of path uncertainty frequently limits speed     

Novel delayed pulse techniques for stimulated Raman scattering

The outputs of two independent, incoherent lasers are spatially overlapped in a Raman-active medium. When the probes are separated in time, the stimulated Raman scattering (SRS) efficiency of the delayed pulse is increased from 14 to 27%. This occurs because of the presence of the decaying coherent excitation induced by the SRS of the first pulse. The influence of saturable losses is removed by prepulsing the medium before applying the pulse pair. The temporal evolution of the enhancement and phase-matching conditions are investigated. Surprisingly, the pulses interact only when they are separated in time, with the enhancement vanishing when they are temporally overlapped. The outputs of several independent lasers may be combined to generate significantly higher SRS efficiencies, without increasing the pump intensity incident on the medium. The technique provides a means for recovering efficient SRS in the transient (short-pulse) regime     

Self-configuring loop-free alternates with high link failure coverage

A change in network topology triggers the re-convergence process of routing protocols. The re-convergence time of current routing protocols (e.g. OSPF) is constrained by the possibility of having transient loops due to the independent calculation of shortest paths between routers affected by a network failure. Several IP Fast-ReRoute (IPFRR) schemes have been developed to pro-actively calculate and install alternate forwarding entries almost instantaneously once a topology update message is received, without causing temporary micro-loops. The IPFRR scheme which has been used most extensively so far makes use of Loop-Free Alternates (LFA). While these are easy to configure, LFAs still require manual configuration, and the resulting ratio of covered link failures is only about 60 to 70 percent. This paper presents a logical extension of the Loop-Free Alternate concept, proposes a self-configuring scheme to populate the corresponding alternate entries, and evaluates the performance of the scheme with respect to coverage, configuration time and path length in a simulation environment.     

The transient evolution of AM mode locking a TEA CO2laser

The evolution of the pulse in an AM mode-locked TEA CO2laser has been investigated. The experiments have been performed by injecting the mode-locked pulses in a high-pressure slave oscillator at various time intervals after the initiation of the mode-lock process. This technique allows the measurements of the pulse widths independent on the pulse energies. A numerical solution of a dynamic model for the mode-locking process accurately predicts the transient evolution. It is shown that the build-up time to reach steady state can be, depending on the modulation depth, considerably larger than the duration of the pulse train.     

1064nm激光诱导等离子体开关控制355nm脉宽可调输出

为得到脉宽可控的355nm紫外脉冲激光输出,采用1064nm脉冲激光诱导等离子体开关技术,控制355nm激光脉冲宽度,在激光电离Cu小孔内壁表面及空气击穿共同作用下,获得了2.8ns～10ns的脉宽可调输出。讨论了1064nm单脉冲输出能量对脉宽压缩的影响,在无延时情况下得到了脉宽最短达2.8ns的脉冲激光输出。在此基础上,保持1064nm单脉冲输出能量不变,采用延时装置改变两光路间的光程差,以控制等离子体开关相对于355nm激光脉冲的形成时间,最终得到脉宽可调的脉冲激光输出。结果表明,等离子体开关结构简单、操作方便、适用范围广,是一种较好的脉冲整形手段。     

一种新型抗多节点翻转加固锁存器

在纳米锁存器中,由电荷共享效应导致的多节点翻转(MNU)正急剧增加,成为主要的可靠性问题之一。尽管现有的辐射加固锁存器能够对MNU进行较好的容错,但是这些加固锁存器只依赖于传统的冗余技术进行加固,需要非常大的硬件开销。基于辐射翻转机制(瞬态脉冲翻转极性)设计了一种新型抗MNU锁存器。该锁存器可有效减少需保护的节点数(敏感节点数)和晶体管数,因此可减少电路的硬件开销。由于至少存在2个节点可以保存正确的值,因此任何单节点翻转(SNU)和MNU都可以被恢复容错。基于TSMC 65 nm CMOS工艺进行仿真,结果显示,设计的加固锁存器的电路面积、传播延迟和动态功耗分别为19.44μm²,16.96 ps和0.91μW。与现有的辐射加固锁存器相比,设计的锁存器具有较小的硬件开销功耗-延迟-面积乘积(PDAP)值,仅为300.02。     

Exact, closed-form expressions for transient fields inhomogeneously filled waveguides

It is well known that transient electromagnetic waves in waveguides exhibit dispersion. Exact, closed-form expressions, which involve Bessel functions of the first kind, have been derived for the impulse response of a waveguide, but exact, closed-form expressions for more complex pulses are absent from the literature. In this paper, it is demonstrated that incomplete Lipschitz-Hankel integrals can be used to represent transient pulses in homogeneously filled waveguides. A continuous wave pulse is investigated in this paper, however, this technique can also be applied to a number of other transient waveforms. The resulting expressions are verified by numerically integrating the pulse distribution multiplied by the known impulse response     

An improved DCT-based JND estimation model considering multiple masking effects

The just noticeable distortion (JND) in the contour and orderly regions is easy to be overestimated and that in the disorderly areas is usually underestimated. In order to estimate the JND threshold more accurately, this paper proposes an improved DCT-based JND estimation model considering multiple masking effects properly. The contributions of this paper are characterized by twofold. On the one hand, a mean absolute difference based (MAD-based) block classification method is developed at first to classify image blocks into plain, contour and texture types accurately and quickly. And the JND model for contrast masking effect (CM-JND) is constructed as a modulation factor based on the MAD of each block. On the other hand, we propose a distance-based disorder evaluation metric to measure the disorder intensity in block level. Then, the JND model for the disorderly concealment effect (DC-JND) is proposed based on our psychological experiment. Finally, the total JND estimation threshold is modeled by fusing the spatial contrast sensitivity function, the luminance adaptation effect, the CM and DC effects. Experimental results show that the proposed DCT-based JND estimation model outperforms existing models in performance and complexity. Specifically, the proposed model shows more tolerance for distortions, lower computational complexity with better perceptual quality than other JND models.