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1.
Simplex‐based piecewise‐linear (PWL) approximations of non‐linear mappings are needed when the robust PWL analysis is used to directly solve non‐linear equations. This paper proposes a straightforward technique for transforming the well‐known approximations into another form. This new form is computationally more efficient, since it preserves the sparse structure of the original Jacobian matrix. Furthermore, this new form of PWL approximation explicitly relates the simplex‐based PWL analysis to the conventional formulation of the Katzenelson algorithm. The proposed transform technique is also extended to treat groupwise‐separable mappings and, finally, non‐separable but sparse mappings that arise in real‐life simulation of large electronic circuits. In this paper, all these (transformed) simplex‐based PWL approximations are compared in terms of their generality and efficiency. The computational efficiency of the PWL approximation that utilizes sparsity is validated with realistic simulations. Copyright © 2005 John Wiley & Sons, Ltd.  相似文献   

2.
The convergence problems of conventional DC analysis can be partly avoided by using piecewise‐linear analysis. This paper proposes a piecewise‐linear DC analysis method that can efficiently handle arbitrary couplings between non‐linear circuit elements. Piecewise‐linear modelling of the non‐linear circuit elements is automatically performed during simulation, using simplicial subdivisions. The number of linear regions, and thereby iterations, is considerably reduced by combining the common parts of separate simplicial subdivisions. Due to these reasons and since the method is formulated with the commonly used modified nodal approach, it has been possible to implement the method in the general‐purpose circuit simulator APLAC. The correct operation of the method is demonstrated with three examples. Copyright © 1999 John Wiley & Sons, Ltd.  相似文献   

3.
Non‐linear multiport resistors are the main ingredients in the synthesis of non‐linear circuits. Recently, a particular PWL representation has been proposed as a generic design platform (IEEE Trans. Circuits Syst.‐I 2002; 49 :1138–1149). In this paper, we present a mixed‐signal circuit architecture, based on standard modules, that allows the electronic integration of non‐linear multiport resistors using the mentioned PWL structure. The proposed architecture is fully programmable so that the unit can implement any user‐defined non‐linearity. Moreover, it is modular: an increment in the number of input variables can be accommodated through the addition of an equal number of input modules. Copyright © 2005 John Wiley & Sons, Ltd.  相似文献   

4.
5.
Cellular Neural Networks with piecewise linear connection have been proposed by several authors as a generalization of the basic paradigm, which allows for more complex functionality. None of the prototypes realized to date, however, provides for such kind of synapses. As a feasibility study, a current‐mode subthreshold CMOS piecewise‐linear synapse circuit is developed in this paper. Copyright © 2003 John Wiley & Sons, Ltd.  相似文献   

6.
In this paper, we face the problem of model reduction in piecewise‐linear (PWL) approximations of non‐linear functions. The reduction procedure presented here is based on the PWL approximation method proposed in a companion paper and resorts to a strategy that exploits the orthonormality of basis functions in terms of a proper inner product. Such a procedure can be favourably applied to the synthesis of the resistive parts of cellular non‐linear networks (CNNs) to reduce the complexity of the resulting circuits. As an example, the method is applied to a case study concerning a CNN for image processing. Copyright © 2003 John Wiley & Sons, Ltd.  相似文献   

7.
The good convergence properties of piecewise‐linear (PWL) DC analysis have been thoroughly discussed in many papers. This paper, in turn, concentrates on the speed of PWL DC analysis, where the boundary crossing of linear regions plays a crucial role. Fast methods are presented for performing the following boundary‐crossing computations: LU‐decomposition update, matrix‐equation solution, boundary‐crossing direction, and damping‐factor determination. Special attention is given to those PWL DC analysis methods that perform PWL modelling of the non‐linear components on the fly; an adaptive method is proposed for controlling the accuracy of PWL modelling and speeding up simulation. The computational efficiency of the accelerated PWL DC analysis is discussed and compared with that of conventional, Newton–Raphson iteration‐based, DC analysis. Finally, the performance evaluation is completed with realistic simulation examples: it is demonstrated that the speed of the accelerated PWL DC analysis is comparable with that of the conventional DC analysis. Copyright © 2006 John Wiley & Sons, Ltd.  相似文献   

8.
An efficient algorithm is proposed for finding all DC solutions of transistor circuits where characteristics of transistors are represented by piecewise‐linear (PWL) convex monotone functions. This algorithm is based on a simple test (termed the linear programming, LP, test) for non‐existence of a solution to a system of PWL equations in a given region. In the conventional LP test, the system of PWL equations is transformed into an LP problem by surrounding component PWL functions by rectangles. Then the dual simplex method is applied, by which the number of pivotings per region becomes very small. In this letter, we propose a new LP test using the dual simplex method and triangles. The proposed test is not only efficient but also more powerful than the conventional test using the simplex method or rectangles. Copyright © 2008 John Wiley & Sons, Ltd.  相似文献   

9.
An efficient algorithm is proposed for finding all solutions of piecewise‐linear (PWL) resistive circuits using linear programming (LP). This algorithm is based on a simple test (termed the LP test) for non‐existence of a solution to a system of PWL equations in a given region. In the conventional LP test, the system of PWL equations is transformed into an LP problem, to which the simplex method is applied. However, this algorithm requires a very large number of pivotings because the simplex method is applied on many regions. In this paper, we introduce the dual simplex method to the LP test, which makes the average number of pivotings per region much smaller (less than one, for example) and makes the algorithm very efficient. By numerical examples, it is shown that the proposed algorithm could find all solutions of large‐scale problems, including those where the number of variables is 300 and the number of linear regions is 10300, in practical computation time. Copyright © 2002 John Wiley & Sons, Ltd.  相似文献   

10.
Digital architectures for the circuit realization of multivariate piecewise‐linear (PWL) functions are reviewed and compared. The output of the circuits is a digital word representing the value of the PWL function at the n‐dimensional input. In particular, we propose two architectures with different levels of parallelism/complexity. PWL functions with n = 3 inputs are implemented on an FPGA and experimental results are shown. The accuracy in the representation of PWL functions is tested through three benchmark examples, two concerning three‐variate static functions and one concerning a dynamical control system defined by a bi‐variate PWL function. Copyright © 2009 John Wiley & Sons, Ltd.  相似文献   

11.
In this letter, an effective technique is proposed for improving the computational efficiency of the contraction‐type LP test algorithm, which is an algorithm for finding all solutions of piecewise‐linear resistive circuits. Using the proposed technique, all solutions of a large‐scale problem, where the number of variables is 100 and the number of linear regions is 10100, could be found in less than 10 min using a 360 MHz computer. Copyright 2001 John Wiley & Sons, Ltd.  相似文献   

12.
Decomposition of noise perturbation along Floquet eigenvectors has been extensively used in order to achieve a complete analysis of phase noise in oscillator. Piecewise‐linear approximation of nonlinear devices is usually adopted in numerical calculation based on multi‐step integration method for the determination of unperturbed oscillator solution. In this case, exact determination of the monodromy matrix can be hampered by the presence of discontinuities between models introduced by the approximation. In this paper we demonstrate that, without the proper corrections, relevant errors occur in the determination of eigenvalues and eigenvectors, if adjacent linear models presents discontinuities. We obtain this result by the analysis of a simple 2‐D oscillator with piecewise‐linear parameter. We also demonstrate that a correct calculation can be achieved introducing properly calculated state vector boundary conditions by the use of interface matrices. This correction takes into account the effects of discontinuities between the linear models, leading to exact calculation of eigenvalues and eigenvectors, and, consequently, of the phase noise spectrum. Copyright © 2006 John Wiley & Sons, Ltd.  相似文献   

13.
In this letter, the performance of the LP test algorithm, which is an algorithm for finding all solutions of piecewise‐linear resistive circuits, is evaluated by numerical experiments. It is shown that the algorithm could find all solutions of large‐scale problems (including those where the number of variables is 200–300 and the number of linear regions is 10200–10300) in practical computation time. Copyright © 2000 John Wiley & Sons, Ltd.  相似文献   

14.
It is known that large classes of approximately‐finite‐memory maps can be uniformly approximated arbitrarily well by the maps of certain non‐linear structures. As an application, it was proved that time‐delay networks can be used to uniformly approximate arbitrarily well the members of a large class of causal nonlinear dynamic discrete‐time input–output maps. However, the proof is non‐constructive and provides no information concerning the determination of a structure that corresponds to a prescribed bound on the approximation error. Here we give some general results concerning the problem of finding the structure. Our setting is as follows. There is a large family 𝒢 of causal time‐invariant approximately‐finite‐memory input‐output maps G from a set S of real d‐vector‐valued discrete‐time inputs (with d⩾1) to the set of ℝ‐valued discrete‐time outputs, with both the inputs and outputs defined on the non‐negative integers 𝒵+. We show that for each ϵ>0, any Gϵ𝒢 can be uniformly approximated by a structure map H(G, ·) to within tolerance ϵ, and we give analytical results and an example to illustrate how such a H(G, ·) can be determined in principle. Copyright © 2000 John Wiley & Sons, Ltd.  相似文献   

15.
An iterative technique is proposed to efficiently represent n‐dimensional discrete mappings from experimental sampled data. The original sampled mapping is approximated, under some assumptions, with a proper set of one‐dimensional arrays. The proposed technique highly reduces the severe memory requirements of classical memory‐based techniques. A convergence discussion on the proposed algorithm and application examples are presented. Copyright © 2003 John Wiley & Sons, Ltd.  相似文献   

16.
This paper presents a simple, quasi‐static, non‐linear (saturated mode) NMOS drain‐current model for Volterra‐series analysis. The model is based on a linear transconductance, a linear drain‐source conductance and a purely non‐linear drain‐source current generator. The drain‐current dependency on both drain‐source and gate‐source voltages is included. Model parameters are then extracted from direct numerical differentiation of DC I/V measurements performed on a 160 × 0.25 µm NMOS device. This paper presents the Volterra analysis of this model, including algebraic expressions for intercept points and output spectrum. The model has been verified by comparing measured two‐tone iIP2 and iIP3 with the corresponding model predictions over a wide range of bias points. The correspondence between the modelled and measured response is good. Copyright © 2005 John Wiley & Sons, Ltd.  相似文献   

17.
The cornerstone of the theory of discrete‐space single‐input–single‐output linear systems is the idea that every such system has an input–output map that can be represented by a convolution or the familiar generalization of a convolution. This thinking involves an oversight which, for the case of bounded inputs mapped continuously into bounded outputs, was recently corrected by adding an additional term to the representation. Here, we give a corresponding corrected result for discrete‐space systems with stochastic inputs. Copyright © 2001 John Wiley & Sons, Ltd.  相似文献   

18.
The identification of a non‐linear continuous output‐only system from a time series is considered for the case that the functional form of the model is not known beforehand. To estimate both functions and parameters, a combination of non‐parametric modelling based on non‐linear regression and parametric modelling based on a multiple shooting algorithm is proposed. This strategy to determine non‐linear differential equations is exemplified on experimental data from a chaotic circuit where an accurate reconstruction of the observed attractor is obtained. Copyright © 2003 John Wiley & Sons, Ltd.  相似文献   

19.
Model order reduction based on trajectory piecewise linearization (TPWL) is a beneficial technique for approximating nonlinear models. One efficient method for building projection matrix in TPWL reduction is by aggregation of projection matrices of linearization points (LPs). However, in this method, the size of projection matrix will also grow up by increasing the number of LPs, which yield the increment of the size of reduced model. In other words, the size of reduced model will depend on the number of LPs. In this paper, we will address this issue and propose two new strategies for obviating this problem. Contrarily to former works in TPWL modeling, we established a model via TWPL based on output weighting of parallel linear models. Then, we proposed two reduction strategies for suggested TPWL model. The first algorithm inspires from former works in this field but in a parallel structure that enable segregation of projection matrices whereas the second algorithm remedies the problem by considering the high‐order TPWL model as a unit linear model and reduces this model like a linear model but uses back projection method for constructing different outputs. The efficiency of methods is shown by comparison with former TPWL methods through vast simulations. Copyright © 2015 John Wiley & Sons, Ltd.  相似文献   

20.
The 2‐term approximations for the input conductivity functions, iin=fin(vin), of a grid of similar weakly non‐linear (parabolic) conductors, and the grid's symmetric cuts, measured between two close nodes, are derived, using a semi‐empirical method; the results of a relevant PSpice simulation are presented. The functions fin(vin) of the grid's symmetric cuts possess a common analytical feature. Simulation results show that the error in the calculation of the non‐linear terms in the input functions is less than 1 per cent. Copyright © 2001 John Wiley & Sons, Ltd.  相似文献   

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