A novel prototype of auxiliary edge resonant bridge leg link snubber‐assisted soft‐switching sine‐wave PWM inverter

This paper proposes a new circuit topology of the three‐phase soft‐switching PWM inverter and PFC converter using IGBT power modules, which has the improved active auxiliary switch and edge resonant bridge leg‐commutation‐link soft‐switching snubber circuit with pulse current regenerative feedback loop as compared with the typical auxiliary resonant pole snubber discussed previously. This three‐phase soft‐switching PWM double converter is more suitable and acceptable for a large‐capacity uninterruptible power supply, PFC converter, utility‐interactive bidirectional converter, and so forth. In this paper, the soft‐switching operation and optimum circuit design of the novel type active auxiliary edge resonant bridge leg commutation link snubber treated here are described for high‐power applications. Both the main active power switches and the auxiliary active power switches achieve soft switching under the principles of ZVS or ZCS in this three‐phase inverter switching. This three‐phase soft‐switching commutation scheme can effectively minimize the switching surge‐related electromagnetic noise and the switching power losses of the power semiconductor devices; IGBTs and modules used here. This three‐phase inverter and rectifier coupled double converter system does not need any sensing circuit and its peripheral logic control circuits to detect the voltage or the current and does not require any unwanted chemical electrolytic capacitor to make the neutral point of the DC power supply voltage source. The performances of this power conditioner are proved on the basis of the experimental and simulation results. Because the power semiconductor switches (IGBT module packages) have a trade‐off relation in the switching fall time and tail current interval characteristics as well as the conductive saturation voltage characteristics, this three‐phase soft‐switching PWM double converter can improve actual efficiency in the output power ranges with a trench gate controlled MOS power semiconductor device which is much improved regarding low saturation voltage. The effectiveness of this is verified from a practical point of view. © 2006 Wiley Periodicals, Inc. Electr Eng Jpn, 155(4): 64–76, 2006; Published online in Wiley InterScience ( www.interscience.wiley.com ). DOI 10.1002/eej.20207     

A new method of damping harmonic resonance at the DC link in a large‐capacity rectifier‐inverter system

This paper proposes a new method of damping harmonic resonance in the DC link of a large‐capacity rectifier‐inverter system, such as in rapid‐transit railways. A voltage‐source PWM converter is connected in series to the DC capacitor of the rectifier through a matching transformer, acting as a damping resistor to the DC capacitor current. No filters are needed to extract harmonic components from the DC capacitor current. This results in a quick response and highly stable damping. The relationship between the control gain of the PWM converter and the required rating is theoretically discussed. We show that the required rating is less than one‐thousandth of that previously proposed. In particular, regenerating the power consumed by the PWM converter is very important because of the large power in practical systems. Normally, an additional PWM inverter is connected to the DC bus of the PWM converter to regenerate the consumed power. The additional inverter regenerates the DC power to the AC source through a transformer. This method, however, makes the damping circuit complex, thus the proposed method for the DC‐link harmonic resonance is less practicable. In this paper, a simple and novel scheme that utilizes the DC‐link voltage of the rectifier as a DC source for the PWM converter is proposed. The excellent practicability of the proposed damping method with the novel regenerating scheme is confirmed using digital computer simulation. © 2003 Wiley Periodicals, Inc. Electr Eng Jpn, 144(2): 53–62, 2003; Published online in Wiley InterScience ( www.interscience.wiley.com ). DOI 10.1002/eej.10172     

A matching transformer‐less inrush current suppressor for transformers using a series‐connected small‐rated voltage‐source PWM converter—consideration of the control gains and required ratings of the PWM converter

This paper proposes a new inrush current suppressor using a series‐connected small‐rated PWM converter for a transformer. The PWM converter is directly connected in series between the source and transformer without a matching transformer. The inrush phenomena of the matching transformer, thus, can be avoided. The control gain and required ratings of the series‐connected small‐rated PWM converter are discussed in detail. The capacity of the DC capacitor of the PWM converter is also discussed considering the active power flows into the PWM converter. The PSCAD/EMTDC is used to verify the validity of the proposed inrush current suppressor. A prototype experimental model is constructed and tested. The experimental results demonstrate that the proposed suppressor can perfectly overcome the inrush phenomena of transformers. © 2007 Wiley Periodicals, Inc. Electr Eng Jpn, 160(3): 45–55, 2007; Published online in Wiley InterScience ( www. interscience.wiley.com ). DOI 10.1002/eej.20374     

Novel current‐source multilevel inverter driven by single gate drive power supply

This paper proposes a novel current‐source multilevel inverter, which is based on a current‐source half‐bridge topology. Multilevel inverters are effective for reducing harmonic distortion in the output voltage and the output current. However, the multilevel inverters require many gate drive power supplies to drive switching devices. The gate drive circuits using a bootstrap circuit and a pulse transformer can reduce the number of the gate drive power supplies, but the pulse width of the output PWM waveform is limited. Furthermore, high‐speed power switching devices are indispensable to create a high‐frequency power converter, but various problems, such as high‐frequency noise, arise due to the high dv/dt rate, especially in high‐side switching devices. The proposed current‐source multilevel inverter is composed of a common emitter topology for all switching devices. Therefore, it is possible to operate it with a single power supply for the gate drive circuit, which allows stabilizing the potential level of all the drive circuits. In this paper, the effectiveness of the proposed circuit is verified through experimental results. © 2008 Wiley Periodicals, Inc. Electr Eng Jpn, 166(2): 88–95, 2009; Published online in Wiley InterScience ( www.interscience.wiley.com ). DOI 10.1002/eej.20475     

A novel induction generator system using bi‐directional PWM converter for small‐scale power applications

This paper presents a deadbeat current control structure for a bidirectional power flow pulse‐width modulation (PWM) converter connected to a stand‐alone induction generator (IG), which works with variable speed and different types of loads. Sensorless control of the IG, meaning stator voltage vector control without a mechanical shaft sensor, is considered to regulate both the IG line‐to‐line voltage and the DC‐bus voltage of the PWM converter. In the proposed system, a newly designed phase locked loop (PLL) circuit is used to determine the stator voltage vector position of the IG. A 2.2 kW laboratory prototype has been built to confirm the feasibility of the proposed method. The proposed cost‐effective IG system with a deadbeat current‐controlled PWM converter and capacitor bank requires only three sensors. Moreover, the required rating of the PWM converter becomes smaller due to the existence of the capacitor bank. © 2006 Institute of Electrical Engineers of Japan. Published by John Wiley & Sons, Inc.     

Steady‐state solutions of a voltage source converter with dq‐frame controllers by means of the time‐domain method

A voltage source converter (VSC) is one of the most widely used power converters in a power system. In this paper, a time‐domain‐based accelerated steady‐state method is proposed to solve for a closed‐loop pulse‐width modulated (PWM) VSC with dq‐frame controllers, which is able to account for the harmonic interactions between the converter and the rest of the power network, between the AC and DC sides of a VSC, and between the converter and its controllers. The proposed time‐domain method is based on the modified time‐domain shooting method, where the Jacobian matrix is updated by the quasi‐Newtons method. This will drastically increase the computation efficiency as it avoids re‐evaluating and inverting the Jacobian matrix, whose size is usually very large for a PWM‐VSC due to high number of times of switching. All the results are shown to be consistent with those obtained by a PSCAD/EMTDC model, which has been validated with the experiment in a previous publication. © 2014 Institute of Electrical Engineers of Japan. Published by John Wiley & Sons, Inc.     

A single‐stage LED streetlight driver with PFC and digital PWM dimming capability

This paper proposes a single‐stage light‐emitting diode (LED) driver that offers power‐factor correction and digital pulse–width modulation (PWM) dimming capability for streetlight applications. The presented LED streetlight driver integrates an alternating current–direct current (AC–DC) converter with coupled inductors and a half‐bridge‐type LLC DC–DC resonant converter into a single‐stage circuit topology. The sub‐circuit of the AC–DC converter with coupled inductors is designed to be operated in discontinuous‐conduction mode for achieving input‐current shaping. Zero‐voltage switching of two active power switches and zero‐current switching of two output‐rectifier diodes in the presented LED driver decrease the switching losses; thus, the circuit efficiency is increased. A prototype driver for powering a 144‐W‐rated LED streetlight module with input utility‐line voltages ranging from 100 to 120 V is implemented and tested. The proposed streetlight driver features cost‐effectiveness, high circuit efficiency, high power factor, low levels of input‐current harmonics, and a digital PWM dimming capability ranging from 20% to 100% output rated LED power, which is fulfilled by a micro‐controller. Satisfying experimental results, including dimming tests, verify the feasibility of the proposed LED streetlight driver. Copyright © 2016 John Wiley & Sons, Ltd.     

A 1‐Gbps reference‐less burst‐mode CDR with embedded TDC in a 65‐nm CMOS process

A reference‐less all‐digital burst‐mode clock and data recovery circuit (CDR) is proposed in the paper. The burst‐mode CDR includes a coarse and a fine time‐to‐digital converter (TDC) with embedded phase generator. A low‐power current‐starved inverter is employed as the delay unit of the fine TDC to acquire the high measurement resolution. A calibration method to diminish the inherent delay is used to reduce the quantization error of the recovery clock. The proposed CDR is fabricated in a 65‐nm CMOS process. Experiment results show that the CDR operates from 0.9 to 1.1 Gbps and have a 13‐bit consecutive identical digits (CIDs) tolerance.     

A novel method of suppressing the inrush current of transformers by using a series‐connected voltage‐source PWM converter

This paper proposes a novel method of suppressing the inrush current of transformers. A small‐rated voltage‐source PWM converter is connected in series to the transformers through a matching transformer. As the connected PWM converter serves as a resistor for the source current, no inrush phenomena occurs. The required rating of the PWM converter, which serves as the damping resistor for the inrush phenomena, is 1/400 that of the main transformers in single‐phase circuits. In three‐phase circuits, it is 1/900. The basic principle of the proposed method is discussed. Digital computer simulation is implemented to confirm the validity and excellent practicability of the proposed method using the PSCAD/EMTDC. A prototype experimental model is constructed and tested. The experimental results demonstrate that the proposed method can perfectly suppress the inrush phenomena. © 2006 Wiley Periodicals, Inc. Electr Eng Jpn, 157(4): 56–65, 2006; Published online in Wiley InterScience ( www.interscience.wiley.com ). DOI 10.1002/eej.20174     

Pulse current regenerative resonant snubber‐assisted two‐switch flyback‐type ZVS PWM DC‐DC converter

In this paper, a two‐switch high‐frequency flyback transformer‐type zero voltage soft‐switching PWM DC‐DC converter using IGBTs is proposed. Effective applications for this power converter can be found in auxiliary power supplies of rolling stock transportation and electric vehicles. This power converter is basically composed of two active power switches and a flyback high‐frequency transformer. In addition to these, two passive lossless snubbers with power regeneration loops for energy recovery, consisting of a three‐winding auxiliary high‐frequency transformer, auxiliary capacitors and diodes are introduced to achieve zero voltage soft switching from light to full load conditions. Furthermore, this power converter has some advantages such as low cost circuit configuration, simple control scheme, and high efficiency. Its operating principle is described and to determine circuit parameters, some practical design considerations are discussed. The effectiveness of the proposed power converter is evaluated and compared with the hard switching PWM DC‐DC converter from an experimental point of view, and the comparative electromagnetic conduction and radiation noise characteristics of both DC‐DC power converter circuits are also depicted. © 2005 Wiley Periodicals, Inc. Electr Eng Jpn, 152(3): 74–81, 2005; Published online in Wiley InterScience ( www.interscience.wiley.com ). DOI 10.1002/eej.20081     

Analytical estimation of propagation delay and short‐circuit power dissipation in CMOS gates

An efficient analytical method for calculating the propagation delay and the short‐circuit power dissipation of CMOS gates is introduced in this paper. Key factors that determine the operation of a gate, such as the different modes of operation of serially connected transistors, the starting point of conduction, the parasitic behaviour of the short‐circuiting block of a gate and the behaviour of parallel transistor structures are analysed and properly modelled. The analysis is performed taking into account second‐order effects of short‐channel devices and for non‐zero transition time inputs. Analytical expressions for the output waveform, the propagation delay and the short‐circuit power dissipation are obtained by solving the differential equations that govern the operation of the gate. The calculated results are in excellent agreement with SPICE simulations. Copyright © 1999 John Wiley & Sons, Ltd.     

GRO‐TDC with gate‐switch‐based delay cell halving resolution limit

In this paper, we propose a time‐to‐digital converter (TDC) with first‐order noise‐shaping. The proposed gated ring oscillator (GRO)‐TDC overcomes the limitation associated with GRO's intrinsic resolution by adopting two GROs, whose delay difference is equal to half the delay of a delay cell. The GRO is composed of 17 stages of a newly proposed delay cell, which utilizes a gate‐switched configuration to solve the charge redistribution problem. The proposed GRO‐TDC is designed using a 65‐nm process technology, with an area of 0.015 mm² and a supply voltage of 1 V. The sampling rate and the effective resolution of the proposed GRO‐TDC are 50 MS/s and 1.22 ps, respectively. Finally, the proposed GRO‐TDC consumes a power of 9.08 and 2.41 mW in the calibration and conversion modes, respectively. Copyright © 2017 John Wiley & Sons, Ltd.     

A novel robust current control approach using adaptive line enhancer for three‐phase current‐source active power filter

An effective system control method is presented for applying a three‐phase current‐source PWM converter with a deadbeat controller to active power filters (APFs). In the shunt‐type configuration, the APF is controlled such that the current drawn by the APF from the utility is equal to the current harmonics and reactive current required for the load. To attain the time‐optimal response of the APF supply current, a two‐dimensional deadbeat control scheme is applied to APF current control. Furthermore, in order to cancel both the delay in the two‐dimensional deadbeat control scheme and the delay in DSP control strategy, an Adaptive Line Enhancer (ALE) is introduced in order to predict the desired value three sampling periods ahead. ALE has another function of bringing robustness to the deadbeat control system. Due to the ALE, settling time is made short in a transient state. On the other hand, total harmonic distortion (THD) of source currents can be minimized compared to the case where ideal identification of the controlled system can be made. The experimental results obtained from the DSP‐based APF are also reported. The compensating ability of this APF is very high in accuracy and responsiveness although the modulation frequency is rather low. © 2004 Wiley Periodicals, Inc. Electr Eng Jpn, 150(1): 50–61, 2005; Published online in Wiley InterScience ( www.interscience.wiley.com ). DOI 10.1002/eej.20014     

A self‐commutated back‐to‐back system and its performance under a single line‐to‐ground fault condition

This paper deals with a self‐commutated BTB (Back‐To‐Back) system for the purpose of power flow control and/or frequency change in transmission systems. Each BTB unit consists of two sets of 16 three‐phase voltage‐source converters, and their AC terminals are connected in series to each other via 16 three‐phase transformers. Hence, the BTB unit uses totally 192 switching devices capable of achieving gate commutation. This results in a great reduction of voltage and current harmonics without performing PWM control. Simulation results verify the validity of the proposed system configuration and control scheme not only under a normal operating condition but also under a single line‐to‐ground fault condition. © 2003 Wiley Periodicals, Inc. Electr Eng Jpn, 143(3): 68–78, 2003; Published online in Wiley InterScience ( www.interscience.wiley.com ). DOI 10.1002/eej.10124     

Control schemes for auxiliary switches of three‐phase PWM resonant snubber inverters

Control schemes for auxiliary switches of PWM controlled three‐phase resonant snubber inverters (RSIs) are proposed. The control schemes proposed in this paper are based on a conventional PWM technique. To avoid zero voltage switching lost conditions, the conventional PWM technique is modified in the proposed schemes. The proposed control schemes are so simple that they are suitable for digital control. In this paper, a CPLD (Complex Programmable Logic Device)‐based control IC, which realizes the proposed control schemes, for three‐phase auxiliary RSIs is also proposed and implemented. The IC generates gate signals for the main and auxiliary devices of the three‐phase RSI based on the proposed control schemes. The effectiveness of the proposed control schemes was verified through experiments. As a result, ZVS (Zero Voltage Switching) turn‐on at the main devices was achieved and a smooth sinusoidal output current was obtained by use of the control IC. © 2005 Wiley Periodicals, Inc. Electr Eng Jpn, 152(4): 57–67, 2005; Published online in Wiley InterScience ( www.interscience.wiley.com ). DOI 10.1002/eej.20125     

A pseudo‐differential current‐reuse structure for opamp‐sharing pipelined analog‐to‐digital converters

In this paper, a power efficient pseudo‐differential (PD) current‐reuse structure is presented to alleviate the memory effects of opamp‐sharing in pipelined analog‐to‐digital converters. To implement the PD current‐reuse structure, a switched‐capacitor circuit is introduced for multiplying digital‐to‐analog converter, which has a slight modification compared with the conventional switching scheme with no power penalty. In the proposed multiplying digital‐to‐analog converter circuit, the common‐mode offset amplification of the PD structures is eliminated. Moreover, a PD current‐reuse amplifier is developed from the telescopic structure with an inverter‐based gain‐boosting circuit. The effectiveness of the proposed structure is evaluated in comparison with existing current‐reuse techniques. Copyright © 2014 John Wiley & Sons, Ltd.     

A ZVS‐ZCS phase shift full bridge DC‐DC converter with secondary‐side control for battery charging applications

The output power requirement of battery charging circuits can vary in a wide range, hence making the use of conventional phase shift full bridge DC‐DC converters infeasible because of poor light load efficiency. In this paper, a new ZVS‐ZCS phase shift full bridge topology with secondary‐side active control has been presented for battery charging applications. The proposed circuit uses 2 extra switches in series with the secondary‐side rectifier diodes, operating with phase shift PWM. With the assistance of transformer's magnetizing inductance, the proposed converter maintains zero voltage switching (ZVS) of the primary‐side switches over the entire load range. The secondary‐side switches regulate the output voltage/current and perform zero current switching (ZCS) independent of the amount of load current. The proposed converter exhibits a significantly better light load efficiency as compared with the conventional phase shift full bridge DC‐DC converter. The performance of the proposed converter has been analyzed on a 1‐kW hardware prototype, and experimental results have been included.     

Series resonant ZCS‐PFM DC‐DC power converter with high‐frequency high‐voltage transformer link for high‐power magnetron drive

This paper presents a single lossless inductive snubber‐assisted ZCS‐PFM series resonant DC‐DC power converter with a high‐frequency high‐voltage transformer link for industrial‐use high‐power magnetron drive. The current flowing through the active power switches rises gradually at a turned‐on transient state with the aid of a single lossless snubber inductor, and ZCS turn‐on commutation based on overlapping current can be achieved via the wide range pulse frequency modulation control scheme. The high‐frequency high‐voltage transformer primary side resonant current always becomes continuous operation mode, by electromagnetic loose coupling design of the high‐frequency high‐voltage transformer and the magnetizing inductance of the high‐frequency high‐voltage transformer. As a result, this high‐voltage power converter circuit for the magnetron can achieve a complete zero current soft switching under the condition of broad width gate voltage signals. Furthermore, this high‐voltage DC‐DC power converter circuit can regulate the output power from zero to full over audible frequency range via the two resonant frequency circuit design. Its operating performances are evaluated and discussed on the basis of the power loss analysis simulation and the experimental results from a practical point of view. © 2005 Wiley Periodicals, Inc. Electr Eng Jpn, 153(3): 79–87, 2005; Published online in Wiley InterScience ( www.interscience.wiley.com ). DOI 10.1002/eej.20126     

Design and implementation of an interleaved soft‐switching converter with output voltage doubler

An interleaved pulse‐width modulation (PWM) converter with less power switches is presented in this paper. The buck type of active clamp circuit is used to recycle the energy stored in the leakage inductor of a transformer. The zero voltage switching (ZVS) turn‐on of power switches is realized by the resonance during the transition interval of power switches. At the secondary side of transformers, two full‐wave rectifiers with dual‐output configuration are connected in parallel to reduce the current stresses of the secondary windings of transformers. In the proposed converter, power switches can accomplish two functions of the interleaved PWM modulation and active clamp feature at the same time. Therefore, the circuit components in the proposed converter are less than that of the conventional interleaved ZVS forward converter. The operation principle and system analysis of the proposed converter are provided in detail. Experimental results for a 280 W prototype operated at 100 kHz are provided to demonstrate the effectiveness of the proposed converter. Copyright © 2008 John Wiley & Sons, Ltd.     

An active‐passive capacitor‐commutated converter for HVDC systems with a three‐phase voltage‐source PWM converter

This paper introduces a new approach to the capacitor‐commutated converters (CCCs) for HVDC systems. A small‐rated three‐phase voltage‐source PWM converter is connected between a series commutation capacitor and thyristor converter through matching transformers. The PWM converter acts as auxiliary commutation‐capacitor for the thyristor converter while the series passive capacitor acts as the main commutation capacitor. The capacitance, which is the sum of the small‐rated active and series passive capacitors, is variable, so that stable commutation is obtained. In CCCs, commutation failure occurs when the AC bus voltage is recovered whereas the proposed combined commutation‐capacitor can achieve successful commutation for both rapidly decreasing and increasing AC bus voltages. The basic principle of the proposed active–passive capacitor‐commutated converter is discussed in detail. Then, constant margin angle control with a constant firing angle of the thyristor converter is proposed using a function generator block. Digital simulation demonstrates the novelty and effectiveness of the proposed active–passive capacitor‐commutated converter. © 2005 Wiley Periodicals, Inc. Electr Eng Jpn, 151(1): 66–75, 2005; Published online in Wiley InterScience ( www.interscience.wiley.com ). DOI 10.1002/eej.20030