一种选择多个单元的重新播种内建自测试方法

随着集成电路技术的迅速发展,芯片的集成度越来越高,怎样对电路进行有效测试就显得越来越重要。其中内建自测试被认为是解决测试问题有效方法之一。文中提出了一种选择多个单元的重新播种BIST测试方法,实验结果表明该方法可以降低硬件开销。     

一种选择多个单元的重新播种内建自测试方法

随着集成电路技术的迅速发展，芯片的集成度越来越高，怎样对电路进行有效测试就显得越来越重要。其中内建自测试被认为是解决测试问题有效方法之一。文中提出了一种选择多个单元的重新播种BIST测试方法，实验结果表明该方法可以降低硬件开销。     

基于FPGA的内建自测试的实现研究

内建自测试技术源于激励-响应-比较的测试机理,信号可以通过边界扫描传输到芯片引脚,因而即使BIST本身发生故障也可以通过边界扫描进行检测;为了解决大规模SOC芯片设计中BIST测试时间长和消耗面积大的问题,提出了一种用FPGA实现BIST电路的方法,对测试向量发生器、被测内核和特征分析器进行了研究;通过对被测内核注入故障,然后将正常电路和注入故障后的电路分别进行仿真,比较正常响应和实际响应的特征值,如果相等则认为没有故障,否则发生了特定的故障;利用ModelSim SE 6.1f软件仿真结果表明了该方法的正确有效性和快速性。     

基于内建自测试的测试向量生成方法

内建自测试(BIST)方法是目前可测性设计(DFT)中最具应用前景的一种方法。BIST能显著提高电路的可测性,而测试向量的生成是关系BIST性能好坏的重要方面。测试生成的目的在于,生成可能少的测试向量并用以获得足够高的故障覆盖率,同时使得用于测试的硬件电路面积开销尽可能低,测试时间尽可能短。本文对几种内建自测试中测试向量生成方法进行了简单的介绍和对比研究,分析各自的优缺点,并在此基础上探讨了BIST面临的主要问题和发展方向。     

一种嵌入式存储器内建自测试电路设计

随着存储器在芯片中变得越来越重要和半导体工艺到了深亚微米(deep-sub-micron,DSM)时代,对存储器的故障测试变得非常重要,存储器内建自测试(memory built—in self—test,MBIST)是一种有效测试嵌入式存储器的方法;给出了一种基于LFSR的存储器内建自测试电路设计,采用LFSR设计的地址生成器的面积开销相当小,从而大大降低了整个测试电路的硬件开销;16×32b SRAM内建自测试电路设计实验验证了此方法的可行性,与传统的方法相比,它具有面积开销小、工作速度快和故障覆盖率高等优点。     

减少多种子内建自测试方法硬件开销的有效途径

提出一个基于重复播种的新颖的BIST方案，该方案使用侦测随机向量难测故障的测试向量作为种子，并利用种子产生过程中剩余的随意位进行存储压缩；通过最小化种子的测试序列以减少测试施加时间．实验表明，该方案需要外加硬件少，测试施加时间较短，故障覆盖率高，近似等于所依赖的ATPG工具的故障覆盖率．在扼要回顾常见的确定性BIST方案的基础上，着重介绍了文中的压缩存储硬件的方法、合成方法和实验结果．     

基于SoC的嵌入式DRAM存储器内建自测试设计

内建自测试(Built-in Self Test,BIST)是测试片上系统(System on- Chip,SoC)中嵌入式存储器的重要技术;但是,利用BIST技术采用多种算法对嵌入式存储器进行测试仍面临诸多挑战;对此,提出了一种基于SoC的可以带有多种测试算法的嵌入式DRAM存储器BIST设计,所设计的测试电路可以复用状态机的状态,利用循环移位寄存器(Cyclic Shift Register,CSR)产生操作命令,利用地址产生电路产生所需地址;通过对3种BIST电路支持的算法,全速测试,面积开销3个方面的比较,表明提出的嵌入式DRAM存储器BIST设计在测试时间,测试故障覆盖率和测试面积开销等各方面都取得了较好的性能.     

逻辑内建自测试技术进展综述

逻辑内建自测试(logic buit-in self-test,LBIST)是一种可测试性设计技术,利用芯片、板级或系统上的部分电路测试数字逻辑电路本身。LBIST对于许多应用来说至关重要,尤其是国防、航空航天、自动驾驶等生命和任务关键型的应用。这些应用需要执行片上、板上或系统内自检,以提高整个系统的可靠性及执行远程诊断的能力。该文首先给出了常用的LBIST分类,并描述了经典的,也是工业界应用最成功的LBIST架构——使用多输入特征寄存器和并行移位序列产生器的自测试架构;其次,对国内外研究团队、研究进展进行了总结;再次,详细剖析了LBIST的基本原理、时序控制、确定性自测试设计、低功耗设计、“X”容忍等关键技术点,列举出了主流的LBIST商业工具,并逐一分析了其软件架构和技术特点;最后,讨论当前LBIST技术仍需进一步解决的问题,并进行展望。     

Flash存储器的内建自测试设计

内建自测试是一种有效的测试存储器的方法.分析了NOR型flash存储器的故障模型和测试存储器的测试算法,在此基础上,设计了flash存储器的内建自测试控制器.控制器采用了一种23位的指令,并且通过JATG接口来控制,结果通过扫描链输出.验证结果表明,设计的内建自测试结构对固定故障、转换故障、桥接故障、耦合故障、栅极干扰、漏极干扰、过渡擦除和读干扰均有100%的故障覆盖率.     

基于伪随机测试的模数混合信号内建自测试法

利用伪随机序列作为测试激励,通过计算输入输出的互相关函数得到K维特征空间,在特征空间的基础上进行分析,判别电路有无故障,实验证明该方法简单可行,且提高了测试的效率和正确性,适用于模拟及混合信号测试,适用于混合信号电路的内建自测试（BIST）。     

一种新型的分布式MEMS移相器的小型化设计

通过在共面波导信号线上贴敷低介电常数的薄层绝缘介质,使得MEMS金属桥与共面波导信号线在“关“态下形成MIM电容的方法,实现了提高“关““开“两种状态下的电容比,从而提高了单位长度上的相移量.与传统的设计方法相比,在达到同样相移量指标的情况下仅需少量的MEMS金属桥就可以实现,工作的可靠性得到提高,未封装MEMS移相器器件的总体尺寸可以减小60%左右,此外由于在“关“态下,金属桥直接贴敷在介质表面上而不会随着外界环境震动,因此移相器的相移精度显著的提高.     

A novel design of RF MEMS dual band phase shifter

In this paper a novel design of RF MEMS dual band phase shifter is presented. The new design is switched-line type phase shifter which has been constructed by distributed MEMS transmission line (DMTL). Since the constant phase of DMTL can be changed, the proposed design has capability for working at two or more frequencies. The performances of the new design are compared with conventional switched-line design that has been constructed by transmission line of coplanar waveguide. The results show the feasibility of the new design and also show the new design reduces the size and loss of the structure compared with conventional switched-line design. The proposed design is unique approach to achieve a dual band phase shifter using MEMS technology which has low loss and weight with high linearity respect to the other technologies. This dual band phase shifter has very small size than the other passive dual band phase shifters.     

Compact wideband phase shifter

A compact phase shifter is presented for wideband applications consisting of circular patches located at close proximity to each other which are coupled with interconnected ground‐plane circular slots located beneath the circular patches. In the proposed technique the slot‐line length and radius of patch determines the magnitude of phase shift. © 2012 Wiley Periodicals, Inc. Int J RF and Microwave CAE, 2013.     

Knowledge-based system tool for high-level BIST design

The paper describes a knowledge-based computer-aided design (CAD) tool to plan the use of built-in self-test (BIST) in VLSI design. Software is being developed using the LISP object-oriented programming system (LOOPS), a multiparadigm programming environment on Xerox 1108 workstations. The software employs object-oriented, rule-based and procedural programming to model various aspects of the system. The knowledge on which the system is based has been derived from a study group of design-for-testability (DFT) experts drawn from a consortium of five UK companies working under the Alvey VLSI programme. The motivation for the tool is that BIST is expected to have a positive impact on test costs. A range of artificial intelligence techniques are used, including rule-based systems and planning.     

Microrectangular‐coaxial phase shifter for microwave devices

This article reports the simulated performance of rectangular coaxial ferrite phase shifter at Ka‐band. The proposed technique exploits rectangular coaxial waveguide with a symmetrically placed inner signal conductor inside an outer conductor connected to the ground. Strontium ferrite‐SU8 composite is used as an anisotropic material of choice in the modeled design. Two model phase shifting structures were designed for reciprocal and nonreciprocal applications using High Frequency Structure Simulator, HFSS. The reciprocal model produced a tunable phase shift of almost across 0 to 400 kA/m applied field and at 1800 Gauss. The predicted simulated performance of the nonreciprocal phase shifter was from a reference phase of at 0 A/m at the same saturation magnetization. A return loss better than 20 dB and an insertion loss less than 1.5 dB were predicted for the two models. © 2015 Wiley Periodicals, Inc. Int J RF and Microwave CAE 25:502–509, 2015.     

基于单片机控制的数字移相器设计

本文介绍了一种基于单片机控制的数字移相器，其采用环形队列实现信号波形的任意相位移相，且保持波形的幅度、频率不变。文中对其软、硬件的设计作了较为详细的阐述。     

A small size Ka band six-bit DMTL phase shifter using new design of MEMS switch

Microsystem Technologies - This paper presents a new design of MEMS switch to achieve a six-bit small size and low loss DMTL phase shifter. In the proposed structure two electrodes are added to the...     

Online and offline BIST in IP-core design

This article presents an online and offline built-in self-test architecture implemented as an SRAM intellectual-property core for telecommunication applications. The architecture combines fault-latency reduction, code-based fault detection, and architecture-based fault avoidance to meet reliability constraints     

存储器内建自测试技术在芯片设计中的应用

针对SoC芯片中存储器模块的测试问题,在结合设计工具的基础上,提出了存储器的测试结构和方法,并且讨论了存储器模型的应用与调试.     

A low cost approach for the fabrication of microwave phase shifter on laminates

This paper presents a simple and low cost fabrication approach using extended printed circuit board processing techniques for an electrostatically actuated phase shifter on a common microwave laminate. This approach uses 15 μm thin copper foils for realizing the bridge structures as well as for a spacer. A polymeric thin film deposited by spin coating and patterned using lithographic process is used as a dielectric layer to improve the reliability of the device. The prototype of the phase shifter for X-band operation is fabricated and tested for electrical and electromechanical performance parameters. The realized devices have a figure of merit of 70°/dB for a maximum applied bias potential of 85 V. Since these phase shifters can be conveniently fabricated directly on microwave substrates used for feed distribution networks of phased arrays, the overall addition in cost, dimensions and processing for including these phase shifters in these arrays is minimal.