Impacts of $hbox{N}_{2}$ and $hbox{NH}_{3}$ Plasma Surface Treatments on High-Performance LTPS-TFT With High-$kappa$ Gate Dielectric

Low-temperature polycrystalline-silicon thin-film transistors (LTPS-TFTs) with high- $kappa$ gate dielectrics and plasma surface treatments are demonstrated for the first time. Significant field-effect mobility $mu_{rm FE}$ improvements of $sim$86.0% and 112.5% are observed for LTPS-TFTs with $hbox{HfO}_{2}$ gate dielectric after $hbox{N}_{2}$ and $ hbox{NH}_{3}$ plasma surface treatments, respectively. In addition, the $hbox{N}_{2}$ and $ hbox{NH}_{3}$ plasma surface treatments can also reduce surface roughness scattering to enhance the field-effect mobility $mu_{rm FE}$ at high gate bias voltage $V_{G}$, resulting in 217.0% and 219.6% improvements in driving current, respectively. As a result, high-performance LTPS-TFT with low threshold voltage $V_{rm TH} sim hbox{0.33} hbox{V}$, excellent subthreshold swing S.S. $sim$0.156 V/decade, and high field-effect mobility $mu_{rm FE} sim hbox{62.02} hbox{cm}^{2}/hbox{V} cdot hbox{s}$ would be suitable for the application of system-on-panel.      

Performance Improvement of N-Type $hbox{TiO}_{x}$ Active-Channel TFTs Grown by Low-Temperature Plasma-Enhanced ALD

We report on performance improvement of $n$-type oxide–semiconductor thin-film transistors (TFTs) based on $hbox{TiO}_{x}$ active channels grown at 250 $^{circ}hbox{C}$ by plasma-enhanced atomic layer deposition. TFTs with as-grown $hbox{TiO}_{x}$ films exhibited the saturation mobility $(mu_{rm sat})$ as high as 3.2 $hbox{cm}^{2}/hbox{V}cdothbox{s}$ but suffered from the low on–off ratio $(I_{rm ON}/I_{rm OFF})$ of $hbox{2.0} times hbox{10}^{2}$. $hbox{N}_{2}hbox{O}$ plasma treatment was then attempted to improve $I_{rm ON}/I_{rm OFF}$. Upon treatment, the $hbox{TiO}_{x}$ TFTs exhibited $I_{rm ON}/I_{rm OFF}$ of $hbox{4.7} times hbox{10}^{5}$ and $mu_{rm sat}$ of 1.64 $hbox{cm}^{2}/hbox{V}cdothbox{s}$, showing a much improved performance balance and, thus, demonstrating their potentials for a wide variety of applications such as backplane technology in active-matrix displays and radio-frequency identification tags.      

Comparative Study of the Low-Frequency-Noise Behaviors in a-IGZO Thin-Film Transistors With $hbox{Al}_{2}hbox{O}_{3}$ and $hbox{Al}_{2}hbox{O}_{3}/hbox{SiN}_{x}$ Gate Dielectrics

A comparative study is made of the low-frequency noise (LFN) in amorphous indium–gallium–zinc oxide (a-IGZO) thin-film transistors (TFTs) with $hbox{Al}_{2}hbox{O}_{3}$ and $hbox{Al}_{2}hbox{O}_{3}/hbox{SiN}_{x}$ gate dielectrics. The LFN is proportional to $hbox{1}/f^{gamma}$, with $gamma sim hbox{1}$ for both devices, but the normalized noise for the $hbox{Al}_{2}hbox{O}_{3}/hbox{SiN}_{x}$ device is two to three orders of magnitude lower than that for the $hbox{Al}_{2} hbox{O}_{3}$ device. The mobility fluctuation is the dominant LFN mechanism in both devices, but the noise from the source/drain contacts becomes comparable to the intrinsic channel noise as the gate overdrive voltage increases in $hbox{Al}_{2}hbox{O}_{3}/hbox{SiN}_{x}$ devices. The $hbox{SiN}_{x}$ interfacial layer is considered to be very effective in reducing LFN by suppressing the remote phonon scattering from the $hbox{Al}_{2}hbox{O}_{3}$ dielectric. Hooge's parameter is extracted to $sim !!hbox{6.0} times hbox{10}^{-3}$ in $hbox{Al}_{2}hbox{O}_{3}/hbox{SiN}_{x}$ devices.      

Transparent Oxide Thin-Film Transistors Composed of Al and Sn-doped Zinc Indium Oxide

We have fabricated the transparent bottom gate thin-film transistors (TFTs) using Al and Sn-doped zinc indium oxide (AT-ZIO) as an active layer. The AT-ZIO active layer was deposited by RF magnetron sputtering at room temperature, and the AT-ZIO TFT showed a field effect mobility of 15.6 $ hbox{cm}^{2}/hbox{Vs}$ even before annealing. The mobility increased with increasing the $hbox{In}_{2}hbox{O}_{3}$ content and postannealing temperature up to 250 $^{circ}hbox{C}$. The AT-ZIO TFT exhibited a field effect mobility of 30.2 $hbox{cm}^{2}/hbox{Vs}$, a subthreshold swing of 0.17 V/dec, and an on/off current ratio of more than $10^{9}$ .      

High-Performance Poly-Silicon TFTs Using a High-$k$ $hbox{PrTiO}_{3}$ Gate Dielectric

In this letter, a polycrystalline-silicon thin-film transistor (poly-Si TFT) with a high- $k$ $hbox{PrTiO}_{3}$ gate dielectric is proposed for the first time. Compared to TFTs with a $hbox{Pr}_{2}hbox{O}_{3}$ gate dielectric, the electrical characteristics of poly-Si TFTs with a $hbox{PrTiO}_{3}$ gate dielectric can be significantly improved, such as lower threshold voltage, smaller subthreshold swing, higher $I_{rm on}/I_{rm off}$ current ratio, and larger field-effect mobility, even without any hydrogenation treatment. These improvements can be attributed to the high gate capacitance density and low grain-boundary trap state. All of these results suggest that the poly-Si TFT with a high- $k$ $hbox{PrTiO}_{3}$ gate dielectric is a good candidate for high-speed and low-power display driving circuit applications in flat-panel displays.      

AlN/GaN Insulated-Gate HEMTs With 2.3 A/mm Output Current and 480 mS/mm Transconductance

High-electron mobility transistors (HEMTs) based on ultrathin AlN/GaN heterostructures with a 3.5-nm AlN barrier and a 3-nm $hbox{Al}_{2}hbox{O}_{3}$ gate dielectric have been investigated. Owing to the optimized AlN/GaN interface, very high carrier mobility $(sim!!hbox{1400} hbox{cm}^{2}/hbox{V}cdothbox{s})$ and high 2-D electron-gas density $(sim!!kern1pthbox{2.7} times hbox{10}^{13} /hbox{cm}^{2})$ resulted in a record low sheet resistance $(sim !!hbox{165} Omega/hbox{sq})$. The resultant HEMTs showed a maximum dc output current density of $simkern1pt$2.3 A/mm and a peak extrinsic transconductance $g_{m,{rm ext}} sim hbox{480} hbox{mS/mm}$ (corresponding to $g_{m,{rm int}} sim hbox{1} hbox{S/mm}$). An $f_{T}/f_{max}$ of 52/60 GHz was measured on $hbox{0.25} times hbox{60} muhbox{m}^{2}$ gate HEMTs. With further improvements of the ohmic contacts, the gate dielectric, and the lowering of the buffer leakage, the presented results suggest that, by using AlN/GaN heterojunctions, it may be possible to push the performance of nitride HEMTs to current, power, and speed levels that are currently unachievable in AlGaN/GaN technology.      

High-Performance $hbox{In}_{0.7}hbox{Ga}_{0.3}hbox{As}$ -Channel MOSFETs With High-$kappa$ Gate Dielectrics and $alpha$-Si Passivation

Long and short buried-channel $hbox{In}_{0.7}hbox{Ga}_{0.3}hbox{As}$ MOSFETs with and without $alpha$-Si passivation are demonstrated. Devices with $alpha$-Si passivation show much higher transconductance and an effective peak mobility of 3810 $hbox{cm}^{2}/ hbox{V} cdot hbox{s}$. Short-channel MOSFETs with a gate length of 160 nm display a current of 825 $muhbox{A}/muhbox{m}$ at $V_{g} - V_{t} = hbox{1.6} hbox{V}$ and peak transconductance of 715 $muhbox{S}/muhbox{m}$. In addition, the virtual source velocity extracted from the short-channel devices is 1.4–1.7 times higher than that of Si MOSFETs. These results indicate that the high-performance $hbox{In}_{0.7}hbox{Ga}_{0.3} hbox{As}$-channel MOSFETs passivated by an $alpha$ -Si layer are promising candidates for advanced post-Si CMOS applications.      

High-Density and Low-Leakage-Current MIM Capacitor Using Stacked $hbox{TiO}_{2}/hbox{ZrO}_{2}$ Insulators

We have fabricated high-$kappa hbox{Ni}/hbox{TiO}_{2}/hbox{ZrO}_{2}/ hbox{TiN}$ metal–insulator–metal (MIM) capacitors. A low leakage current of $hbox{8} times hbox{10}^{-8} hbox{A/cm}^{2}$ at 125 $^{circ}hbox{C}$ was obtained with a high 38- $hbox{fF}/muhbox{m}^{2}$ capacitance density and better than the $hbox{ZrO}_{2}$ MIM capacitors. The excellent device performance is due to the lower electric field in 9.5-nm-thick $hbox{TiO}_{2}/ hbox{ZrO}_{2}$ devices to decrease the leakage current and to a higher $kappa$ value of 58 for $ hbox{TiO}_{2}$ as compared with that of $hbox{ZrO}_{2}$ to preserve the high capacitance density.      

Low-Temperature-Processed Inorganic Gate Dielectrics for Plastic-Substrate-Based Organic Field-Effect Transistors

Low-temperature-processed inorganic gate dielectrics were employed here to yield high-performance organic field-effect transistors (FETs) on flexible plastic substrates. $hbox{SiN}_{x}$ dielectrics deposited at room temperature and $hbox{SiN}_{x}$ /sol–gel silica dielectric bilayer processed below 100 $^{ circ}hbox{C}$ were demonstrated to be viable gate dielectric materials, with the latter yielding effective field-effect mobilities of $sim!!hbox{1} hbox{cm}^{2}/hbox{V} cdothbox{s}$ at operating voltages of under $-$ 5 V with an on–off current ratio in the range of $hbox{10}^{5}$ . The enhancement in device performance was attributed to an improved semiconductor–dielectric interface and a larger grain size of the pentacene deposited on the bilayer dielectrics. The flexibility of FETs fabricated on polyester substrates was also demonstrated with insignificant changes in device performance upon subjecting the devices to strains of 2.27%.      

Improved Electrical Characteristics of Amorphous Oxide TFTs Based on $hbox{TiO}_{x}$ Channel Layer Grown by Low-Temperature MOCVD

We report on the fabrication of n-type thin-film transistors (TFTs) based on $hbox{TiO}_{x}$ channels grown by the metal–organic chemical vapor deposition method with the chamber temperature of 250 $^{circ}hbox{C}$. These TFTs exhibit ideal characteristics with the flat saturation, low subthreshold swing, and narrow hysteresis window, all of which are a clear improvement from our previous work based on $ hbox{TiO}_{2}$ nanoparticles. The $hbox{TiO}_{x}$ film in this letter is identified to be in the amorphous phase from X-ray diffraction analysis, and its carrier density is estimated to be $hbox{2.6} times hbox{10}^{17} hbox{cm}^{-3}$ from the transmission line model and analysis of TFT on-resistance measured at various gate biases and channel lengths.      

High Microwave-Noise Performance of AlGaN/GaN MISHEMTs on Silicon With Gate Insulator Grown by ALD

High microwave-noise performance is realized in AlGaN/GaN metal–insulator semiconductor high-electron mobility transistors (MISHEMTs) on high-resistivity silicon substrate using atomic-layer-deposited (ALD) $hbox{Al}_{2}hbox{O}_{3}$ as gate insulator. The ALD $hbox{Al}_{2}hbox{O}_{3}/hbox{AlGaN/GaN}$ MISHEMT with a 0.25- $muhbox{m}$ gate length shows excellent microwave small signal and noise performance. A high current-gain cutoff frequency $f_{T}$ of 40 GHz and maximum oscillation frequency $f_{max}$ of 76 GHz were achieved. At 10 GHz, the device exhibits low minimum-noise figure $(hbox{NF}_{min})$ of 1.0 dB together with high associate gain $(G_{a})$ of 10.5 dB and low equivalent noise resistance $(R_{n})$ of 29.2 $Omega$. This is believed to be the first report of a 0.25-$muhbox{m}$ gate-length GaN MISHEMT on silicon with such microwave-noise performance. These results indicate that the AlGaN/GaN MISHEMT with ALD $hbox{Al}_{2}hbox{O}_{3}$ gate insulator on high-resistivity Si substrate is suitable for microwave low-noise applications.      

High-Performance Al–Sn–Zn–In–O Thin-Film Transistors: Impact of Passivation Layer on Device Stability

We fabricated high-performance thin-film transistors (TFTs) with an amorphous-Al–Sn–Zn–In–O (a-AT-ZIO) channel deposited by cosputtering using a dual Al–Zn–O and In–Sn–O target. The fabricated AT-ZIO TFTs, which feature a bottom-gate and bottom-contact configuration, exhibited a high field-effect mobility of 31.9 $ hbox{cm}^{2}/hbox{V}cdothbox{s}$, an excellent subthreshold gate swing of 0.07 V/decade, and a high $I_{{rm on}/{rm off}}$ ratio of $≫hbox{10}^{9}$, even below the process temperature of 250 $^{circ}hbox{C}$. In addition, we demonstrated that the temperature and bias-induced stability of the bottom-gate TFT structure can significantly be improved by adopting a suitable passivation layer of atomic-layer-deposition-derived $hbox{Al}_{2} hbox{O}_{3}$ thin film.      

Ultrathin Si Thin-Film Transistor on Glass

We have studied the fabrication of ultrathin single-crystalline-silicon thin-film transistors (TFTs) on glass. The single-crystalline Si layer was transferred to glass by hydrogen implantation and anodic bonding. The thickness of the silicon-on-glass (SiOG) was controlled down to 10 nm by dry etching. The p-channel SiOG TFTs with 10-nm-thick Si exhibited the field-effect mobility of 134.9 $hbox{cm}^{2}/hbox{V}cdot hbox{s}$, threshold voltage of $-$1.5 V, and gate voltage swing of 0.13 V/dec. The TFTs were found to be stable against gate bias stress of $+$30 or $-$30 V.      

Pentacene-Based Low-Voltage Strain Sensors With PVP/$ hbox{Ta}_{2}hbox{O}_{5}$ Hybrid Gate Dielectrics

Field-controllable pentacene-semiconductor-based strain sensors were fabricated with hybrid gate dielectrics using polyvinyl phenol (PVP) and high-$k$ inorganic tantalum pentoxide $(hbox{Ta}_{2}hbox{O}_{5})$ onto polyethylene naphthalate films. The $hbox{Ta}_{2}hbox{O}_{5}$ gate-dielectric layer combined with a thin PVP layer to form very smooth and hydrophobic surfaces turns out to improve the molecular structures of pentacene films significantly. The PVP– $hbox{Ta}_{2}hbox{O}_{5}$ hybrid-gate-dielectric films exhibit a high dielectric constant of 19.27 and a leakage-current density of as low as 100 $hbox{nA/cm}^{2}$ . The sensors employing a thin-film-transistor-like Wheatstone bridge configuration able to operate at reduced voltage ($sim$4 V) show good device characteristics with a field-effect mobility of 1.89 $hbox{cm}^{2}/hbox{V} cdot hbox{s}$ and a threshold voltage of $-$0.5 V. The strain sensor characterized with bending at 45$^{circ}$ with respect to the bridge bias direction with different bending radii of 50-, 40-, 30-, 20-, and 8-mm displays output signals improved in linearity in a low range of operating voltages.      

Low-Voltage Organic Field-Effect Transistor With PMMA/$ hbox{ZrO}_{2}$ Bilayer Dielectric

This paper reports on the application of a bilayer polymethylmethacrylate (PMMA)/ $hbox{ZrO}_{2}$ dielectric in copper phthalocyanine (CuPc) organic field-effect transistors (OFETs). By depositing a PMMA layer on $hbox{ZrO}_{2}$, the leakage of the dielectric is reduced by one order of magnitude compared to single-layer $hbox{ZrO}_{2}$. A high-quality interface is obtained between the organic semiconductor and the combined insulators. By integrating the advantages of polymer and high- $k$ dielectrics, the device achieves both high mobility and low threshold voltage. The typical field-effect mobility, threshold voltage, on/off current ratio, and subthreshold slope of OFETs with bilayer dielectric are $hbox{5.6}timeshbox{10}^{-2} hbox{cm}^{2}/hbox{V} cdot hbox{s}$, 0.8 V, $hbox{1.2} times hbox{10}^{3}$, and 2.1 V/dec, respectively. By using the bilayer dielectrics, the hysteresis observed in the devices with single-layer $hbox{ZrO}_{2}$ is no longer present.      

AlGaN/GaN HEMTs With Low Leakage Current and High On/Off Current Ratio

In this letter, we propose using an oxide-filled isolation structure followed by $hbox{N}_{2}/hbox{H}_{2}$ postgate annealing to reduce the leakage current in AlGaN/GaN HEMTs. An off-state drain leakage current that is smaller than $hbox{10}^{-9} hbox{A/mm}$ (minimum $hbox{5.1} times hbox{10}^{-10} hbox{A/mm}$) can be achieved, and a gate leakage current in the range of $hbox{7.8} times hbox{10}^{-10}$ to $hbox{9.2} times hbox{10}^{-11} hbox{A/mm}$ ($V_{rm GS}$ from $-$10 to 0 V and $V_{rm DS} = hbox{10} hbox{V}$) is obtained. The substantially reduced leakage current results in an excellent on/off current ratio that is up to $hbox{1.5} times hbox{10}^{8}$. An improved flicker noise characteristic is also observed in the oxide-filled devices compared with that in the traditional mesa-isolated GaN HEMTs.      

The Electrical and Interfacial Properties of Metal-High-$kappa$ Oxide-Semiconductor Field-Effect Transistors With $hbox{LaAlO}_{3}$ Gate Dielectric

$hbox{LaAlO}_{3}$ is a promising candidate for gate dielectric of future VLSI devices. In this letter, n-channel metal–oxide–semiconductor field-effect transistors with $hbox{LaAlO}_{3}$ gate dielectric were fabricated, and the electron mobility degradation mechanisms were studied. The leakage current density is $hbox{7.6} times hbox{10}^{-5} hbox{A/cm}^{2}$ at $-!$ 1 V. The dielectric constant is 17.5. The surface-recombination velocity, the minority-carrier lifetime, and the effective capture cross section of surface states were extracted from gated-diode measurement. The rate of threshold voltage change with temperature $(Delta V_{T} / Delta T)$ from 11 K to 400 K is $-!$ 1.51 mV/K, and the electron mobility limited by surface roughness is proportional to $E_{rm eff}^{-0.66}$.      

$hbox{TiN/ZrO}_{2}$/Ti/Al Metal–Insulator–Metal Capacitors With Subnanometer CET Using ALD-Deposited $hbox{ZrO}_{2}$ for DRAM Applications

We provide the first report of the structural and electrical properties of $hbox{TiN/ZrO}_{2}$/Ti/Al metal–insulator–metal capacitor structures, where the $hbox{ZrO}_{2}$ thin film (7–8 nm) is deposited by ALD using the new zirconium precursor ZrD-04, also known as Bis(methylcyclopentadienyl) methoxymethyl. Measured capacitance–voltage ($C$– $V$) and current–voltage ( $I$–$V$) characteristics are reported for premetallization rapid thermal annealing (RTP) in $hbox{N}_{2}$ for 60 s at 400 $^{circ}hbox{C}$, 500 $^{circ}hbox{C}$, or 600 $^{ circ}hbox{C}$. For the RTP at 400 $^{circ}hbox{C}$ , we find very low leakage current densities on the order of nanoamperes per square centimeter at a gate voltage of 1 V and low capacitance equivalent thickness values of $sim$ 0.9 nm at a gate voltage of 0 V. The dielectric constant of $ hbox{ZrO}_{2}$ is 31 $pm$ 2 after RTP treatment at 400 $^{circ}hbox{C}$.      

Microwave ZnO Thin-Film Transistors

We have developed ZnO thin-film transistor design and fabrication techniques to demonstrate microwave frequency operation with 2-$muhbox{m}$ gate length devices produced on GaAs substrates. Using $hbox{SiO}_{2}$ gate insulator and pulsed laser deposited ZnO active layers, a drain–current on/off ratio of $hbox{10}^{12}$, a drain–current density of 400 mA/mm, a field-effect mobility of $hbox{110} hbox{cm}^{2}!/ hbox{V}!cdothbox{s}$, and a subthreshold gate voltage swing of 109 mV/dec were achieved. Devices with Ti-gate metal had current and power gain cutoff frequencies of 500 and 400 MHz, respectively.      

Electrical Properties of $hbox{Ga}_{2}hbox{O}_{3}/ hbox{GaAs}$ Interfaces and GdGaO Dielectrics in GaAs-Based MOSFETs

Electrical properties of $hbox{Ga}_{2}hbox{O}_{3}/hbox{GaAs}$ interfaces with GdGaO cap dielectrics used in recent enhancement-mode GaAs-based NMOSFETs which perform in line with theoretical model predictions are presented. Capacitors with GdGaO thickness ranging from 3.0 to 18 nm ($hbox{0.9} leq hbox{EOT} leq hbox{3.9} hbox{nm}$) have been characterized by capacitance–voltage measurements. Midgap interface state density $D_{rm it}$, effective workfunction $phi_{m}$, fixed charge $Q_{f}$, dielectric constant $kappa$, and low field leakage current density are $hbox{2} times hbox{10}^{11} hbox{cm}^{-2} cdot hbox{eV}^{-1}$, 4.93 eV, $-hbox{8.9} times hbox{10}^{11} hbox{cm}^{-2}$, 19.5, and $hbox{10}^{-9}{-} hbox{10}^{-8} hbox{A/cm}^{2}$, respectively. The presence of interfacial Gd was confirmed to dramatically degrade electrical interface properties. The data illuminate the intimate interplay between heterostructure and interface engineering to achieve optimum MOSFET operation.