Flexible metal-insulator-metal capacitor using plasma enhanced binary hafnium-zirconium-oxide as gate dielectric layer

We have used a sol-gel spin-coating process to fabricate a new metal-insulator-metal capacitor comprising 10-nm thick binary hafnium-zirconium-oxide (Hf_xZr_1−xO₂) film on a flexible polyimide (PI) substrate. The surface morphology of this Hf_xZr_1−xO₂ film was investigated using atomic force microscopy and scanning electron microscopy, which confirmed that continuous and crack-free film growth had occurred on the PI. After oxygen plasma pre-treatment and subsequent annealing at 250 °C, the film on the PI substrate exhibited a low leakage current density of 3.22 × 10⁻⁸ A/cm² at −10 V and maximum capacitance densities of 10.36 fF/μm² at 10 kHz and 9.42 fF/μm² at 1 MHz. The as-deposited sol-gel film was oxidized when employing oxygen plasma at a relatively low temperature (∼250 °C), thereby enhancing the electrical performance.     

Microstructure and electrical characteristics of Ba0.65Sr0.35TiO3 thin films etched in CF4/Ar/O2 plasma

Radio frequency magnetron sputtered Ba_0.65Sr_0.35TiO₃ (BST) thin films were etched in CF₄/Ar/O₂ plasma by magnetically enhanced reactive ion etching technique. The etching characteristics of BST films were characterized in terms of microstructure and electrical properties. Atomic force microscopy and X-ray diffraction results indicate that the microstructure of the etched BST film is degraded because of the rugged surface and lowered intensities of BST (1 0 0), (1 1 0), (1 1 1) and (2 0 0) peaks compared to the unetched counterparts. Dielectric constant and dielectric dissipation of the unetched, etched and postannealed-after-etched BST film capacitors are 419, 346, 371, 0.018, 0.039 and 0.031 at 100 kHz, respectively. The corresponding dielectric tunability, figure of merit and remnant polarization are 19.57%, 11.56%, 17.25%, 10.87, 2.96, 5.56, 3.62 μC/cm², 2.32 and 2.81 μC/cm² at 25 V, respectively. The leakage current density of 1.75 × 10⁻⁴ A/cm² at 15 V for the etched BST capacitor is over two orders of magnitude higher than 1.28 × 10⁻⁶ A/cm² for the unetched capacitor, while leakage current density of the postannealed-after-etched capacitor decreases slightly. It means that the electrical properties of the etched BST film are deteriorated due to the CF₄/Ar/O₂ plasma-induced damage. Furthermore, the damage is alleviated, and the degraded microstructure and electrical properties are partially recovered after the etched BST film is postannealed at 923 K for 20 min under a flowing O₂ ambience.     

Fabrication and characterization of Zr-rich Zr-aluminate films for high-κ gate dielectric applications

Two kinds of Zr-rich Zr-aluminate films for high-κ gate dielectric applications with the nominal composition of (ZrO₂)_0.8(Al₂O₃)_0.2 and (ZrO₂)_0.9(Al₂O₃)_0.1, were deposited on n-type silicon wafer by pulsed laser deposition (PLD) technique at different deposition conditions. X-ray diffraction (XRD) reveals that the (ZrO₂)_0.8(Al₂O₃)_0.2 film could remain amorphous after being rapid thermal annealed (RTA) at the temperature above 800 °C, while the other one displays some crystalline peaks at 700 °C. The energy gap calculated from optical transmittance spectrum of (ZrO₂)_0.8(Al₂O₃)_0.2 film on quartz is about 6.0 eV. Sputtering depth profile of X-ray photoelectron spectroscopy and Auger electron spectroscopy indicate that a Zr-Si-O interfacial layer was formed at the near surface of the silicon substrate. The dielectric constant of the (ZrO₂)_0.8(Al₂ O₃)_0.2 film has been determined to be 22.1 by measuring a Pt/(ZrO₂)_0.8(Al₂ O₃)_0.2/Pt MIM structure. An EOT of 1.76 nm with a leakage current density of 51.5 mA/cm² at 1 V gate voltage for the film deposited in N₂ were obtained. Two different pre-treatments of Si substrates prior to depositions were also carried out and compared. The results indicate that a surface-nitrided Si substrate can lead to a lower leakage current density. The amorphous Zr-rich Zr-aluminate films fabricated by PLD have promising structure and dielectric properties required for a candidate material for high-κ gate dielectric applications.     

New TIT capacitor with ZrO2/Al2O3/ZrO2 dielectrics for 60 nm and below DRAMs

New ZrO₂/Al₂O₃/ZrO₂ (ZAZ) dielectric film was successfully developed for DRAM capacitor dielectrics of 60 nm and below technologies. ZAZ dielectric film grown by ALD has a mixture structure of crystalline phase ZrO₂ and amorphous phase Al₂O₃ in order to optimize dielectric properties. ZAZ TIT capacitor showed small Tox.eq of 8.5 Å and a low leakage current density of 0.35 fA/cell, which meet leakage current criteria of 0.5 fA/cell for mass production. ZAZ TIT capacitor showed a smaller cap leak fail bit than HAH capacitor and stable leakage current up to 550 °C anneal. TDDB (time dependent dielectric breakdown) behavior reliably satisfied the 10-year lifetime criteria within operation voltage range.     

A novel thermally-stable zirconium amidinate ALD precursor for ZrO2 thin films

ZrO₂ thin films were deposited by the atomic layer deposition process on Si substrates using tetrakis(N,N′-dimethylacetamidinate) zirconium (Zr-AMD) as a Zr precursor and H₂O as an oxidizing agent. Tetrakis (ethylmethylamino) zirconium (TEMA-Zr) was also evaluated for a comparative study. Physical properties of ALD-derived ZrO₂ thin films were studied using ellipsometry, grazing incidence XRD (GI-XRD), high resolution TEM (HRTEM), and atomic force microscopy (AFM). The ZrO₂ deposited using Zr-AMD showed a better thermal stability at high substrate temperature (>300 °C) compared to that using TEMA-Zr. GI-XRD analysis reveals that after 700 °C anneal both ZrO₂ films enter tetragonal phase. The electrical properties of N₂-annealed ZrO₂ film using Zr-AMD exhibit an EOT of 1.2 nm with leakage current density as low as 2 × 10⁻³ A/cm² (@V_fb−1 V). The new Zr amidinate is a promising ALD precursor for high-k dielectric applications.     

Optimization of Pb(Zr0.53,Ti0.47)O3 films for micropower generation using integrated cantilevers

Lead zirconate titanate, Pb(Zr_0.53,Ti_0.47)O₃ or PZT, thin films and integrated cantilevers have been fabricated for energy harvesting applications. The PZT films were deposited on PECVD SiO₂/Si substrates with a sol-gel derived ZrO₂ buffer layer. It is found that lead content in the starting solution and ramp rate during film crystallization are critical to achieving large-grained films on the ZrO₂ surface. The electrical properties of the PZT films were measured using metal-ferroelectric-metal and inter-digital electrode structures, and revealed substantial improvement in film properties by controlling the process conditions. Functional cantilevers are demonstrated using the optimized films with output of 1.4 V peak-to-peak at 1 kHz and 2.5 g.     

Pentacene thin-film transistors with sol-gel derived amorphous Ba0.6Sr0.4TiO3 gate dielectric

An amorphous Ba_0.6Sr_0.4TiO₃ (BST) film with the thickness of 200 nm was deposited on indium-tin-oxide (ITO)-coated glass substrate through sol-gel route and post-annealing at 500 °C. The dielectric constant of the BST film was determined to be 20.6 at 100 kHz by measuring the Ag/BST/ITO parallel plate capacitor, and no dielectric tunability was observed with the bias voltage varying from −5 to 5 V. The BST film shows a dense and uniform microstructure as well as a smooth surface with the root-mean-square (RMS) roughness of about 1.4 nm. The leakage current density was found to be 3.5 × 10⁻⁸ A/cm² at an applied voltage of −5 V. The transmittance of the BST/ITO/glass structure is more than 70% in the visible region. Pentacene based transistor using the as-prepared BST film as gate insulator exhibits a low threshold voltage of −1.3 V, the saturation field-effect mobility of 0.68 cm²/Vs, and the current on/off ratio of 3.6 × 10⁵. The results indicate that the sol-gel derived BST film is a promising high-k gate dielectric for large-area transparent organic transistor arrays on glass substrate.     

MOS devices with tetragonal ZrO2 as gate dielectric formed by annealing ZrO2/Ge/ZrO2 laminate

A Ge-stabilized tetragonal ZrO₂ (t-ZrO₂) film with permittivity (κ) of 36.2 was formed by depositing a ZrO₂/Ge/ZrO₂ laminate and a subsequent annealing at 600 °C, which is a more reliable approach to control the incorporated amount of Ge in ZrO₂. On Si substrates, with thin SiON as an interfacial layer, the SiON/t-ZrO₂ gate stack with equivalent oxide thickness (EOT) of 1.75 nm shows tiny amount of hysteresis and negligible frequency dispersion in capacitance-voltage (C-V) characteristics. By passivating leaky channels derived from grain boundaries with NH₃ plasma, good leakage current of 4.8 × 10⁻⁸ A/cm² at V_g = V_fb − 1 V is achieved and desirable reliability confirmed by positive bias temperature instability (PBTI) test is also obtained.     

Low-cost supercritical CO2/H2O2 treatment on ITO anodes of fluorescent organic light-emitting diodes

A simple and cost-effective approach is proposed as an alternative to conventional oxygen plasma treatment to modify surface property of Indium tin oxide (ITO) anode of a fluorescent organic light-emitting diode (OLED). This was achieved by treating the ITO anode in supercritical CO₂ (SCCO₂) fluids with hydrogen peroxide (H₂O₂). The SCCO₂/H₂O₂ treatment yielded an ITO work function of 5.35 eV after 15 min treatment at 85 °C and 4000 psi, which was significant higher than 4.8 eV of the as-cleaned ITO surface and was slightly less than 5.5 eV of the ITO surface treated by oxygen plasma. The highest work function achieved was 5.55 eV after 45 min SCCO₂/H₂O₂ treatment. The SCCO₂/H₂O₂ treatment can be used to tailor the ITO work function through changing the operation pressure of the treatment. In addition, the correlated dependence of OLED performance on the ITO anodes with and without the treatments was investigated. The maximum power efficiency of 1.94 lm/W was obtained at 17.3 mA/cm² for the device with 15 min SCCO₂/H₂O₂ treatment at 4000 psi. This power efficiency was 19.3% and 33.8% higher than those of the oxygen plasma treatment and as-clean, respectively. The improvement in device efficiency by the SCCO₂/H₂O₂ treatments can be attributed to enhanced hole injection and balance in charge carriers due to increased work function and surface energy of the ITO anodes.     

Ferroelectric and leakage current characteristics of (Pb0.72La0.28)Ti0.93O3 thin films prepared by a sol-gel process

(Pb_1 − xLa_x)Ti_1 − x/4O₃(x = 28 mol%, denoted as PLT) thin films were grown on Pt/Ti/SiO₂/Si substrates by using a sol-gel process. The Pt/PLT/Pt film capacitor showed well-saturated hysteresis loops at an applied electric field of 500 kV/cm with spontaneous polarization (P_s), remanent polarization (P_r) and coercive electric field (E_c) values of 9.23 μC/cm², 0.53 μC/cm² and 19.7 kV/cm, respectively. At 100 kHz, the dielectric constant and dissipation factor of the film were 748 and 0.026, respectively. The leakage current density is lower than 1.0 × 10⁻⁷ A/cm²over the electric field range of 0 to 200 kV/cm. And the Pt/PLT interface exist a Schottky emission characteristics.     

Etching characteristics and plasma-induced damage of Ba0.65Sr0.35TiO3 thin films etched in CF4/Ar/O2 plasma

Sol-gel-derived Ba_0.65Sr_0.35TiO₃ (BST) thin films were etched in CF₄/Ar/O₂ plasma using magnetically enhanced reactive ion etching technology. The maximum etch rate of BST film is 8.47 nm/min when CF₄/Ar/O₂ gas mixing ratio is equal to 9/36/5. X-ray photoelectron spectroscopy analysis indicates the accumulation of fluorine-containing by-products on the etched surface due to their poor volatility, resulting in (Ba,Sr)-rich and (Ti,O)-deficient etched surface. Compared to the unetched counterparts, the etched Ba 3d_5/2, Ba 3d_3/2, Sr 3d_5/2, Sr 3d_3/2, Ti 2p_3/2, Ti 2p_1/2 and O 1s photoelectron peaks shift towards higher binding energy regions by amounts of 1.31, 1.30, 0.60, 0.79, 0.09, 0.46 and 0.50 eV, respectively. X-ray diffraction (XRD) analysis reveals that intensities of the etched BST (1 0 0), (1 1 0), (2 0 0) and (2 1 1) peaks are lowered and broadened. Raman spectra confirm that the Raman peaks of the etched film shift towards lower wave number regions with the values of 7, 6, 4 and 4 cm⁻¹, and the corresponding phonon lifetimes are longer than those of the unetched film because of the plasma-induced damage. When the etched films are postannealed at 650 °C for 20 min under an O₂ ambience, the chemical shifts of Ba 3d, Sr 3d, Ti 2p and O 1s peaks, the variations for atomic concentrations of Ba, Sr, Ti and O, and the Raman redshifts are reduced, while the corresponding XRD peak intensities increase. It is conceivable that the plasma-induced damage of the etched film could be partially recovered during the postannealing process.     

The structural and electrical properties of the SrTa2O6/In0.53Ga0.47As/InP system

The structural and electrical properties of SrTa₂O₆(SrTaO)/n-In_0.53GaAs_0.47(InGaAs)/InP structures where the SrTaO was grown by atomic vapor deposition, were investigated. Transmission electron microscopy revealed a uniform, amorphous SrTaO film having an atomically flat interface with the InGaAs substrate with a SrTaO film thickness of 11.2 nm. The amorphous SrTaO films (11.2 nm) exhibit a dielectric constant of ∼20, and a breakdown field of >8 MV/cm. A capacitance equivalent thickness of ∼1 nm is obtained for a SrTaO thickness of 3.4 nm, demonstrating the scaling potential of the SrTaO/InGaAs MOS system. Thinner SrTaO films (3.4 nm) exhibited increased non-uniformity in thickness. From the capacitance-voltage response of the SrTaO (3.4 nm)/n-InGaAs/InP structure, prior to any post deposition annealing, a peak interface state density of ∼2.3 × 10¹³ cm⁻² eV⁻¹ is obtained located at ∼0.28 eV (±0.05 eV) above the valence band energy (E_v) and the integrated interface state density in range E_v + 0.2 to E_v + 0.7 eV is 6.8 × 10¹² cm⁻². The peak energy position (0.28 ± 0.05 eV) and the energy distribution of the interface states are similar to other high-k layers on InGaAs, such as Al₂O₃ and LaAlO₃, providing further evidence that the interface defects in the high-k/InGaAs system are intrinsic defects related to the InGaAs surface.     

Effect of plasma treatments on interface chemistry and adhesion strength between porous SiO2 low-k film and SiC/SiN layers

In this study, the interface chemistry and adhesion strengths between porous SiO₂ low-dielectric-constant film and SiN capping layer as well as SiC etch stop layer have been investigated under different plasma treatments. Elements of Si, O, and N constructed an interlayer region with mixing Si-N and Si-O bonds at the interface between the porous SiO₂ film and SiN capping layer. After plasma treatments especially O₂ plasma, the oxygen content at the interface increased, and the binding energy obviously shifted to a higher level. Under nanoindentation and nanoscratch tests, interface delamination occurred, and the interface adhesion strength was accordingly measured. After plasma treatments especially the O₂ plasma, more Si-O bonds of high binding energy existed at the interface, and thus the interface adhesion strength was effectively improved. The adhesion energy of SiO₂/SiN and SiC/SiO₂ interfaces was enhanced to 4.7 and 10.5 J/m² measured by nanoindentation test, and to 1.3 and 2.0 J/m² by nanoscratch test, respectively.     

Electrical properties and interfacial chemical environments of in situ atomic layer deposited Al2O3 on freshly molecular beam epitaxy grown GaAs

Interfacial chemical analyses and electrical characterization of in situ atomic layer deposited (ALD) Al₂O₃ on freshly molecular beam epitaxy (MBE) grown n- and p- GaAs (001) with a (4 × 6) surface reconstruction are performed. The capacitance-voltage (C-V) characteristics of as-deposited and 550 °C N₂ annealed samples are correlated with their corresponding X-ray photoelectron spectroscopy (XPS) interfacial analyses. The chemical bonding for the as-deposited ALD-Al₂O₃/n- and p-GaAs interface is similar, consisting of Ga₂O (Ga¹⁺) and As-As bonding (As⁰) without any detectable arsenic oxides or Ga₂O₃; the interfacial chemical environments remained unchanged after 550 °C N₂ annealing for 1hr. Both as-deposited and annealed p-GaAs metal-oxide-semiconductor capacitors (MOSCAPs) exhibit C-V characteristics with small frequency dispersion (<5%). In comparison, n-GaAs MOSCAPs shows much pronounced frequency dispersion than their p-counterparts.     

Electrical properties of vacuum annealed La2O3 thin films grown by E-beam evaporation

In this article, the conduction mechanisms of metal-oxide-semiconductor with vacuum annealed Lanthana (La₂O₃) oxide film are investigated. Lanthana films with thicknesses of 3.5, 4.7, and 11 nm were deposited by E-beam evaporation on n-Si (100), and annealed at various temperatures (300-500 °C) in ultra-high vacuum (10⁻¹⁰-10⁻⁹ Torr) for 90 min. From the measurement of spectroscopic ellipsometry, it is found that film thickness is increased with annealing temperature, which would be cause of flat-band voltage shift (ΔV_FB) due to the growth of interfacial layer. From the capacitance measurement, it is found that ΔV_FB of the film is reduced by post-deposition anneal (PDA) compared to that of as-deposited film, but increase again at high temperature annealing, especially in the case of thin film (3.5 nm). From the applied voltage and temperature dependence of the leakage current of the film, with different gate electrode materials (Ag, Al, and Pt), it is shown that the leakage currents are associated with ohmic and Poole-Frenkel (P-F) conductions when flat-band voltage (V_FB) is less than zero, and ohmic and Space-Charge-Limited Current (SCLC) conductions when V_FB is greater than zero. The dielectric constants obtained from P-F conduction for Al gate electrode case is found to be 11.6, which is consistent with the C-V result 11.9. Barrier height of trap potential well is found to be 0.24 eV from P-F conduction. Based on SCLC theory, leakage currents of 3.5 and 11 nm films with different PDA temperatures are explained in terms of oxide trap density.     

Optical properties of Zr and ZrO2 films deposited by laser ablation

Optical properties of Zr and ZrO₂ films in the energy range from 1.5 to 100 eV were obtained by quantitative analysis of reflection electron energy loss spectroscopy (REELS) and ellipsometry. The films were prepared on (1 1 1) silicon substrates by reactive laser ablation using a zirconium target. For the growth of ZrO₂ films a pressure of 5 mTorr of oxygen in the growth chamber was used. The substrate temperature during deposition was . The deposits were studied ex situ by X-ray diffraction (XRD) and in situ by X-ray photoelectron spectroscopy (XPS) and REELS. The ZrO₂ films were found to be polycrystalline with monoclinic structure. The XPS results showed that the oxygen pressure used is the optimal control to produce ZrO₂ films by laser ablation. A gap of 5 eV for the ZrO₂ film was measured by REELS.     

Electrical and reliability characteristics of GaAs MOSHEMTs utilizing high-k IIIB and IVB oxide layers

In this work, the high-k material of gadolinium oxide layer (Gd₂O₃) and zirconium oxide layer (ZrO₂) thin films were fabricated as the gate dielectric insulator materials in GaAs metal-oxide-semiconductor high electron mobility transistors (MOSHEMTs). The dielectric constant of Gd₂O₃ and ZrO₂ oxide layers were estimated to be 10.6 and 7.3 by the MOS-ring capacitor of C-V measurements. In addition, the thermal stability of the devices have been investigated and compared with the high-k material Gd₂O₃ and ZrO₂ thin films for reliability tests. The Gd₂O₃ MOSHEMTs achieved a better thermally stable characteristic duo to its similar lattice structure with GaAs native oxide layer. At high temperature operation, the V_BR degradation slope was 1.2 × 10⁻³ V/°C and the maximum I_ds degradation slope was 1.4 × 10⁻² mA (%)/°C. According to this, the device also showed a good reliability characteristic within 48 h. Based on measurement results, the Gd₂O₃ MOSHEMTs exhibited the best electrical characteristics, including the lowest gate leakage current, the lowest noise spectra density, and the high power performance. Therefore, the Gd₂O₃ MOSHEMTs is suitable for high power amplifier and monolithic microwave integrated circuits (MMICs) applications.     

Thermal and plasma enhanced atomic layer deposition ruthenium and electrical characterization as a metal electrode

Ruthenium thin films were grown by thermal and plasma-enhanced atomic layer deposition (PE-ALD) using O₂ and ammonia (NH₃) plasma, respectively. RuCp₂ and Ru(EtCp)₂ were used as Ru precursors. Pure and low resistivity (<20 μΩ cm) Ru films were grown by PE-ALD as well as thermal ALD. PE-ALD Ru showed no nucleation delay on various substrates including TaN_x, Si, and SiO₂, in contrast to thermal ALD Ru. And the root-mean-square (RMS) roughness of PE-ALD Ru was lower than that of thermal ALD Ru. Additionally, metal-oxide-semiconductor (MOS) capacitor composed of p-Si/ALD Ta₂O₅/ALD Ru (35 nm) was fabricated and C-V measurements were performed for as-deposited sample. Very small hysteresis of 20 mV was obtained, and effective work function difference to Si substrate was minimal as −0.03 V. For comparison, MOS capacitor was fabricated using sputtered Ru and large hysteresis of 0.5 V and flat band voltage (V_FB) shift to negative value were observed. This result indicates that ALD process produces more reliable, damage free Ru gate compared to sputtering process.     

Schottky barrier SOI-MOSFETs with high-k La(2)O(3)/ZrO(2) gate dielectrics

Schottky barrier SOI-MOSFETs incorporating a La₂O₃/ZrO₂ high-k dielectric stack deposited by atomic layer deposition are investigated. As the La precursor tris(N,N′-diisopropylformamidinato) lanthanum is used. As a mid-gap metal gate electrode TiN capped with W is applied. Processing parameters are optimized to issue a minimal overall thermal budget and an improved device performance. As a result, the overall thermal load was kept as low as 350, 400 or 500 °C. Excellent drive current properties, low interface trap densities of 1.9 × 10¹¹ eV⁻¹ cm⁻², a low subthreshold slope of 70-80 mV/decade, and an I_ON/I_OFF current ratio greater than 2 × 10⁶ are obtained.     

The electrical characteristics of Sn/methyl-red/p-type Si/Al contacts

The junction characteristics of the organic compound methyl-red film (2-[4-(dimethylamino)phenylazo]benzoic acid) on a p-type Si substrate have been studied. The current-voltage characteristics of the device have rectifying behavior with a potential barrier formed at the interface. The barrier height and ideality factor values of 0.73 eV and 3.22 for the structure have been obtained from the forward bias current-voltage (I-V) characteristics. The interface state energy distribution and their relaxation time have ranged from 1.68 × 10¹² cm⁻² eV⁻¹ and 1.68 × 10⁻³ s in (0.73-E_v) eV to 1.80 × 10¹² cm⁻² eV⁻¹ and 5.29 × 10⁻⁵ s in (0.43-E_v) eV, respectively, from the forward bias capacitance-frequency and conductance-frequency characteristics. Furthermore, the relaxation time of the interface states shows an exponential rise with bias from (0.43-E_v) eV towards (0.73-E_v) eV.