共查询到20条相似文献,搜索用时 0 毫秒
1.
Shuqi Zheng 《Microelectronics Journal》2008,39(1):53-56
The degradation of smooth SiGe epitaxial layer was investigated by transmission electron microscopy (TEM), X-ray reflectivity (XRR) and atomic force microscopy (AFM). It was shown from AFM results that the crosshatch was formed with increasing annealing temperature, which indicated the degradation of smooth surface. The surface degradation was caused by the internal dislocations, which were observed by plan-view TEM (PTEM) and cross-sectional TEM (XTEM). From XTEM, the sharp interface between SiGe top layer and Si substrate was broadened and there were a lot of 60° dislocations formed in SiGe top layer, which resulted in the crosshatch on the surface. The crosshatch was also verified by PTEM. 相似文献
2.
Tokuda T. Sakano Y. Mori D. Ohta J. Nunoshita M. Vaccaro P.O. Vorob'ev A. Kubota K. Saito N. 《Electronics letters》2004,40(21):1333-1334
A micromirror structure with SiGe/Si heteroepitaxial layer on a silicon-on-insulator (SOI) substrate using a 'Micro-origami' technique has been successfully fabricated. The micromirror is supported by two curved hinge structures. The device is driven by application of a current, and net angular displacements larger than 10/spl deg/ (static) and 30/spl deg/ (in resonance) were obtained. These values are comparable with or even larger than the reported values for other MEMS optical switches or beam scanning devices. The experimental results suggest that the movement is evoked by a thermal effect. The Micro-origami device has advantages of low operation voltage smaller than 2 V, and structural compatibility with the Si or SiGe LSIs. 相似文献
3.
Tashiro T. Tatsumi T. Sugiyama M. Hashimoto T. Morikawa T. 《Electron Devices, IEEE Transactions on》1997,44(4):545-550
A P-i-N SiGe/Si superlattice photodetector with a planar structure has been developed for Si-based opto-electronic integrated circuits. To make the planar structure, a novel SiGe/Si selective epitaxial growth technology which uses cold wall ultrahigh-vacuum/chemical vapor deposition has been newly developed. The P-i-N planar SiGe/Si photodetector has an undoped 30-Å Si0.9Ge0.1/320-Å Si, 30 periods, superlattice absorption layer, a 0.1-μm P-Si buffer layer, and a 0.2-μm P+-Si contact layer on a bonded silicon-on-insulator (ηext). The bonded SOI is used to increase the external quantum efficiency (ηext) of the photodetector. Moreover, a 63-μm deep/128-μm wide trench, to achieve simple and stable coupling of an optical fiber to the photodetector, is formed in the silicon chip. The P-i-N planar photodetector exhibits a high ηext of 25-29% with a low dark current of 0.5 pA/μm2 and a high-frequency photo response of 10.5 GHz at λ=0.98 μm 相似文献
4.
Phosphorus diffusion into strained SiGe layers was studied by different methods. Doping profiles and carrier concentration profiles N(x), depth of pn junction, Ge content in SiGe and thickness of epitaxial layer were measured and simulated. Several experimental methods such as secondary ion mass spectroscopy, spreading resistance method, Raman spectroscopy—and process simulator ISE TCAD have been used. The results obtained by different methods and at different places of work have been compared and analysed. 相似文献
5.
Vempati L.S. Cressler J.D. Babcock J.A. Jaeger R.C. Harame D.L. 《Solid-State Circuits, IEEE Journal of》1996,31(10):1458-1467
In this work a comprehensive investigation of low-frequency noise in ultrahigh vacuum/chemical vapor deposition (UHV/CVD) Si and SiGe bipolar transistors is presented. The magnitude of the noise of SiGe transistors is found to be comparable to the Si devices for the identical profile, geometry, and bias. A comparison with different technologies demonstrates that the SiGe devices have excellent noise properties compared to AlGaAs/GaAs heterojunction bipolar transistors (HBT's) and conventional Si bipolar junction transistors (BJT's). Results from different bias configurations show that the 1/f base noise source is dominant in these devices. The combination of a 1/Area dependence on geometry and near quadratic dependence on base current indicates that the 1/f noise sources are homogeneously distributed over the entire emitter area and are probably located at the polysilicon-Si interface. Generation/recombination (Gm) noise and random telegraph signal (RTS) noise was observed in selected Si and SiGe devices. The bias dependence and temperature measurements suggest that these G/R centers are located in the base-emitter space charge region. The activation energies of the G/R traps participating in these noise processes were found to be within 250 meV of the conduction and valence band edges 相似文献
6.
Si-gate CMOS devices fabricated on a lateral solid-phase epitaxial Si layer grown from vacuum-deposited amorphous Si over SiO2 patterns are discussed. Electrical characteristics are examined and correlated with microstructural characteristics of the layer by performing transmission electron microscopy on actual transistors. The layer can be divided into three regions. Carrier mobilities obtained from each region are discussed in terms of the crystalline quality. The maximum obtained field-effect mobilities are 570 cm2/V-s and 160 cm2/V-s for n-channel and p-channel transistors, respectively. The SMOS inverter chain with 100 stages and a channel length of 1.5 μm has a delay time of 310 ps per gate. These results indicate that the lateral solid-phase epitaxy has potential for the fabrication of high-speed silicon-on-insulator devices 相似文献
7.
本文采用高分辨透射电子显微技术对在Si衬底生长的GaN基多量子阱外延材料的位错特征、外延层与衬底的晶体取向关系及界面的结晶形态等微观结构进行了分析和研究.结果表明:Si衬底生长的GaN与衬底有一定的取向关系;材料在MQW附近的穿透位错密度达108 cm-2量级,且多数为刃型位错;样品A的多量子阱下方可见平行于界面方向的... 相似文献
8.
Pei-Wen Li Wei-Ming Liao Ching-Chieh Shih Tine-Shang Kuo Li-Shyue Lai Yang-Tai Tseng Tsai M.-J. 《Electron Device Letters, IEEE》2003,24(7):454-456
We have investigated the effect of substrate biasing on the subthreshold characteristics and noise levels of Si/Si/sub 1-x/Ge/sub x/ (x=0,0.15,0.3) heterostructure MOSFETs. A detailed analysis of the dependence of threshold voltage, off-state current, and low-frequency noise level on the substrate-source (V/sub bs/) biasing showed that SiGe heterostructure MOSFETs offer a significant speed advantage, an extended subthreshold operation region, a reduced noise level, and reduced bulk potential sensitivity compared to Si bulk devices. These experimental results demonstrate that SiGe heterostructure MOSFETs render a promising extension to the CMOS technologies at the low-power limit of operation, eventually making the micropower implementation of radio frequency (RF) functions feasible. 相似文献
9.
Interdigitated Ge p-i-n photodetectors fabricated on a Si substrate using graded SiGe buffer layers 总被引:2,自引:0,他引:2
Jungwoo Oh Campbell J.C. Thomas S.G. Bharatan S. Thoma R. Jasper C. Jones R.E. Zirkle T.E. 《Quantum Electronics, IEEE Journal of》2002,38(9):1238-1241
We report an interdigitated p-i-n photodetector fabricated on a 1-/spl mu/m-thick Ge epitaxial layer grown on a Si substrate using a 10-/spl mu/m-thick graded SiGe buffer layer. A growth rate of 45 /spl Aring//s/spl sim/60 /spl Aring//s was achieved using low-energy plasma enhanced chemical vapor deposition. The Ge epitaxial layer had a threading dislocation density of 10/sup 5/ cm/sup -2/ and a rms surface roughness of 3.28 nm. The 3-dB bandwidth and the external quantum efficiency were measured on a photodetector having 1-/spl mu/m finger width and 2-/spl mu/m spacing with a 25/spl times/28 /spl mu/m/sup 2/ active area. At a wavelength of 1.3 /spl mu/m, the bandwidth was 2.2, 3.5, and 3.8 GHz at bias voltages of -1, -3, and -5 V, respectively. The dark current was 3.2 and 5.0 /spl mu/A at -3 and -5 V, respectively. This photodetector exhibited an external quantum efficiency of 49% at a wavelength of 1.3 /spl mu/m. 相似文献
10.
Edward Y. Chang Tsung-Hsi Yang Guangli Luo Chun-Yen Chang 《Journal of Electronic Materials》2005,34(1):23-26
A SiGe-buffer structure for growth of high-quality GaAs layers on a Si (100) substrate is proposed. For the growth of this
SiGe-buffer structure, a 0.8-μm Si0.1 Ge0.9 layer was first grown. Because of the large mismatch between this layer and the Si substrate, many dislocations formed near
the interface and in the low part of the Si0.1Ge0.9 layer. A 0.8-μm Si0.05Ge0.95 layer and a 1-μm top Ge layer were subsequently grown. The strained Si0.05Ge0.95/Si0.1Ge0.9 and Ge/Si0.05Ge0.95 interfaces formed can bend and terminate the upward-propagated dislocations very effectively. An in-situ annealing process
is also performed for each individual layer. Finally, a 1–3-μm GaAs film was grown by metal-organic chemical vapor deposition
(MOCVD) at 600°C. The experimental results show that the dislocation density in the top Ge and GaAs layers can be greatly
reduced, and the surface was kept very smooth after growth, while the total thickness of the structure was only 5.1 μm (2.6-μm
SiGe-buffer structure +2.5-μm GaAs layer). 相似文献
11.
12.
Cynthia M. Hanson Ricardo Basco Farid Agahi Kei may Lau R. T. Lareau T. P. Monahan 《Journal of Electronic Materials》1994,23(7):649-652
Carrier concentration spikes at the epilayer/substrate interface were observed in some two-dimensional electron gas AIGaAs/GaAs
structures grown by low pressure organometallic vapor phase epitaxy. Using secondary ion mass spectroscopy, the carrier spikes
were correlated with indium. Under certain growth conditions an anomalous interfacial layer, which is compositionally inhomogeneous,
is formed producing an enhanced carrier density. Procedures are described which reduce the presence of indium at the epilayer/substrate
interface and eliminate the carrier spike. 相似文献
13.
M. V. Shaleev A. V. Novikov A. N. Yablonskiĭ O. A. Kuznetsov Yu. N. Drozdov Z. F. Krasil’nik 《Semiconductors》2007,41(2):167-171
The results of studying the photoluminescence of the structures with Ge(Si) self-assembled islands embedded into tensile-strained Si layer are reported. The structures were grown on smooth relaxed Si1 ? x Gex/Si(001) (x = 0.2–0.3) buffer layers. The photoluminescence peak found in the photoluminescence spectra of the studied structures is related to the indirect (in real space) optical transition between the holes localized in the Ge(Si) islands and electrons localized in the tensile-strained Si layers under and above an island. It is shown that one can efficiently control the position of the photoluminescence peak for a specified type of structure by varying the thickness of the strained Si layers. It is found that, at 77 K, the intensity of the photoluminescence signal from the heterostructures with Ge(Si) self-assembled islands contained between the tensile-strained Si layers exceeds by an order of magnitude the intensity of the photoluminescence signal from the GeSi structures with islands formed on the Si(001) substrates. 相似文献
14.
Epitaxial CdTe layers were grown using organometallic vapor phase epitaxy on Si substrates with a Ge buffer layer. Ge layer
was grown in the same reactor using germane gas and the reaction of germane gas with the native Si surface is studied in detail
at low temperature. It is shown that germane gas can be used to “clean” the Si surface oxide prior to CdTe growth by first
reducing the thin native oxide that may be present on Si. When Ge layer was grown on Si using germane gas, an induction period
was observed before the continuous layer of Ge growth starts. This induction period is a function of the thickness of the
native oxide present on Si and possible reasons for this behavior are outlined. Secondary ion mass spectrometry (SIMS) data
show negligible outdiffusion and cross contamination of Ge in CdTe. 相似文献
15.
The first results were reported on low temperature epitaxial growth of Si0.5Ge0.5 alloy layer on Si (100) by ion beam assisted deposition. Nucleation and the growth of Si0.5Ge0.5 alloy layer had been investigated by atomic force microscopy and reflection high energy electron diffraction analysis. The
Si0.5Ge0.5 alloy layer nucleated on Si (100) via Stranski-Krastanov (SK) mode. The Ar ion bombard-ment improved crystallinity and prolonged
layer-by-layer stage of the SK mode. The epitaxial temperature was 200°C lower than 550-600°C in molecular beam epitaxy. In
order to explain the mechanism of low temperature epitaxial growth EAr (energy transferred to growing film by bombarding Ar ion, eV/atom) value was experimentally calculated. In conclusion, the
ion bombardment induced dissociation of three-dimensional islands and enhanced the surface diffusion. The variation of tetragonal
strain and its effect on electron mobility were taken into consideration. Electron mobility increased with tetragonal strain
as a result of band split. 相似文献
16.
17.
D. Knoll B. Heinemann D. Bolze K. E. Ehwald G. Fischer D. Krüger T. Morgenstern E. Naumann P. Schley B. Tillack D. Wolansky 《Journal of Electronic Materials》1998,27(9):1022-1026
We demonstrate peak fT and fmax of 50 GHz for heterojunction bipolar transistors (HBTs) with an oxygen concentration in the epitaxial SiGe base layer of
about 1020 cm−3. These fT/fmax values are over 10 GHz higher than for identically processed HBTs with an O content of only 1018 cm−3. This is due to reduced transient enhanced diffusion of boron in the O-rich layers. However, the base carrier lifetimes are
reduced by the high oxygen content. We show that ideal base current characteristics and a low 1/fnoise level can be obtained
despite this effect by localizing the emitter-base space-charge region outside the O-rich layer. 相似文献
18.
《微纳电子技术》1993,(4)
在不同类型的部分缓解性SiGe缓冲层上生长了n型调制掺杂Si/SiGe异质结构,采用这一材料系统是为了得到足够大的导带突变。对样品进行了各种测试分析,如二次离子质谱,x光摆动像分析,透射电子显微镜分析,卢瑟福背散射分析和变温霍尔测量。在750℃生长的厚的线性渐变SiGe缓冲层样品中得到了最高的霍尔迁移率为1.5K下173000cm~2V~(-1)s~(-1)。这一层序达到的室温迁移率约为1800cm~2V~(-1)s~(-1)。发现不管是用没有Ge组分渐变的一般缓冲层,还是直接用有源层是调制掺杂SiGe势垒开始以缓解应变了的Si阱层,主要是在低温下霍尔迁移率严重地下降。 相似文献
19.
The crystallographic orientation of low temperature (LT) grown CaF2 on GaAs (100) substrates is investigated. LT epitaxial (100) CaF2 layers are obtained on a thin (100) oriented CaF2 template at growth temperatures down to room temperature. This makes it possible to grow crack-free CaF2 (100) using a multiple-temperature-growth scheme at any desired temperature. The resulting CaF2 layers, with thickness up to 680 nm, can withstand temperature cycling from RT to 650°C without cracking. Based on these
results, a four pair Ga0.5Al0.5As/CaF2 quarter-wavelength Bragg reflector was fabricated with center wavelength at 880 nm. The reflector, with a total CaF2 thickness of 615 nm, shows broadband high reflectivity with a crack-free surface. This crack-free surface can then be overgrown
with further device layers. 相似文献
20.
P. A. Kuchinskaya V. A. Zinovyev A. V. Nenashev V. A. Armbrister V. A. Volodin A. V. Dvurechenskii 《Russian Microelectronics》2012,41(8):485-488
Results of experimental studies of forming SiGe nanometer-size rings on the Si(100) surface by the molecular-beam epitaxy method are presented. Detailed shapes and size distributions of the grown nanorings are studied by the atomic-force microscopy method. The elemental composition is determined by the Raman scattering method. The average germanium content in the nanorings was 37% for a forming temperature of 680°C. The obtained data on the geometry and composition of the produced nanostructures were used for calculations by the 6-band k × p-method of the energy spectrum and charge density distribution of hole states, localized on the SiGe quantum rings embedded in the Si-matrix. It is shown that the heterostructures with quantum SiGe rings are promising objects for creating devices that are capable of detecting electromagnetic radiation in terahertz and infrared wavelength ranges. 相似文献