共查询到20条相似文献,搜索用时 11 毫秒
1.
B. Lee A. Hande T.J. Park K.J. Chung J. Ahn M. RousseauD. Hong H. LiX. Liu D. ShenaiJ. Kim 《Microelectronic Engineering》2011,88(12):3385-3388
Electrical properties and thermal stability of LaHfOx nano-laminate films deposited on Si substrates by atomic layer deposition (ALD) have been investigated for future high-κ gate dielectric applications. A novel La precursor, tris(N,N′-diisopropylformamidinato) lanthanum [La(iPrfAMD)3], was employed in conjunction with conventional tetrakis-(ethylmethyl)amido Hf (TEMA Hf) and water (H2O). The capacitance-voltage curves of the metal oxide semiconductor capacitors (MOSCAPs) showed negligible hysteresis and frequency dispersion, indicating minimal deterioration of the interface and bulk properties. A systematic shift in the flat-band voltage (Vfb) was observed with respect to the change in structure of nano-laminate stacks as well as La2O3 to HfO2 content in the films. The EOTs obtained were in the range of ∼1.23-1.5 nm with leakage current densities of ∼1.3 × 10−8 A/cm2 to 1.3 × 10−5 A/cm2 at Vfb − 1 V. In addition, the films with a higher content of La2O3 remained amorphous up to 950 °C indicating very good thermal stability, whereas the HfO2 rich films crystallized at lower temperatures. 相似文献
2.
Y.Y. Gomeniuk Y.V. GomeniukI.P. Tyagulskii S.I. TyagulskiiA.N. Nazarov V.S. LysenkoK. Cherkaoui S. MonaghanP.K. Hurley 《Microelectronic Engineering》2011,88(7):1342-1345
The paper presents the results of capacitance-voltage, conductance-frequency and current-voltage characterization in the wide temperature range (140-300 K) as well as results of low temperature (5-20 K) thermally stimulated currents (TSC) measurements of metal-oxide-semiconductor (MOS) structures with a high-κ LaSiOx dielectric deposited on p- and n-type Si(1 0 0) substrate. Interface states (Dit) distribution determined by several techniques show consistent result and demonstrates the adequacy of techniques used. Typical maxima of interface states density were found as 4.6 × 1011 eV−1cm−2 at 0.2 eV and 7.9 × 1011 eV−1cm−2 at 0.77 eV from the silicon valence band. The result of admittance spectroscopy showed the presence of local states in bandgap with activation energy Ea = 0.38 eV from silicon conductance band, which is in accord with interface states profile acquired by conductance method. Low-temperature TSC spectra show the presence of shallow traps at the interface with activation energies ranging from 15 to 32 meV. The charge carrier transport through the dielectric film was found to occur via Poole-Frenkel mechanism at forward bias. 相似文献
3.
The forward and reverse bias capacitance-voltage (C-V) and conductance-voltage (G/w-V) characteristics of Al-TiW-Pd2Si/n-Si structures have been investigated over a wide frequency range of 5 kHz-5 MHz. These measurements allow to us the determination of the interface states density (Nss) and series resistance (Rs) distribution profile. The effect of Rs on C and G is found noticeable at high frequencies. The C-V-f and G/w-V-f characteristics of studied structures show fairly large frequency dispersion especially at low frequencies due to Nss in equilibrium with the semiconductor. The Nss profile was obtained both forward bias current-voltage (I-V) characteristics by using into account the bias dependent of the ideality factor and effective barrier height (Φe) and low frequency (CLF)-high frequency (CHF) method. The plot of series resistance vs. voltage for the low frequencies gives a peak, decreasing with increasing frequencies. The frequency dependent C-V and G/w-V characteristics confirm that the Rs and Nss of the Al-TiW-Pd2Si/n-Si structures are important parameters that strongly influence the electric parameters in device. 相似文献
4.
E. Dur?un ÖzbenM. Schnee A. NichauV. Mussmann R. LuptákJ.M.J. Lopes St. LenkK.K. Bourdelle Q.T. ZhaoJ. Schubert S. Mantl 《Microelectronic Engineering》2011,88(7):1323-1325
The electrical properties of MOS capacitors with LaScO3 thin films grown by molecular beam deposition (MBD) have been studied with and without post deposition annealing (PDA) in O2 environment followed by forming gas. An EOT of 0.65 nm could be achieved for samples without PDA. However, the films suffer from large hysteresis and interface trap density. Applying PDA reduces the hysteresis, the Dit (down to the mid of 1011 (eV cm2)−1) and the leakage current by two orders of magnitude (down to the range of 10−4A/cm2) for an EOT of 1.1 nm. Furthermore we have successfully integrated LaScO3 into FD MOSFETs on SOI substrates. The p-FETs with LaScO3 show excellent characteristics with a steep subthreshold slope down to 65 mV/dec and hole mobilities comparable to HfO2 and HfSiON. 相似文献
5.
Cheng-Li Lin Mei-Yuan ChouTsung-Kuei Kang Shich-Chuan Wu 《Microelectronic Engineering》2011,88(6):950-958
This study investigates the effects of rapid thermal annealing (RTA) in nitrogen ambient on HfO2 and HfSiOx gate dielectrics, including their electrical characteristics, film properties, TDDB reliability and breakdown mechanism. The optimal temperature for N2 RTA treatment is also investigated. The positive oxide trap charges (oxygen vacancies) in HfO2 and HfSiOx dielectric films can be reduced by the thermal annealing, but as the annealing temperature increased, many positive oxide trap charges (oxygen vacancies) with shallow or deep trap energy level will be formed in the grain boundaries, degrading the electrical characteristics, and changing the breakdown mechanism. We believe that variation in the number of positive oxide trap charges (oxygen vacancies) with shallow or deep trap energy levels is the main cause of the CV shift and difference in the breakdown behaviors between HfO2 and HfSiOx dielectrics. With respect to CV characteristics and TDDB reliability, the optimal temperature for N2 RTA treatment is in the range 500-600 °C and 800-900 °C, respectively. 相似文献
6.
Atanu Das C.-H. Lin T.-C. Tien L.-B. Chang M.-J. Tsai 《Microelectronic Engineering》2010,87(10):1821-1827
The ruthenium oxide metal nanocrystals embedded in high-κ HfO2/Al2O3 dielectric tunneling barriers prepared by atomic layer deposition in the n-Si/SiO2/HfO2/ruthenium oxide (RuOx)/Al2O3/Pt memory capacitors with a small equivalent oxide thickness of 8.6 ± 0.5 nm have been investigated. The RuOx metal nanocrystals in a memory capacitor structure observed by high-resolution transmission electron microscopy show a small average diameter of ∼7 nm with high-density of >1.0 × 1012/cm2 and thickness of ∼3 nm. The ruthenium oxide nanocrystals composed with RuO2 and RuO3 elements are confirmed by X-ray photoelectron spectroscopy. The enhanced memory characteristics such as a large memory window of ΔV ≈ 12.2 V at a sweeping gate voltage of ±10 V and ΔV ≈ 5.2 V at a small sweeping gate voltage of ±5 V, highly uniform and reproducible, a large electron (or hole) storage density of ∼1 × 1013/cm2, low charge loss of <7% (ΔV ≈ 4.2 V) after 1 × 104 s of retention time are observed due to the formation of RuOx nanocrystals after the annealing treatment and design of the memory structure. The charge storage in the RuOx nanocrystals under a small voltage operation (∼5 V) is due to the modified Fowler-Nordheim tunneling mechanism. This memory structure can be useful for future nanoscale nonvolatile memory device applications. 相似文献
7.
Kin Leong Pey Nagarajan RaghavanXing Wu Wenhu LiuXiang Li Michel BosmanKalya Shubhakar Zin Zar LwinYining Chen Hailang QinThomas Kauerauf 《Microelectronic Engineering》2011,88(7):1365-1372
In this invited paper, we demonstrate how physical analysis techniques that are commonly used in integrated circuits failure analysis can be applied to detect the failure defects associated with ultrathin gate dielectric wear-out and breakdown in high-κ materials and investigate the associated failure mechanism(s) based on the defect chemistry. The key contributions of this work are perhaps focused on two areas: (1) how to correlate the failure mechanisms in high-κ/metal gate technology during wear-out and breakdown to device processing and materials and (2) how the understanding of these new failure mechanisms can be used in proposing “design for reliability” (DFR) initiatives for complex and expensive future CMOS nanoelectronic technology nodes of 22 nm and 15 nm. Hf-based high-κ materials in conjunction with various gate electrode technologies will be used as main examples while other potential high-κ gate materials such as cerium oxide (CeO2) will also be demonstrated to further illustrate the concept of DFR. 相似文献
8.
9.
The electronic parameters and interface state properties of boron dispersed triethanolamine/p-Si structure have been investigated by atomic force microscopy, I-V, C-V-f and G/ω-V-f techniques. The surface topography and phase image of the TEA-B film deposited onto p-Si substrate were analyzed by atomic force microscopy. The atomic force microscopy results show a homogenous distribution of boron particles in triethanolamine film. The electronic parameters (barrier height, ideality factor and average series resistance) obtained from I-V characteristics of the diode are 0.81 eV, 2.07 and 5.04 kΩ, respectively. The interface state density of the diode was found to be 2.54 × 1010 eV− cm−2 under Vg = 0. The obtained Dit values obtained from C-V and G/ω measurements are in agreement with each other. The profile of series resistance dependent on voltage and frequency confirms the presence of interface states in boron dispersed triethanolamine/p-Si structure. It is evaluated that the boron dispersed triethanolamine controls the electronic parameters and interface properties of conventional Al/p-Si diode. 相似文献
10.
In the present work we study reliability issues of Pt/HfO2/Dy2O3/n-Ge MOS structures under various stress conditions. The electrical characteristics of the micro-capacitors are very good probably due to the presence of a rare earth oxide as interfacial layer. It is shown that the injected charge (Qinj) at high constant voltage stress (CVS) conditions induces stress-induced leakage current (SILC) that obeys a power-law. We also observe a correlation between the trapped oxide charge and SILC, which is, at low stress field, charge build-up and no SILC, while at high stress field SILC but few trapped charges. Results show that the present bilayer oxides combination can lead to Ge based MOS devices that show acceptable degradation of electrical properties of MOS structures and improved reliability characteristics. 相似文献
11.
Michael Kozlik Sören PaulkeMarco Gruenewald Roman ForkerTorsten Fritz 《Organic Electronics》2012,13(12):3291-3295
Here, we investigate the crystalline transition of zinc (II)-phthalocyanine from the metastable α-phase to the stable β-phase by atomic force microscopy and ultraviolet–visible (UV–vis) spectroscopy. For this purpose, thin films were prepared on quartz glass substrates via physical vapor deposition and characterized before as well as after a well-defined annealing process. Accordingly, the phase transition at around 240 °C could be monitored by optical spectroscopy. Furthermore, the optical constants of α- and β-ZnPc have been determined accurately from transmission and differential reflectance spectra, with the surface roughness taken into account. Kramers–Kronig-consistency of the optical constants obtained was checked by means of a numerical algorithm. 相似文献
12.
Ingrid Vos David HellinWerner Boullart Johan Vertommen 《Microelectronic Engineering》2011,88(1):21-27
The removal process of the La2O3/HfO2 dielectric and of the residues after metal gate etch are discussed. The challenges are presented and related to the specific physico-chemical properties of La-containing compounds. Solutions based on optimization of plasma etch, strip and wet clean are demonstrated for both an integrated and delayed etch-clean process. Both processes meet the stringent requirements of complete removal of the high-κ layers and metal-containing sidewall residues without inducing silicon recess or undercut. 相似文献
13.
The effects of the AlN molar fraction on structural and optical properties of praseodymium implanted AlxGa1−xN (0?x?1) layers were investigated. Using photoluminescence and excitation luminescence techniques we are able to observe the intra-4f23P1→3H5 (526 nm) and 3P0→3F2 (652 nm) transitions of the Pr3+ ion. The red emission peak position shifts to lower energies with increasing Al content in the alloys. The peak full-width at half-maximum increases with the Al content up to x=0.7 due to disorder effects. The implantation damage and Pr-incorporation was investigated by Rutherford backscattering spectrometry doing channelling measurements along the 〈0 0 0 1〉 direction. X-ray diffraction reciprocal space maps show an expansion of the c lattice parameter in the implanted region which is reversed after thermal annealing at 1300 °C. 相似文献
14.
Thomas Oszinda Matthias SchallerKornelia Dittmar Le JiangStefan E. Schulz 《Microelectronic Engineering》2011,88(5):680-683
A method to evaluate the surface free energy in pattern structure, of chemical vapor deposited dense and ultra low-κ (ULK) SiOCH dielectric films, is presented. Therefore dense and ultra low-κ films were treated by different post ash plasma processes. This films were characterized using Auger electron spectroscopy, atomic force microscopy and contact angle measurements. For both material systems a correlation between the amount of surface near carbon and the surface free energy was found, independent on the plasma chemistry used. The range of the surface roughness is very small and does not have a strong impact on the surface free energy. The correlation model can be applied for pattern structures. After measuring the carbon concentration at the side walls by methods like TEM-EELS or other the model provides the polar and dispersive part of the surface free energy. Having the surface free energy, contact angle of different liquids on or in pattern structures can be calculated. Hence, the wetting behavior and the probability of pattern collapse can be predicted, which is essential to select an appropriate chemical for cleaning and other wet chemical based processes. 相似文献
15.
LaON, LaTiO and LaTiON films are deposited as gate dielectrics by incorporating N or/and Ti into La2O3 using the sputtering method to fabricate Ge MOS capacitors, and the electrical properties of the devices are carefully examined. LaON/Ge capacitors exhibit the best interface quality, gate leakage property and device reliability, but a smaller k value (14.9). LaTiO/Ge capacitors exhibit a higher k value (22.7), but a deteriorated interface quality, gate leakage property and device reliability. LaTiON/Ge capacitors exhibit the highest k value (24.6), and a relatively better interface quality (3.1E11 eV^-1cm^-2), gate leakage property (3.6E3 A/cm^2 at Vg = 1 V + Vfb) and device reliability. Therefore, LaTiON is more suitable for high performance Ge MOS devices as a gate dielectric than LaON and LaTiO materials. 相似文献
16.
Using the centro-symmetry property of uniform linear array (ULA), we propose an algorithm that combines the weighted ?2,1 minimization with the unitary transformation to improve the performance of DOA estimation. Exploiting the result of the unitary transformation, more credible weights can be obtained and the jointly sparse constraint can be further enhanced. Moreover, the unitary transformation incorporates the forward–backward spatial smoothing, which improves the performance of the weighted ?2,1 minimization for correlated sources. Simulations demonstrate that the proposed method can achieve better performance in terms of resolution and estimation accuracy. 相似文献
17.
Yuefei Wang Yurui Han Chong Gao Bingsheng Li Jiangang Ma Haiyang Xu Aidong Shen Yichun Liu 《半导体学报》2023,(6):79-83
Ultrawide band gap semiconductors are promising solar-blind ultraviolet(UV) photodetector materials due to their suitable bandgap, strong absorption and high sensitivity. Here, β-Ga2O3 microwires with high crystal quality and large size were grown by the chemical vapor deposition(CVD) method. The microwires reach up to 1 cm in length and were single crystalline with low defect density. Owing to its high crystal quality, a metal–semiconductor–metal photodetector fabricated f... 相似文献
18.
Alexandre Campos Moraes Daniel Benevides da Costa Michel Daoud Yacoub 《Wireless Personal Communications》2012,64(1):3-19
Wireless communications systems in a frequency reuse environment are subject to cochannel interference. In order to improve the system performance, diversity techniques are deployed. Among the practical diversity schemes used, Equal-Gain Combining (EGC) appears as a reasonably simple and effective one. Unfortunately, the exact analysis of the outage probability of EGC receivers is rather intricate for it involves the evaluation of multifold nested integrals. It becomes mathematically intractable with the increase of the number of diversity branches and/or interferers. For example, for N B diversity branches and N I arbitrary independent cochannel interferers, the exact formulation using the convolutional approach requires 2 + N B + (N B × N I ) nested integrals, which, very quickly, and for any practical system, turns out to be mathematically intractable. In this paper, we propose accurate approximate formulations for this problem, whose results are practically indistinguishable from the exact solution. In our model, the system is composed by N B branches and N I interferers so that the desired signals are coherently summed, whereas the interfering signals are incoherently summed at the EGC receiver. Three sets of fading scenarios, namely α-μ , κ-μ, and η-μ, are investigated. The proposed approach is indeed flexible and accommodates a variety of mixed fading scenarios for desired and interfering signals. 相似文献
19.
Kunal B. Modi Pooja Y. Raval Dolly J. Parekh Shrey K. Modi Niketa P. Joshi Akshay R. Makadiya Nimish H. Vasoya Utpal S. Joshi 《半导体学报》2022,43(3):032001-032001-10
The electrical properties of cubic perovskite series, CaCu3–xTi4–xFe2xO12 with x = 0.0, 0.1, 0.3, 0.5, and 0.7, have been studied by employing current density as a function of electric field characteristics registered at different temperatures and thermal variations of direct current electrical resistivity measurements. All of the compositions exhibit strong non-ohmic behavior. The concentration dependence of breakdown field, the temperature at which switching action takes place, and maximum value of current density (Jmax) has been explained on account of structural, microstructural, and positron lifetime parameters. The highest ever reported value of Jmax = 327 mA/cm2 has been observed for pristine composition. The values of the nonlinear coefficient advise the suitability of ceramics for low-voltage varistor applications. The Arrhenius plots show typical semiconducting nature. The activation energy values indicate that electric conduction proceeds through electrons with deformation in the system. 相似文献
20.
A. P. Bakhtinov V. N. Vodopyanov V. V. Netyaga Z. R. Kudrynskyi O. S. Lytvyn 《Semiconductors》2012,46(3):342-353
Features of the formation of Au/Ni/〈C〉/n-Ga2O3 hybrid nanostructures on a Van der Waals surface (0001) of “layered semiconductor-ferroelectric” composite nanostructures
(p-GaSe〈KNO3〉) are studied using atomic-force microscopy. The room-temperature current-voltage characteristics and the dependence of the
impedance spectrum of hybrid structures on a bias voltage are studied. The current-voltage characteristic includes a resonance
peak and a portion with negative differential resistance. The current attains a maximum at a certain bias voltage, when electric
polarization switching in nanoscale three-dimensional inclusions in the layered GaSe matrix occurs. In the high-frequency
region (f > 106 Hz), inductive-type impedance (a large negative capacitance of structures, ∼106 F/mm2) is detected. This effect is due to spinpolarized electron transport in a series of interconnected semiconductor composite
nanostructures with multiple p-GaSe〈KNO3〉 quantum wells and a forward-biased “ferromagnetic metal-semiconductor” polarizer (Au/Ni/〈C〉/n
+-Ga2O3/n-Ga2O3). A shift of the maximum (current hysteresis) is detected in the current-voltage characteristics for various directions of
the variations in bias voltage. 相似文献