A CMOS image sensor with light-controlled oscillating pixels for an investigative optobionic retinal prosthesis system

This paper presents a high-dynamic range CMOS image sensor architecture incorporating light-controlled oscillating pixels which can act as front-end for an investigative optobionic retinal prosthesis research effort. Each pixel acts as an independent oscillator, whose frequency is proportional to the local light intensity. A 9×9 pixel array has been fabricated in the AMS CMOS opto process. Each pixel's area amounts to , each pixel photodiode area is while the array occupies . Measured results show that the sensor can achieve a linear optical dynamic range of 80 dB (from 0.24 Hz to 2.2 kHz). Its linear electrical dynamic range exceeds 134 dB (from 100 mHz to 502 kHz). The nominal power dissipation is about 50 nW per pixel.     

High-mobility pentacene thin-film transistors with copolymer-gate dielectric

Pentacene thin-film transistors have been obtained using polymethyl-methacrylate-co-glyciclyl-methacrylate (PMMA-GMA) as the gate dielectric. The optimum active layer thickness in thin-film transistors (OTFTs) was investigated. The present devices show a wide operation voltage range. The on/off current ratio is as high as 10⁵. In linear region (), the field-effect mobility of device increases with the increase in gate field at low-voltage region (), and a mobility of 0.33 cm²/V s can be obtained when . In saturation region, the mobility increases linearly with the gate field, and a high mobility of 1.14 cm²/V s can be obtained at . The influence of voltage on mobility of device was investigated.     

A high precision low dropout regulator with nested feedback loops

A high precision low dropout regulator (LDO) with nested feedback loops is proposed in this paper. By nesting a zero-tracking compensation loop inside of the negative feedback loop comprising an error amplifier, the independence of off-chip capacitor and effective series resistance (ESR) is ensured for different load currents and operating voltages. This circuit is designed and fabricated using a standard CMOS process. The die area is a . The measurement results show that the total error of the output voltage caused by line and load variations is less than ±3% in low quiescent current (Iddq) or low voltage scenarios. Besides, the smallest dropout of the LDO, 0.11 V, while the output current is 165 mA, the output load is and 20 in parallel.     

A wide dynamic range CMOS image sensor with pulse-frequency-modulation and in-pixel amplification

This paper briefly examines the pros and cons of CMOS pulse-frequency-modulation (PFM) digital pixel sensors. A pulse-frequency-modulation digital pixel sensor with in-pixel amplification is proposed to improve the resolution of the pixel sensor at low illumination. The proposed PFM digital pixel sensor offers the characteristics of a reduced integration time when the level of illumination is low with the fill factor comparable to that of PFM digital pixel sensors without in-pixel amplification. The proposed digital image sensor has been designed in TSMC- 1.8 V CMOS technology and validated using Spectre from Cadence Design Systems with BSIM3V3 device models. Simulation results demonstrate that the dynamic range of the proposed PFM digital pixel sensor with in-pixel amplification is 20 dB larger as compared with that of PFM digital pixel sensors without in-pixel amplification. The increased dynamic range is obtained in the low illumination condition where PFM digital pixel sensors without in-pixel amplification cease the operation due to the low photo current.     

CMOS current-mode integrating receivers for Gbytes/s parallel links

This paper presents the design of fully differential current-mode integrating receivers for Gbytes/s parallel links. Both class A and class AB configurations are considered. The proposed receivers consist of a transimpedance front-end that provides a low and tunable matching impedance to the channels to accommodate current-mode signaling, an integrating stage that acts as a low-pass filter to suppress the transient disturbances coupled to the channels and receiver, and a regenerative sense amplifier to amplify the output voltage of the preceding integrator to full swing. The class AB configured sense amplifier provide a voltage gain that is twice that of class A sense amplifier, enabling a fast sensing and latching. The proposed receiver has been implemented in UMC , 1.2 V CMOS technology and analyzed using Spectre from Cadence Design Systems with BSIM3v3 device models. Simulation results demonstrate that the proposed class current-mode integrating receivers provide full output voltage swing when the data rate is 2.5 Gbyte/s.     

Numerical optimization of an extracted HgCdTe IR-photodiodes for 10.6-μm spectral region operating at room temperature

The electrical and photoelectrical properties of long wavelength Hg_1−xCd_xTe structures have been optimized by using an exact numerical analysis. In this analysis we have been taking into account the degeneracy, non-parabolicty, deviation from thermodynamical equilibrium and graded interfaces. The band diagram, electrical field, carrier mobility, photoelectrical gain, responsivity, noise and detectivity have been calculated and optimized as a function of different variable such as alloy composition, doping concentration, thickness, and applied voltage to obtain optimized performance at room temperature. This numerical simulation can be used to optimize the mentioned parameters for other structures such as , operating in photodiode, or photovoltaic mode.     

A novel ADPLL design using successive approximation frequency control

This paper presents a hardware implementation of a fully synthesizable, technology-independent clock generator. The design is based on an ADPLL architecture described in VHDL and characterized by a digital controlled oscillator with high frequency resolution and low jitter. Frequency control is done by using a robust regulation algorithm to allow a defined lock-in time of at most eight reference cycles. ASICs in CMOS AMS and UMC have been manufactured and tested. Measurements show competitive results to state-of-the-art mixed-signal implementations.     

A 1-V RF-CMOS LNA design utilizing the technique of capacitive feedback matching network

In this paper, a CMOS low-noise amplifier (LNA) with a new input matching topology has been proposed, analyzed and measured. The input matching network is designed through the technique of capacitive feedback matching network. The proposed LNA which is implemented in a technology is operated at the frequency of 12.8 GHz. It has a gain S21 of 13.2 dB, a noise figure (NF) of 4.57 dB and an NF_min of 4.46 dB. The reverse isolation S12 of the LNA can achieve and the input and output return losses are better than . The input 1-dB compression point is and IIP3 is . This LNA drains 10 mA from the supply voltage of 1 V.     

A novel nonvolatile memory based on self-organized quantum dots

A novel type of memory based on self-organized quantum dots (QDs) is presented, which merges the advantages of the most important semiconductor memories, the dynamic random access memory (DRAM) and the Flash. A nonvolatile memory with fast access times and good endurance (>10¹⁵ write/erase cycles) as an ultimate solution seems possible. A storage time of 1.6 s at 300 K in InAs/GaAs QDs with an additional Al_0.9Ga_0.1As barrier is demonstrated and a retention time of 10⁶ years is predicted for GaSb QDs in an AlAs matrix. A minimum write time of 6 ns is obtained for InAs/GaAs QDs. This value is already in the order of the access time of a DRAM cell and at the moment limited by the RC low pass of the device. An erase time of milliseconds is shown in first measurements on GaSb/GaAs QDs at . Faster write/erase times below even at room temperature are expected for improved device structures.     

Characterization of piezoelectric materials as a power source for electronic implantation devices

Piezoelectric materials are attractive as a power source for implanted nanoelectronic systems using the energy generated by weaves alive and physiological or biophysical processes. The study of a piezoelectric thin film sensor and its behavior as mechanical to electrical energy converter is discussed. A piezoelectric polymer—PVDF—was characterized and its physical parameters measured. Besides, the development of a PVDF-based power source activated by mechanical vibrations and efficiencies around the 5% is presented.     

A very-high output impedance charge pump for low-voltage low-power PLLs

This article presents the design of a high output compliance, very-high output impedance single-ended charge pump implemented using a new low-voltage current mirror. The output current is sampled and a feedback loop forces it to be equal to the desired reference current. This results in a very-high output impedance over a very wide output voltage range, accurate Up/Down current matching, and low transient glitches. The proposed charge pump was implemented using STMicroelectronics 1-V 90-nm CMOS process. Simulations using Spectre show that the Up/Down output currents remain constant and matched within 1% over a charge pump output voltage ranging from 119 to 873 mV. Monte Carlo process variations and mismatch simulations indicate that the 1-σ standard deviation between the Up and Down current components is , or 6.8% of the nominal charge pump current at either end of the output voltage range.     

Ionic outgassing from photoacid generators upon irradiation at 13.5 nm

Photoresist outgassing is considered a possible source of contamination of optics in extreme ultraviolet (EUV) lithography at 13.5 nm. We measured the relative proportions of ionic outgassing from 18 commercially available photoacid generators (PAG), which is a key component of chemically amplified photoresists, upon irradiation at 13.5 nm. These PAG include 17 triarylsulfonium or diaryliodonium salts, which contain or as the anion, and one PAG of molecular type. The overall outgassed ions in the range 10-200 u were counted in relative proportions. Outgassing of F⁺ is found to be dominant, and for most PAG the extent of F⁺ outgassing shows a satisfactory correlation with the ratio of F atomic photoabsorption to the overall PAG photoabsorption. Outgassed ions F⁺, CF⁺, and from PAG containing the anion and additional such as , and from those containing are identified. Triphenylsulfonium perfluoro-1-butanesulfonate is one PAG to emit the most abundant F⁺ and total ionic fragments, and a PAG of molecular type (N-hydroxy-5-norbornene-2,3-dicarboximide perfluoro-1-butanesulfonate) also emits abundantly both hydrocarbon ions and F⁺. Ionic outgassing of PAG cations includes (C₆H₅)₂S⁺ from R(C₆H₅)₂S⁺ salts and I⁺ from diaryliodonium salts. For PAG containing t-C₄H₉, significantly less F⁺ outgassing is observed; additional outgassing pathways are proposed. The pressure rise caused by PAG shows no dependence on the anion identity, but is correlated with cation photoabsorption, and ascribed to neutral aryl outgassing. Other minor outgassing species include from sulfonates; and ‘photostable’ PAH cations are identified for the first time and provide evidence of concurrent outgassing from, and polymerization of, PAG upon irradiation at 13.5 nm.     

Current mode read-out circuit for InGaAs photodiode applications

Infrared focal plane arrays have many military, industrial, medical, and scientific applications that require high-resolution and high-performance read-out electronics. In applications involving InGaAs sensor arrays, data read-out can be carried out by circuits implemented with CMOS technology. In this paper we propose a dynamically regulated cascode current mirror for pixel read-out. From simulation results, we expect this circuit to achieve a better trade-off between silicon area, signal-to-noise ratio, and output dynamic range than the trade-off that is currently achieved by current mode CMOS read-out circuits.