An embedded trace FCCSP substrate without glass cloth

Coreless embedded trace has attracted interest from mobile device, in few metal layer Flip-Chip Chip Scale Package (FCCSP) substrate design, for electrical performance, high density, and thickness reduction. However, the mainstream Prepreg (PP) dielectrics with glass-cloth utilized in coreless embedded trace substrate (ETS) are insufficient to fulfill future requirements of warpage behavior, RF performance, miniaturization and even cost. This research is targeted on developing an alternative 2-layer coreless ETS technology platform, without glass-cloth, to make up the above shortage. The total solution from substrate fabrication to package verification had been studied. With the design for manufacturability and reliability approaches, a pioneering 120 μm thin 2-layer coreless ETS, by Ajinomoto Buildup Film-like dielectric without glass-fabric, was developed for FCCSP, with both experimental and simulation efforts. Compared with the conventional PP with glass-cloth, a cost effective substrate featured with 20% thinner and 20% less package warpage deformation was gained. The new material scheme also allows better compatibility with fine pitch design and RF transmission. This technology can be an extended process platform to higher multi-layer (≥ 3) advanced coreless substrate for flip chip BGA & module assemblies.     

Estimation of warpage and thermal stress of IVHs in flip–chip ball grid arrays package by FEM

Flip–chip substrates have been developed to meet the recent technical trend. They have a small IVH (Inner Via Hole) diameter to improve electrical packaging performance. However, under thermal loading conditions, substrate warpage increases as substrate thickness decreases. Performance of FCBGA may be severely limited by substrate warpage. Furthermore, large thermal deformation induces cracks and delaminations in an IVH. It is important to understand substrate thermal deformation to improve FCBGA reliability.Thermal deformation of the FCBGA (Flip–Chip Ball Grid Array) with assembly conditions has been calculated globally by finite element analysis. And residual plastic strain of an IVH has been estimated microscopically to understand thermal stress of the IVH. Finite element method considering non-linear material model is verified with experiment on warpage to improve simulation accuracy. Also, the Taguchi method is applied to optimize FCBGA substrate design.Based on the computed results by the Taguchi method, we know core thickness in FCBGA substrate is the most determining factor for thermal deformation. The second most significant factor is the core material properties. Even though the plugging material in the IVH has little thermal deformation macroscopically with respect to the entire FCBGA substrate, the plugging material lowers the reliability of the IVH alone microscopically. In some cases depending on the plugging material, the IVH may develop some cracks.     

IC封装无芯基板的发展与制造研究

手持电子产品的薄型化催生了IC封装无芯基板,它不仅比IC封装有芯基板更薄,而且电气性能更加优越。介绍了IC封装无芯基板的发展趋势和制造中面临的问题。IC封装无芯基板以半加成法制造,翘曲是目前制程中的首要问题。翘曲改善主要依靠改变绝缘层材料和积层结构,可用云纹干涉法进行量测,并以模拟为指导加快开发周期。     

晶圆尺寸级封装器件的热应力及翘曲变形

晶圆尺寸级封装(WLCSP)器件的尺寸参数和材料参数都会对其可靠性产生影响。使用有限元分析软件MSCMarc,对EPS/APTOS生产的WLCSP器件在热循环条件下的热应力及翘曲变形情况进行了模拟,分析了器件中各个尺寸参数对其热应力及翘曲变形的影响。结果表明:芯片厚度、PCB厚度、BCB厚度和上焊盘高度对WLCSP的热应力影响较为明显。其中,当芯片厚度由0.25mm增加到0.60mm时,热应力增加了21.60MPa;WLCSP的翘曲变形主要受PCB厚度的影响,当PCB厚度由1.0mm增加到1.60mm时,最大翘曲量降低了20%。     

一类汽车用PCB产品翘/扭曲性能的改善

随着汽车电子技术的发展和应用,雷达类产品已经在汽车电子产品中得到广泛的应用.与普通的电子产品不同.雷达类电子产品需要高频材料作为雷达型号接受和发送的介质.因此,汽车电子产品中的PCB多用FR4材料和RF材料的混压方法制造雷达用PCB.但是两种不同材料的混压会产生PCB的翘曲并影响电子产品的组装和雷达产品的可靠性.因此,怎么样控制此类PCB的翘曲成为PCB制造和SMT制造的一个难题.为解决翘曲的质量问题,我们和PCB产品的供应商一起研究和分析了问题产生的原因,并通过DOE(试验设计)以及试验设计分析找到了优化PCB翘曲的方案.通过优化PCB Dummy Pad的设计、优化PCB叠构的方法降低了PCB产品翘/扭曲.优化后的PCB产品经过小批量生产,翘曲性能稳定,能够达到公司产品设计和生产的需求.同时成功的改善翘曲对公司提升产品良率、提高公司竞争力都有积极的贡献.对国内类似的产品生产也有借鉴价值.     

A low-profile wide-band three-port isolation amplifier withcoreless printed-circuit-board (PCB) transformers

Galvanic isolations are essential in many electrical patient-monitoring devices and industrial applications. In this paper, a low-profile wideband three-port isolation amplifier using coreless printed-circuit-board (PCB) transformers for isolation is studied. The PCB thickness used in the isolation amplifier is 0.4 mm. The diameters of the two coreless PCB transformers are 9.75 and 5.856 mm, respectively. Operating conditions of the transformers and a design guideline of the isolation amplifier are detailed in this paper. Experimental results show that the isolation amplifier under investigation can transmit an analog signal from 20 mHz to 1.1 MHz with good linearity. Comparison of the prototype with an industrial isolation amplifier is also included     

Solder Joint Reliability Assessment for Flip Chip Ball Grid Array Components with Various Designs in Lead-Free Solder Materials and Solder Mask Dimensions

This study investigates the reliability of flip chip ball grid array (FCBGA) components with three types of solder materials: eutectic solder with a composition Sn63Pb37 and the lead-free solders SnAg3.0Cu0.5 and SnAg4.0Cu0.5. Two substrate-side solder mask (S/M) opening sizes, 0.4 mm and 0.525 mm, were used. Both the monotonic and cyclic mechanical four-point bend tests are conducted for the reliability assessment. It is found that the FCBGA components with SnAg3.0Cu0.5 solder have the best durability during the cyclic bend test, yet the eutectic solder is the strongest during the monotonic bend test. Besides, the FCBGA components with 0.525-mm S/M opening have around 3 times more life cycles than those with the 0.4-mm S/M opening in the cyclic bend test. It is also noteworthy that the lead-free solder materials have much variation in the failed cycles during the cyclic test. Moreover, the failure locations for those components with 0.4-mm S/M openings are found to be at the interface between the package side metal pad and the solder ball, and those with an S/M opening of 0.525 mm are observed to be failed mostly at the interface between the printed circuit board (PCB) side metal pad and the solder ball.     

FCBGA器件PCB组装应用的若干要点

介绍FCBGA器件PCB组装应用时需要考虑的若干要点.内容包括器件的潮敏控制及干燥包装袋暴露后器件潮敏寿命的再定级,提供了器件的再烘烤参考条件.也涉及相应SMT组装工艺的一些注意要点以及PCB返修时的注意要点,提供FCBGA器件在PCB组装返修时回流焊温度曲线的参考指南.     

无铅BGA枕头缺陷的研究

BGA枕头焊点的锡膏和锡球完全没有融合成为一体,倒过来看就像头压在枕头上面。介绍了四种有效的检测方法。从设计、材料和工艺三方面分析了枕头缺陷的潜在影响因素。选取PCB玻璃态转化温度、钢网厚度、BGA贴装偏移量和回流焊炉链条速度四个因素进行两水平全因子实验设计,在成功复制枕头缺陷的基础上,分析了各因素的影响作用,得出了链条速度是最显著的影响因素。     

High-performance FCBGA based on multi-layer thin-substrate packaging technology

We developed a new concept flip-chip ball grid array (FCBGA) based on multi-layer thin-substrate (MLTS) packaging technology in order to meet the strong demand for high-density, high-performance, and low-cost LSI packages. The most important feature of MLTS packaging is that, only a high-density and high-performance MLTS remains by removing the metal plate after mounting an LSI chip. The MLTS packaging offers the advantages of (1) good registration accuracy, which makes higher-density and finer-pitch pattering possible; (2) an ideal multi-layer structure that is highly suitable for high-speed and high-frequency applications; (3) excellent flip-chip mounting reliability, which makes higher-pin-count and finer-pitch area array flip-chip interconnection possible; (4) excellent reliability, supported by use of high T_g (glass transition temperature) resin; and (5) a cost-effective design achieved as a result of fewer layers fabricated with fine-pitch patterning.We successfully produced a high-performance FCBGA prototype based on our MLTS packaging technology. The prototype comprises an LSI chip connected to approximately 2500 bonding pads arranged in 240 μm pitch area array, and 1296 I/O pads for BGA. The prototype FCBGA’s excellent long-term reliability was demonstrated through a series of tests conducted on it.     

超薄CPUBGA封装的无芯载板技术研究

无芯载板封装技术,因为其Z向高度需求低,在微型移动设备方面非常具有吸引力。为了充分表述无芯封装技术的高品质和多功能性,需要研究这项技术的几个特定方面,以了解其优缺点。设计制造了一款典型的无芯板BGA封装的样板,并表征了其电源特性和IO信号完整性。通过采用标准有芯BGA封装和无芯BGA封装,对比两种封装的性能。     

0.5mm间距BGA芯片的PCB设计

目前,在高速PCB设计中,0.8mm间距BGA芯片的应用已非常普遍,但0.5mm间距BGA芯片的设计和焊接应用则相对较少。文章结合多层线路板的叠层规则、布线设计、信号回流以及钻孔工艺等技术,采用在0.5mm间距BGA芯片的焊盘上直接设计盘中通孔和一阶盲孔。在将PCB成本控制在规定预算范围内的同时,成功的将0.5mm间距BGA芯片应用在高密度互连PCB的研究与开发中。从生产出小批量单板的焊接情况看,系统上电后运行稳定,不存在短路和虚焊情况,从而较好的实现了电路工作性能,达到预先设计目标。     

一种80 MHz隔离式DC-DC变换器

介绍了一种80 MHz隔离式DC-DC变换器,无芯PCB变压器实现了VHF隔离,利用交叉耦合电路和无芯PCB变压器形成持续振荡,采用肖特基二极管作为整流器件,电压反馈环路保证整个系统能够稳定输出。采用FEM和EDA软件实现了无芯PCB变压器的设计和整体电路的仿真。测试结果表明,该变换器能够提供3.3 V隔离电压输出和0.3 W功率输出,效率约为43%。     

BGA器件焊接合格率的预测模型

在表面贴装技术(SMT)大规模生产过程中,如果能够对焊接合格率进行预测,无疑对提高SMT产品的生产率、产品可靠性及成本控制具有重要意义.以球栅阵列(BGA)器件为例,研究SMT焊接合格率的预测方法.通过统计分析,结合焊点成形软件的方法,建立了BGA器件焊接合格率的预测模型,运用该模型可以找出影响焊接合格率的制约因素.结合仿真技术模拟焊点形态,发现引起焊接缺陷各参数之间的关系,并提出相应的解决方案.     

Some electromagnetic aspects of coreless PCB transformers

In this paper, some EMI aspects of using coreless PCB transformers are addressed. Based on the antennas theory, the radiated power of a coreless PCB transformer is estimated and found to be negligible. The electromagnetic field plot of a power electronic circuit using a gate drive circuit isolated by a coreless PCB transformer has been recorded. The major radiated EMI source in the frequency range of 30 MHz to 300 MHz is found to be the copper tracks of the power circuit, where switching transients occur, rather than the coreless PCB transformer. Coreless PCB transformers essentially operate at relatively low frequency (8 MHz in this case) by near-field magnetic coupling. Experimental results have confirmed that the application of coreless PCB transformer in gate drive circuit will not impose any serious EMI problem on the power electronic circuit     

BGA元器件受热模型分析与SMT工艺控制

不同BGA封装结构的元器件在回流焊过程中,由于其焊球的受热路径和热阻不同,导致焊球受热不均匀、PCB变形甚至引起IC芯片的"虚接触",严重影响BGA元器件的焊接质量.通过对BGA封装元器件受热模型,热阻的分析,提出了不同BGA封装结构的元器件回流焊温度设置和控制要点:PBGA元器件峰值温度在235～245℃时焊接时间1...     

影响BGA封装焊接技术的因素研究

虽然表面贴装制造工艺已经纯熟,但是随着BGA封装的广泛应用以及焊球间距的逐步减小,给表面贴装制造工艺带来了新的挑战.基于BGA封装在表面贴装技术焊接中的应用,从印制电路板焊盘设计、印制电路板板材选取和保护、BGA封装选取和保护、印刷工艺、回焊炉温度曲线设定与控制等方面,阐述了影响BGA封装焊接技术的各个因素,进而提升B...     

Thermomechanical deformation of a bimaterial plate––as applied to laminate IC assemblies

This paper examines thermomechanical warpage in a bimaterial plate. It considers the suitability of axisymmetric and generalized plane strain finite element analyses, and it compares these to the 3-D analysis of a bimaterial plate in which properties of one of the materials vary in orthogonal directions within the plane of the plate. These findings are compared to results from mechanical measurement of a BGA substrate. The influence of orthotropic versus isotropic substrate properties is investigated with regard to warpage. The root cause of previously unexplained saddle-shaped warpage is identified as the asymmetry of the copper traces, and design rules regarding substrate layout are recommended.     

印制板翘曲品质改善研究

随着电子产品向轻、薄、小的方向发展。印制板的封装方式也在不断的改变,这就对PCB的制造提出了更高的要求,特别是印制板的平整度要求,只有保证PCB在PCBA过程中有很高的平整度,才能保证SMD引脚与板面焊盘的焊接,才能保证SMT过程的质量(包括网印焊膏、贴片、等工序)。分析了造成翘曲问题的主要原因,从分析中可以看出,其原因是多方面的,可以说是从供应商的基板来料开始,一直到做成成品的印制板,还有在客户的SMT过程中,都有机会造成翘曲问题,就引起翘曲问题的主要原因进行研究,通过对印制板的排板结构的设计、压合工序的影响及FQC翻压工序分别进行了DOE实验研究,共进行了70多个工艺实验,对试验结果进行统计分析,找出影响翘曲的主要影响因素,并进行参数优化,达到改善翘曲品质的目的。     

Board level investigation of BGA solder joint deformation strength

In this paper we present a method to determine the stress in BGA solder joints on complex, real assembled circuit boards.To be able to investigate the mechanical effects of post-reflow assembly within the solder joints of BGA components, it is necessary to undertake a mechanical investigation at board level by taking into consideration the effect of the adjacent components and the interconnection layer layouts.In our project, we have developed a method of how to investigate the board level deformation strength of BGA joints. The elastic properties of a real assembled circuit board and of a circuit bare board are measured; an FEM model is then created, both of the bare board and of the assembled printed circuit board taking into account the layout of the interconnection layers. The advantage of this PCB FEM model is that the deformation of a PCB of any size and for any load can be calculated quickly using any ordinary computer. In our project, we also have created another detailed FEM model for the BGA solder joints.Using the constructed FEM models, we are able to determine the stress in BGA solder joints on a real electronic product for a typical type of load (i.e. bending of PCB) thereby verifying our method. Since the simulated results correspond well to previous literature written on this topic, we consider that our method is appropriate for calculating stress in the solder joints of multi-lead components on complex, fully assembled circuit boards.