Pentacene/n-Si heterojunction diodes and photovoltaic devices investigated by I-V and C-V measurements

The forward and reverse current density-voltage (J-V) and capacitance-voltage (C-V) characteristics of pentacene/n⁻-silicon heterojunction diodes were investigated to clarify the carrier conduction mechanism at the organic/inorganic heterojunction. Current rectification characteristics of the pentacene/n⁻-Si junctions can be explained by a Schottky diode model with an interfacial layer. The diode parameters such as Schottky barrier height and ideality factor were estimated to be 0.79-1.0 eV and 2.4-2.7, respectively. The C-V analysis suggests that the depletion layer appears selectively in the n⁻-Si layer with a thickness of 1.47 μm from the junction with zero bias and the diffusion potential was estimated at 0.30 eV at the open-circuit condition. The present heterojunction allows the photovoltaic operation with power conversion efficiencies up to 0.044% with a simulated solar light exposure of 100 mW/cm².     

Schottky barrier height modification in Au/n-type 6H-SiC structures by PbS interfacial layer

We have prepared the Au/PbS/n-6H-SiC Schottky diodes with interface layer and the reference Au/n-6H-SiC/Ni Schottky diodes without interface layer to realize Schottky barrier height (SBH) modification in the Au/SiC Schottky diodes. The BH reduction has been succeeded by the PbS interlayer to modify the effective BH by influencing the space charge region of the SiC. The PbS thin layer on the SiC was formed by the vacuum evaporation. The SBH values of 0.97 and 0.89 eV for the samples with and without the interfacial PbS layer were obtained from the forward bias current-voltage (I-V) characteristics. X-ray diffraction (XRD) study was carried out to determine the structural formation of the PbS on SiC. The reduction of the BH in the Au/PbS/n-6H-SiC Schottky diodes has been attributed to the fact that the interface states have a net positive interface charge in metal/n-type semiconductor contact, and thus the positive space charge Q_sc in the Au/PbS/n-6H-SiC Schottky diodes becomes smaller than if the interface state charges Q_ss were absent. The experimental carrier concentration value of 4.73 × 10¹⁷ cm⁻³ obtained from the forward and reverse bias capacitance-voltage characteristics for the Au/PbS/n-6H-SiC contacts is lower than the value of 5.52 × 10¹⁷ cm⁻³ obtained for the reference diode, and this is an evidence of the reduction of the BH by the modification of the space charge density of the SiC.     

Temperature dependent current-voltage characteristics of n-MgxZn1−xO/p-GaN junction diodes

This study investigates the temperature dependence of the current-voltage (I-V) characteristics of n-Mg_xZn_1−xO/p-GaN junction diodes. The n-Mg_xZn_1−xO films were deposited on p-GaN using a radio-frequency (rf) magnetron sputtering system followed by annealing at 500, 600, 700, and 800 °C in nitrogen ambient for 60 s, respectively. The n-Mg_xZn_1−xO/p-GaN diode at a substrate temperature of 25 °C had the lowest leakage current in reverse bias. However, the leakage current of the diodes increased with an increase in annealing temperatures. The temperature sensitivity coefficients of the I-V characterizations were obtained at different substrate temperatures (25, 50, 75 100, and 125 °C) providing extracted values of 26.4, 27.2, 17.9, and 0.0 mV/°C in forward bias and 168.8, 143.4, 84.6, and 6.4 mV/°C in reverse bias, respectively. The n-Mg_xZn_1−xO/p-GaN junction diode fabricated with Mg_xZn_1−xO annealed at 800 °C demonstrated the lowest temperature dependence. Based on these findings, the n-Mg_xZn_1−xO/p-GaN junction diode is feasible for GaN-based heterojunction bipolar transistors (HBTs).     

Anomalous dependences of the diode barrier capacitance on bias voltage and temperature

Capacitances of a Schottky barrier and p ⁺-n junction whose n-type regions contain shallow donors and deep acceptors with levels in the upper part of the energy gap have been calculated. The capacitance was represented as two series capacitances of the near-contact region containing only donor impurity ions and of the intermediate layer at the interface between the space-charge region and the diode base, with account of the free-carrier concentration and its dependence on the potential. It was found that the capacitance of the intermediate layer heavily depends on temperature and may increase with the bias voltage. The calculated capacitancevoltage characteristics of the barrier capacitance are in agreement with experimental data and even describe the nonmonotonic dependences of the capacitance on the bias voltage.     

On the temperature dependence of series resistance and interface states in Al/SiO2/p-Si (MIS) Schottky diodes

The capacitance-voltage-temperature (C-V-T) and conductance-voltage-temperature (G/w-V-T) characteristics of metal-semiconductor (Al/p-Si) Schottky diodes with thermal growth interfacial layer were investigated by considering series resistance effect in the wide temperature range (80-400 K). It is found that in the presence of series resistance, the forward bias C-V plots exhibit a peak, and experimentally shows that the peak positions shift towards higher positive voltages with increasing temperature, and the peak value of the capacitance has a maximum at 80 K. The C-V and (G/w-V) characteristics confirm that the N_ss and R_s of the diode are important parameters that strongly influence the electric parameters in (Al/SiO₂/p-Si) MIS Schottky diodes. The crossing of the G/w-V curves appears as an abnormality when seen with respect to the conventional behaviour of the ideal MS or MIS Schottky diode. It is thought that the presence of a series resistance keeps this intersection hidden and unobservable in homogeneous Schottky diodes, but it appears in the case of inhomogeneous Schottky diode. In addition, the high frequency (C_m) and conductance (G_m/w) values measured under both reverse and forward bias were corrected for the effect of series resistance to obtain the real diode capacitance.     

On the energy distribution of interface states and their relaxation time and capture cross section profiles in Al/SiO2/p-Si (MIS) Schottky diodes

The energy distribution profile of the interface states (N_ss) and their relaxation time (τ) and capture cross section (σ_p) of metal-insulator-semiconductor (Al/SiO₂/p-Si) Schottky diodes have been investigated by using the high-low frequency capacitance and conductance methods. The capacitance-voltage (C-V) and conductance-voltage (G/ω-V) characteristics of these devices were investigated by considering series resistance (R_s) effects in a wide frequency range (5 kHz-1 MHz.). It is shown that the capacitance of the Al/SiO₂/p-Si Schottky diode decreases with increasing frequency. The increase in capacitance especially at low frequencies results form the presence of interface states at Si/SiO₂ interface. The energy distributions of the interface states and their relaxation time have been determined in the energy range of (0.362-E_v)-(0.512-E_v) eV by taking into account the surface potential as a function of applied bias obtained from the measurable C-V curve (500 Hz) at the lowest frequency. The values of the interface state density (N_ss) ranges from 2.34 × 10¹² to 2.91 ×  10¹² eV⁻¹/cm², and the relaxation time (τ) ranges from 1.05 × 10⁻⁶ to 1.58 × 10⁻⁴ s, showing an exponential rise with bias from the top of the valance band towards the mid-gap.     

Electrical analysis of organic dye-based MIS Schottky contacts

In this work, we prepared metal/interlayer/semiconductor (MIS) diodes by coating of an organic film on p-Si substrate. Metal(Al)/interlayer(Orange GOG)/semiconductor(p-Si) MIS structure had a good rectifying behavior. By using the forward-bias I-V characteristics, the values of ideality factor (n) and barrier height (BH) for the Al/OG/p-Si MIS diode were obtained as 1.73 and 0.77 eV, respectively. It was seen that the BH value of 0.77 eV calculated for the Al/OG/p-Si MIS diode was significantly larger than the value of 0.50 eV of conventional Al/p-Si Schottky diodes. Modification of the potential barrier of Al/p-Si diode was achieved by using thin interlayer of the OG organic material. This was attributed to the fact that the OG organic interlayer increased the effective barrier height by influencing the space charge region of Si. The interface-state density of the MIS diode was found to vary from 2.79 × 10¹³ to 5.80 × 10¹² eV⁻¹ cm⁻².     

Interface control and photovoltaic properties of n-type silicon/metal junction by organic dye

The electronic parameters and photovoltaic properties of the Au/methylene blue/n-Si diodes were investigated by current-voltage and capacitance-conductance-frequency techniques. The diode exhibits a non-ideal behavior due the series resistance, organic layer and oxide layer. The barrier height (1.04 eV) of the Au/methylene blue/n-Si is higher than that of Au/n-Si Schottky diode (0.83 eV) due to an excess barrier formed by organic layer. The interface state density of the diode was determined using a conductance technique and was found to be 3.25 × 10¹² eV⁻¹ cm⁻². The diode shows a photovoltaic behavior with a maximum open circuit voltage V_oc of 0.23 V and short-circuit current I_sc of 20.8 μA under 100 mW/cm². It is evaluated that Au/methylene blue/n-Si is an organic-on-inorganic photodiode with the obtained electronic parameters and methylene blue organic dye controls the interface and electrical properties of conventional metal/n-type silicon junction.     

Capacitance–conductance–current–voltage characteristics of atomic layer deposited Au/Ti/Al2O3/n-GaAs MIS structures

We have studied the admittance and current–voltage characteristics of the Au/Ti/Al₂O₃/n-GaAs structure. The Al₂O₃ layer of about 5 nm was formed on the n-GaAs by atomic layer deposition. The barrier height (BH) and ideality factor values of 1.18 eV and 2.45 were obtained from the forward-bias ln I vs V plot at 300 K. The BH value of 1.18 eV is larger than the values reported for conventional Ti/n-GaAs or Au/Ti/n-GaAs diodes. The barrier modification is very important in metal semiconductor devices. The use of an increased barrier diode as the gate can provide an adequate barrier height for FET operation while the decreased barrier diodes also show promise as small signal zero-bias rectifiers and microwave. The experimental capacitance and conductance characteristics were corrected by taking into account the device series resistance R_s. It has been seen that the non-correction characteristics cause a serious error in the extraction of the interfacial properties. Furthermore, the device behaved more capacitive at the reverse bias voltage range rather than the forward bias voltage range because the phase angle in the reverse bias has remained unchanged as 90° independent of the measurement frequency.     

High performance n/p and p/n germanium diodes at low-temperature activation annealing

In this work we demonstrate the fabrication and characterization of high performance junction diodes using annealing temperatures within the temperature range of 300-350 °C. The low temperature dopant activation was assisted by a 50 nm platinum layer which transforms into platinum germanide during annealing. The fabricated diodes exhibited high forward currents, in excess of 400 A/cm² at ∼|0.7| V for both p⁺/n and n⁺/p diodes, with forward to reverse ratio I_F/I_R greater than 10⁴. Best results for the n⁺/p junctions were obtained at the lower annealing temperature of 300 °C. These characteristics compare favorably with the results of either conventional or with Ni or Co assisted dopant activation annealing. The low-temperature annealing in combination with the high forward currents at low bias makes this method suitable for high performance/low operating power applications, utilizing thus high mobility germanium substrates.     

Application of the transmission line equivalent circuit model to the analysis of the PN junction admittance under d.c. bias

Exact non-equilibrium one-energy-level numerical solutions of the admittance of a p+n junction are obtained from the nonuniform transmission line equivalent circuit model. Capacitance and conductance curves for equilibrium and reverse-biased gold-doped silicon diode are calculated using experimental values of emission and capture rates. Comparisons between theoretical and experimental frequency dependences of the admittance using new experimental capture rates show good agreements over a wide range of reverse bias.     

Effect of 6 MeV electron irradiation on electrical characteristics of the Au/n-Si/Al Schottky diode

Electron irradiation of the Au/n-Si/Al Schottky diode was performed by using 6 MeV electrons and 3 × 10¹² e⁻/cm² fluency. The current-voltage (I-V), capacitance-voltage (C-V) and capacitance-frequency (C-f) characteristics of the unirradiated and irradiated Schottky diode were analyzed. It was seen that the values of the barrier height, the series resistance, and the ideality factor increased after electron irradiation. However, there was a decrease in the leakage current with electron irradiation. The increase in the barrier height and in the series resistance values was attributed to the dopant deactivation in the near-interface region. The interface states, N_ss, have been decreased significantly after electron irradiation. This was attributed to the decrease in recombination centre and the existence of an interfacial layer. A decrease in the capacitance was observed after electron irradiation. This was attributed to decrease in the net ionized dopant concentration with electron irradiation.     

Hopping conductivity and dielectric relaxation in Schottky barriers on GaN

A study of the current and capacitance dependences on the forward voltage in Au/n-GaN Schottky diodes, the sub-band optical absorption spectra, and the defect photoluminescence in n-GaN bulk crystals and thin layers is reported. It is shown that defect-assisted tunneling is the dominant transport mechanism for forward-biased Schottky contacts on n-GaN. The dependences of the current and capacitance on forward bias reflect the energy spectrum of defects in the band gap of n-GaN: the rise in the density of deep states responsible for yellow photoluminescence in GaN with increasing energy and the steep exponential tail of states with an Urbach energy of E _U = 50 meV near the conduction-band edge. A decrease in the frequency of electron hops near the Au/n-GaN interface results in a wide distribution of local dielectric relaxation times and in a dramatic transformation of the electric-field distribution in the space-charge region under forward biases.     

Characterization of current-voltage (I-V) and capacitance-voltage-frequency (C-V-f) features of Al/SiO2/p-Si (MIS) Schottky diodes

The current-voltage (I-V) characteristics of metal-insulator-semiconductor Al/SiO₂/p-Si (MIS) Schottky diodes were measured at room temperature (300 K). In addition, capacitance-voltage-frequency (C-V-f) characteristics are investigated by considering the interface states (N_ss) at frequency range 100 kHz to 1 MHz. The MIS Schottky diode having interfacial insulator layer thickness of 33 Å, calculated from the measurement of the insulator capacitance in the strong accumulation region. At each frequency, the measured capacitance decreases with increasing frequency due to a continuous distribution of the interface states. From the I-V characteristics of the MIS Schottky diode, ideality factor (n) and barrier height (Φ_b) values of 1.766 and 0.786 eV, respectively, were obtained from a forward bias I-V plot. In addition, the interface states distribution profile as a function of (E_ss − E_v) was extracted from the forward bias I-V measurements by taking into account the bias dependence of the effective barrier height (Φ_e) for the Schottky diode. The diode shows non-ideal I-V behaviour with ideality factor greater than unity. This behaviour is attributed to the interfacial insulator layer, the interface states and barrier inhomogeneity of the device. As expected, the C-V curves gave a barrier height value higher than those obtained from I-V measurements. This discrepancy is due to the different nature of the I-V and C-V measurement techniques.     

Negative capacitance (impedance of the inductive type) of silicon p +-n junctions irradiated with fast electrons

Silicon p ⁺-n junction diodes irradiated with 3.5-MeV electrons (with the dose of 4 × 10¹⁶ cm^?2) are studied. The diodes’ inductance (L) was measured at a frequency f = 1 MHz with the amplitude of alternating current equal to 0.25 mA. Simultaneously with measurements of L at alternating current, a direct current was passed through the forward-biased diode, which brought about the injection of minority charge carriers into the base. In order to identify both of the mechanisms that give rise to the inductive-type impedance in irradiated diodes with the p ⁺-n junction and the main radiation defects that are directly involved in the formation of this impedance, irradiated samples were annealed isochronously in the temperature range T _a = 225–375°C with sub-sequent study of the main characteristics of the defects by deep-level transient spectroscopy. It is shown that the inductive-type impedance in irradiated diodes is caused by the processes of capture and retention of charge carriers injected into the base at the trapping centers for a time ～1/2f, i.e., for a half-period of oscillations. It is also shown that the trapping centers are the vacancy-oxygen complexes introduced by irradiation with electrons.     

Small-signal conductance vs temperature: A rapid means of determining the nature of current transport in high-doped n-GaAs Schottky barrier diodes

Measurements of small-signal forward conductance vs temperature at a constant bias current, and the reverse conductance vs temperature at a constant bias voltage have been carried out on ion-implanted n-GaAs Schottky barrier diodes fabricated on semi-insulated substrates, for the temperature range of 97–340 K. The results obtained have been interpreted in terms of diode ideality factors and compared with those calculated using the thermionic field emission model for the forward bias case and the pure field emission model for the reverse bias case.     

Effect of irradiation with fast neutrons on electrical characteristics of devices based on CVD 4<Emphasis Type="Italic">H</Emphasis>-SiC epitaxial layers

The effect of irradiation with 1-MeV neutrons on electrical properties of Al-based Schottky barriers and p⁺-n-n⁺ diodes doped by ion-implantation with Al was studied; the devices were formed on the basis of high-resistivity, pure 4H-SiC epitaxial layers possessing n-type conductivity and grown by vapor-transport epitaxy. The use of such structures made it possible to study the radiation defects in the epitaxial layer at temperatures as high as 700 K. Rectifying properties of the diode structures were no longer observed after irradiation of the samples with neutrons with a dose of 6×10¹⁴ cm^?2; this effect is caused by high (up to 50 GΩ) resistance of the layer damaged by neutron radiation. However, the diode characteristics of irradiated p⁺-n-n⁺ structures were partially recovered after an annealing at 650 K.     

The profile of temperature and voltage dependent series resistance and the interface states in (Ni/Au)/Al0.3Ga0.7N/AlN/GaN heterostructures

The temperature dependence of capacitance-voltage (C-V) and the conductance-voltage (G/w-V) characteristics of (Ni/Au)/Al_0.3Ga_0.7N/AlN/GaN heterostructures were investigated by considering the effect of series resistance (R_s) and interface states N_ss in a wide temperature range (79-395 K). Our experimental results show that both R_s and N_ss were found to be strongly functional with temperature and bias voltage. Therefore, they affect the (C-V) and (G/w-V) characteristics. The values of capacitance give two peaks at high temperatures, and a crossing at a certain bias voltage point (∼3.5 V). The first capacitance peaks are located in the forward bias region (∼0.1 V) at a low temperature. However, from 295 K the second capacitance peaks appear and then shift towards the reverse bias region that is located at ∼−4.5 V with increasing temperature. Such behavior, as demonstrated by these anomalous peaks, can be attributed to the thermal restructuring and reordering of the interface states. The capacitance (C_m) and conductance (G/w-V) values that were measured under both reverse and forward bias were corrected for the effect of series resistance in order to obtain the real diode capacitance and conductance. The density of N_ss, depending on the temperature, was determined from the (C-V) and (G/w-V) data using the Hill-Coleman Method.     

Doping compensation for increased robustness of fast recovery silicon diodes

High-power diodes with the radiation enhanced diffusion (RED) of Pd are shown to have much higher ruggedness during the reverse recovery compared to that of the Pt. Anode doping profiles measured by spreading resistance technique after a 10 MeV He implantation with subsequent annealing between 500 and 800 °C reveal different compensation effects between the Pd and Pt. The in-diffusing Pd converts the n-type background doping concentration of N_D = 3 × 10¹³ cm⁻³ in the position of radiation defects to that of a p-type with about one order higher concentration. The created low-doped p-layer significantly increases ruggedness of diodes during reverse recovery. In the diodes with the Pt layer, only a modest compensation is observed, a conversion to a p-type layer is missing and robustness is much lower. The DLTS spectra for the Pt and Pd devices show a similar electronic structure and introduction rates of defects at 700 °C, while they differ significantly at 600 and 650 °C both for the majority and minority carriers. It is preliminary suggested that the strong compensation effect after the RED of Pd is caused by a high introduction rate of an acceptor deep level at the lower half of the silicon bandgap.     

A discrete element small-signal equivalent circuit for forward-biased p+n diodes containing deep levels

A discrete element small-signal equivalent circuit model for p-n diodes containing deep defect levels is developed, by extending an existing model for undamaged devices. With the aid of a simple analytical expression which accurately describes the forward bias d.c. current, the enhanced small-signal conductance due to carrier recombination in the depletion region is included in the model. The influence of trapped charge on the space charge capacitance is incorporated using a simplified version of the analysis of Beguwala and Crowell. The predictions of the model are verified by experimental data from silicon p⁺n diodes, in which deep levels have been induced by electron irradiation. It is shown that the deep level activation energies may be estimated from the forward bias capacitance-voltage characteristics, yielding values which agree well with those obtained by established techniques.