Wireless Ad Hoc Networks: Strategies and Scaling Laws for the Fixed SNR Regime

This paper deals with throughput scaling laws for random ad hoc wireless networks in a rich scattering environment. We develop schemes to optimize the ratio lambda(n) of achievable network sum capacity to the sum of the point-to-point capacities of source-destinations (S-D) pairs operating in isolation. Our focus in this paper is on fixed signal-to-noise ratio (SNR) networks, i.e., networks where the worst case SNR over the S-D pairs is fixed independent of n. For such fixed SNR networks, which include fixed area networks as a special case, we show that collaborative strategies yield a scaling law of lambda(n)=Omega(1/n^1/3) in contrast to multihop strategies which yield a scaling law of lambda(n)=Theta(1/radicn). While networks where worst case SNR goes to zero do not preclude the possibility of collaboration, multihop strategies achieve optimal throughput. The plausible reason is that the gains due to collaboration cannot offset the effect of vanishing receive SNR. This suggests that for fixed SNR networks, a network designer should look for network protocols that exploit collaboration     

Optimal Unicast Capacity of Random Geometric Graphs: Impact of Multipacket Transmission and Reception

We establish a tight max-flow min-cut theorem for multi-commodity routing in random geometric graphs. We show that, as the number of nodes in the network n tends to infinity, the maximum concurrent flow (MCF) and the minimum cut-sparsity scale as θ(n²r³(n)/k), for a random choice of k = ω(n) source-destination pairs, where n and r(n) are the number of nodes and the communication range in the network respectively. The MCF equals the interference-free capacity of an ad-hoc network. We exploit this fact to develop novel graph theoretic techniques that can be used to deduce tight order bounds on the capacity of ad-hoc networks. We generalize all existing capacity results reported to date by showing that the per-commodity capacity of the network scales as θ(1/r(n)k) for the single-packet reception model suggested by Gupta and Kumar, and as θ(nr(n)/k) for the multiple-packet reception model suggested by others. More importantly, we show that, if the nodes in the network are capable of (perfect) multiple-packet transmission (MPT) and reception (MPR), then it is feasible to achieve the optimal scaling of θ(n²r³(n)/k), despite the presence of interference. In comparison to the Gupta-Kumar model, the realization of MPT and MPR may require the deployment of a large number of antennas at each node or bandwidth expansion. Nevertheless, in stark contrast to the existing literature, our analysis presents the possibility of actually increasing the capacity of ad-hoc networks with n even while the communication range tends to zero!     

Faster Algorithms for Construction of Recovery Trees Enhancing QoP and QoS

Medard et al. proposed an elegant recovery scheme (known as the MFBG scheme) using red/blue recovery trees for multicast path protection against single link or node failures. Xue et al. extended the MFBG scheme and introduced the concept of quality of protection (QoP) as a metric for multifailure recovery capabilities of single failure recovery schemes. They also presented polynomial time algorithms to construct recovery trees with good QoP and quality of service (QoS). In this paper, we present faster algorithms for constructing recovery trees with good QoP and QoS performance. For QoP enhancement, our O(n + m) time algorithm has comparable performance with the previously best O(n²(n + m)) time algorithm, where n and m denote the number of nodes and the number of links in the network, respectively. For cost reduction, our O(n + m) time algorithms have comparable performance with the previously best O(n²(n + m)) time algorithms. For bottleneck bandwidth maximization, our O(m log n) time algorithms improve the previously best O(nm) time algorithms. Simulation results show that our algorithms significantly outperform previously known algorithms in terms of running time, with comparable QoP or QoS performance.     

Electrical characterization of ultra-shallow junctions formed bydiffusion from a CoSi2 layer

Ultra-shallow p⁺/n and n⁺/p junctions were fabricated using a Silicide-As-Diffusion-Source (SADS) process and a low thermal budget (800-900°C). A thin layer (50 nm) of CoSi₂ was implanted with As or with BF₂ and subsequently annealed at different temperatures and times to form two ultra-shallow junctions with a distance between the silicide/silicon interface and the junction of 14 and 20 nm, respectively. These diodes were investigated by I-V and C-V measurements in the range of temperature between 80 and 500 K. The reverse leakage currents for the SADS diodes were as low as 9×10 ^-10 A/cm² for p⁺/n and 2.7×10^-9 A/cm² for n⁺/p, respectively. The temperature dependence of the reverse current in the p ⁺/n diode is characterized by a unique activation energy (1.1 eV) over all the investigated range, while in the n⁺/p diode an activation energy of about 0.42 eV is obtained at 330 K. The analysis of the forward characteristic of the diodes indicate that the p⁺ /n junctions have an ideal behavior, while the n⁺/p junctions have an ideality factor greater than one for all the temperature range of the measurements. TEM delineation results confirm that, in the case of As diffusion from CoSi₂, the junction depth is not uniform and in some regions a Schottky diode is observed in parallel to the n⁺/p junction. Finally, from the C-V measurements, an increase of the diodes area of about a factor two is measured, and it is associated with the silicide/silicon interface roughness     

Process limitation and device design tradeoffs of self-aligned TiSi2 junction formation in submicrometer CMOS devices

Submicrometer CMOS transistors require shallow junctions to minimize punchthrough and short-channel effects. Salicide technology is a very attractive metallization scheme to solve many CMOS scaling problems. However, to achieve a shallow junction with a salicide structure requires careful optimization for device design tradeoffs. Several proposed techniques to form shallow titanium silicide junctions are critically examined. Boron, BF₂, arsenic, and phosphorus dopants were used to study the process parameters for low-leakage TiSi ₂ p⁺/n and n⁺/p junctions in submicrometer CMOS applications. It is concluded that the dopant drive-out (DDO) from the TiSi₂ layer to form a shallow junction scheme is not an efficient method for titanium salicide structure; poor device performance and unacceptably leaky junctions are obtained by this scheme. The conventional post junction salicide (PJS) scheme can produce shallow n⁺/p and p⁺/n junctions with junction depths of 0.12 to 0.20 μm below the TiSi₂. Deep submicrometer CMOS devices with channel length of 0.40 to 0.45 μm can be fabricated with such junctions     

A new random walk model for PCS networks

This paper proposes a new approach to simplify the two-dimensional random walk models capturing the movement of mobile users in personal communications services (PCS) networks. Analytical models are proposed for the new random walks. For a PCS network with hexagonal configuration, our approach reduces the states of the two-dimensional random walk from (3n²+3n-5) to n(n+1)/2, where n is the layers of a cluster. For a mesh configuration, our approach reduces the states from (2n2-2n+1) to (n²+2n+4)/4 if n is even and to (n ²+2n+5)/4 if n is odd. Simulation experiments are conducted to validate the analytical models. The results indicate that the errors between the analytical and simulation models are within 1%. Three applications (i.e., microcell/macrocell configuration, distance-based location update, and GPRS mobility management for data routing) are used to show how our new model can be used to investigate the performance of PCS networks     

A high-performance InGaAs/InAlAs double-heterojunction bipolartransistor with nonalloyed n+-InAs cap layer on InP(n) grownby molecular beam epitaxy

An InGaAs/InAlAs double-heterojunction bipolar transistor (DHBT) on InP(n) grown by molecular-beam epitaxy (MBE) that exhibits high DC performance is discussed. An n⁺-InAs emitter cap layer was used for nonalloyed contacts in the structure and specific contact resistances of 1.8×10^-7 and 6.0×10^-6 Ω-cm² were measured for the nonalloyed emitter and base contacts, respectively. Since no high-temperature annealing is necessary, excellent contact surface morphology on thinner base devices can easily be obtained. In devices with 50×50-μm² emitter area, common-emitter current gains as high as 1500 were achieved at a collector current density of 2.7×10³ A/cm² . The current gain increased up to 2000 for alloyed devices     

Low-resistance bandgap-engineeredW/Si1-xGex/Si contacts

Bandgap-engineered W/Si_1-xGe_x/Si junctions (p⁺ and n⁺) with ultra-low contact resistivity and low leakage have been fabricated and characterized. The junctions are formed via outdiffusion from a selectively deposited Si_0.7Ge _0.3 layer which is implanted and annealed using RTA. The Si _1-xGe_x layer can then be selectively thinned using NH₄OH/H₂O₂/H₂O at 75°C with little change in characteristics or left as-deposited. Leakage currents were better than 1.6×10^-9 A/cm² (areal), 7.45×10^-12 A/cm (peripheral) for p⁺/n and 3.5×10^-10 A/cm² (peripheral) for n⁺/p. W contacts were formed using selective LPCVD on Si_1-xGe_x. A specific contact resistivity of better than 3.2×10^-8 Ω cm² for p ⁺/n and 2.2×10^-8 Ω cm² for n⁺/p is demonstrated-an order of magnitude n⁺ better than current TiSi₂ technology. W/Si_1-xGe _x/Si junctions show great potential for ULSI applications     

A low power scheduling scheme with resources operating at multiplevoltages

This paper presents resource and latency constrained scheduling algorithms to minimize power/energy consumption when the resources operate at multiple voltages (5 V, 3.3 V, 2.4 V, and 1.5 V). The proposed algorithms are based on efficient distribution of slack among the nodes in the data-flow graph. The distribution procedure tries to implement the minimum energy relation derived using the Lagrange multiplier method in an iterative fashion. Two algorithms are proposed, 1) a low complexity O(n²) algorithm and 2) a high complexity O(n² log(L)) algorithm, where n is the number of nodes and L is the latency. Experiments with some HLS benchmark examples show that the proposed algorithms achieve significant power/energy reduction. For instance, when the latency constraint is 1.5 times the critical path delay, the average reduction is 39%     

Resource requirements and layouts for field programmableinterconnection chips

Field-programmable interconnection chips (FPIC's) provide the capability of realizing user programmable interconnection for any desired permutation. Such an interconnection is very much desired for supporting rapid prototyping of hardware systems and for providing programmable communication networks for parallel and distributed computing. An FPIC should realize any possible permutation of input to output pins via a set of programmable switches. In this paper, we show that any such architecture requires a minimum of Ω(n log n) switches, where Ω is the number of I/O pins. The result stems from an analysis of the underlying permutation network. In addition, for networks of bounded degree d, we prove an Ω(log_d-1 n) bound on the routing delay (maximum length of routing paths for specific I/O permutations) and an Ω(n log_d-1 n) bound on the average utilization of programmable switches used by the FPIC to implement a specific permutation. For the same type of networks, we prove an Ω(n log_d-1 n) bound on the number of nodes of the network. Furthermore, we design efficient architectures for FPIC's offering a wide variety of routing delays, high average programmable resource utilization, and O(n²)-area two-layer layouts. The proposed structures are called hybrid Benes-Crossbar (HBC) architectures and clearly exhibit a tradeoff between performance (routing delay utilization) and area of the layout     

On the path-loss attenuation regime for positive cost and linear scaling of transport capacity in wireless networks

Wireless networks with a minimum inter-node separation distance are studied where the signal attenuation grows in magnitude as 1/ρ/sup δ/ with distance ρ. Two performance measures of wireless networks are analyzed. The transport capacity is the supremum of the total distance-rate products that can be supported by the network. The energy cost of information transport is the infimum of the ratio of the transmission energies used by all the nodes to the number of bit-meters of information thereby transported. If the phases of the attenuations between node pairs are uniformly and independently distributed, it is shown that the expected transport capacity is upper-bounded by a multiple of the total of the transmission powers of all the nodes, whenever δ>2 for two-dimensional networks or δ>5/4 for one-dimensional networks, even if all the nodes have full knowledge of all the phases, i.e., full channel state information. If all nodes have an individual power constraint, the expected transport capacity grows at most linearly in the number of nodes due to the linear growth of the total power. This establishes the best case order of expected transport capacity for these ranges of path-loss exponents since linear scaling is also feasible. If the phases of the attenuations are arbitrary, it is shown that the transport capacity is upper-bounded by a multiple of the total transmission power whenever δ>5/2 for two-dimensional networks or δ>3/2 for one-dimensional networks, even if all the nodes have full channel state information. This shows that there is indeed a positive energy cost which is no less than the reciprocal of the above multiplicative constant. It narrows the transition regime where the behavior is still open, since it is known that when δ<3/2 for two-dimensional networks, or δ<1 for one-dimensional networks, the transport capacity cannot generally be bounded by any multiple of the     

A bipolar mechanism for alpha-particle-induced soft errors in GaAsintegrated circuits

The alpha-particle-induced collected charge in undoped LEC semi-insulating GaAs is measured in n⁺-i-n⁺ and n ⁺-p-n⁺ isolation structures and is compared with the results of an analytical model based on a bipolar mechanism. In n ⁺-i-n⁺ isolation structures, a collected-storage multiplication phenomenon induced by alpha-particle incidence is observed. The measured collected charge is about three times the alpha-particle-generated charge. This phenomenon can be attributed to charge transfer between two adjacent n⁺ regions. The dominant charge-collection process continues for 2.4 ns in n⁺-i-n⁺ isolation structures, but in n⁺-p-n⁺ isolation structures, it stops within 0.8 ns. The measured collected charge decreases as the isolation gap and background acceptor concentration increase. These experimental results can be explained semiquantitatively by the analytical model. This suggests that the primary mechanism of soft errors in GaAs ICs is a bipolar mechanism     

Bits-per-Joule Capacity of Energy-Limited Wireless Networks

For a wireless network in which every node is bounded in its energy supply, we define a new concept of network capacity called "bits-per-Joule capacity", which is the maximum total number of bits that the network can deliver per Joule of energy deployed into the network. For a fixed network size, a finite number of information bits is delivered for each source-destination pair, under a fixed end-to-end probability of error constraint. We prove that under the one-to-one traffic model in which every node wants to send traffic to a randomly chosen destination node, the bits-per-Joule capacity of a stationary wireless network grows asymptotically as Omega((N/logN)^(q-1)/2 ), where N is the number of nodes randomly deployed onto the surface of a sphere and q is the path loss exponent. Further, the length of the block codes used grows only logarithmically in N, which indicates manageable decoder complexity as the network scales. The fact that the bits-per-Joule capacity grows with the number of nodes contrasts sharply with the scaling laws that have been derived for throughput capacity and implies that large-scale deployments for energy-limited sensor and ad hoc networks may be suitable for delay-tolerant data applications     

Maximizing Cooperative Diversity Energy Gain for Wireless Networks

We are concerned with optimally grouping active mobile users in a two-user-based cooperative diversity system to maximize the cooperative diversity energy gain in a radio cell. The optimization problem is formulated as a non-bipartite weighted-matching problem in a static network setting. The weighted-matching problem can be solved using maximum weighted (MW) matching algorithm in polynomial time O(n³). To reduce the implementation and computational complexity, we develop a Worst-Link-First (WLF) matching algorithm, which gives the user with the worse channel condition and the higher energy consumption rate a higher priority to choose its partner. The computational complexity of the proposed WLF algorithm is O(n) while the achieved average energy gain is only slightly lower than that of the optimal maximum weighted- matching algorithm and similar to that of the 1/2-approximation Greedy matching algorithm (with computational complexity of O(n² log n)) for a static-user network. We further investigate the optimal matching problem in mobile networks. By intelligently applying user mobility information in the matching algorithm, high cooperative diversity energy gain with moderate overhead is possible. In mobile networks, the proposed WLF matching algorithm, being less complex than the MW and the Greedy matching algorithms, yields performance characteristics close to those of the MW matching algorithm and better than the Greedy matching algorithm.     

Analytical models for n+-p+ double-gate SOIMOSFET's

Previously, we proposed n⁺-p⁺ double-gate SOI MOSFET's, which have n⁺ polysilicon for the back gate and p⁺ polysilicon for the front gate to enable adjustment of the threshold voltage, and demonstrated high speed operation. In this paper, we establish analytical models for this device, This transistor has two threshold voltages related to n⁺ and p⁺ polysilicon gates: V_th1 and V_th2, respectively. V _th1 is a function of the gate oxide thickness t_Ox and SOI thickness t_Si and is about 0.25 V when t_Ox/t_Si=5, while V_th2 is insensitive to t_Ox and t_Si and is about 1 V. We also derive models for conduction charge and drain current and verified their validity by numerical analysis. Furthermore, we establish a scaling theory unique to the device, and show how to design the device parameters with decreasing gate length. We show numerically that we can design sub 0.1 μm gate length devices with an an appropriate threshold voltage and an ideal subthreshold swing     

Scalability and Performance Evaluation of Hierarchical Hybrid Wireless Networks

This paper considers the problem of scaling ad hoc wireless networks now being applied to urban mesh and sensor network scenarios. Previous results have shown that the inherent scaling problems of a multihop ldquoflatrdquo ad hoc wireless network can be improved by a ldquohybrid networkrdquo with an appropriate proportion of radio nodes with wired network connections. In this work, we generalize the system model to a hierarchical hybrid wireless network with three tiers of radio nodes: low-power end-user mobile nodes (MNs) at the lowest tier, higher power radio forwarding nodes (FNs) that support multihop routing at intermediate level, and wired access points (APs) at the highest level. Scalability properties of the proposed three-tier hierarchical hybrid wireless network are analyzed, leading to an identification of the proportion of FNs and APs as well as transmission range required for linear increase in end-user throughput. In particular, it is shown analytically that in a three-tier hierarchical network with nA APs, nF FNs, and nM MNs, the low-tier capacity increases linearly with nF, and the high-tier capacity increases linearly with nA when nA = Omega(radic{nF}) and n _A = O(nF). This analytical result is validated via ns-2 simulations for an example dense network scenario, and the model is used to study scaling behavior and performance as a function of key parameters such as AP and FN node densities for different traffic patterns and bandwidth allocation at each tier of the network.     

InP/InGaAs HBTs with n+-InP contacting layers grown byMOMBE using SiBr4

InP/InGaAs heterojunction bipolar transistors (HBTs) with low resistance, nonalloyed TiPtAu contacts on n⁺-InP emitter and collector contacting layers have been demonstrated with excellent DC characteristics. A specific contact resistance of 5.42×10^-8 Ω·cm², which, to the best of our knowledge, is the lowest reported for TiPtAu on n-InP, has been measured on InP doped n=6.0×10¹⁹ cm^-3 using SiBr₄. This low contact resistance makes TiPtAu contacts on n-InP viable for InP/InGaAs HBTs     

Asymptotic Critical Total Power for $k$ -Connectivity of Wireless Networks

An important issue in wireless ad hoc networks is to reduce the transmission power subject to certain connectivity requirement. In this paper, we study the fundamental scaling law of the minimum total power (termed as critical total power) required to ensure k -connectivity in wireless networks. Contrary to several previous results that assume all nodes use a (minimum) common power, we allow nodes to choose different levels of transmission power. We show that under the assumption that wireless nodes form a homogeneous Poisson point process with density lambda in a unit square region [0, 1]², the critical total power required to maintain k-connectivity is Theta((Gamma(c/2 + k)/(k - 1)!) lambda^1-c/2) with probability approaching one as lambda goes to infinity, where c is the path loss exponent. If k also goes to infinity, the expected critical total power is of the order of k^c/2 lambda^1-c/2. Compared with the results that all nodes use a common critical transmission power for maintaining k-connectivity, we show that the critical total power can be reduced by an order of (log lambda)^c/2 by allowing nodes to optimally choose different levels of transmission power. This result is not subject to any specific power/topology control algorithm, but rather a fundamental property of wireless networks.     

Levinson-type algorithms for polynomial fitting and for Choleskyand Q factors of Hankel and Vandermonde matrices

This paper presents Levinson (1947)-type algorithms for (i) polynomial fitting (ii) obtaining a Q decomposition of Vandermonde matrices and a Cholesky factorization of Hankel matrices (iii) obtaining the inverse of Hankel matrices. The algorithm for the least-squares solution of Hankel systems of equations requires 3n²+9n+3 multiply and divide operation (MDO). The algorithm for obtaining an orthogonal representation of an (m×n) Vandermonde matrix X and computing the Cholesky factors F of Hankel matrices requires 5mn+n² +2n-3m MDO, and the algorithm for generating the inverse of Hankel matrices requires 3(n²+n-2)/2 MDO. Our algorithms have been tested by means of fitting of polynomials of various orders and Fortran versions of all subroutines are provided in the Appendix     

A silicon homojunction infrared detector having an active metalfilm on an n++ layer

A silicon n⁺⁺pn homojunction infrared detector, in which a degenerate n⁺⁺ layer is backed by a metal film forming an ohmic contact, has been proposed and studied. The metal film is a photoelectric conversion region along with the n⁺⁺ layer. Although, for an n⁺⁺pn detector without the metal film, very poor rectifying properties are observed when the n⁺⁺ layer thickness is extremely reduced, the new detector, employing a thin PtSi film as the metal film, shows normal diode I-V characteristics, since the PtSi film provides increased surface conductivity. The new detector has achieved an increase in operatable temperature, or an extension of cutoff wavelength, and operated with cutoff wavelengths of 11.9 μm, 18.7 μm and about 30 μm at 70 K, 50 K, and 30 K, respectively, because the saturation current density for the new detector has been reduced to about one tenth that for the previously reported n⁺⁺pn detector. The responsivity for the new detector has increased to 1.1-3.8 times as large as that for the previously reported n⁺⁺pn detector, when both detectors have the same cutoff wavelength