A 64 mW High Picture Quality H.264/MPEG-4 Video Codec IP for HD Mobile Applications in 90 nm CMOS

We have developed an H.264/MPEG-4 dual video codec IP for mobile applications such as digital still cameras (DSCs), digital video cameras (DVCs), and mobile phones. The codec is capable of encoding and decoding HD-sized moving pictures (1280 pixels by 720 lines at 30 fps) in real-time at an operating frequency of 144 MHz, and SD-sized pictures at 54 MHz. We have implemented our original architecture based on a macroblock-level pipeline method and encoding algorithms suitable for the architecture in the codec, which enable low power of 64 mW for HD encoding with high picture quality equivalent to that of the H.264 reference encoder “JM (Joint Model)”.      

基于Linphone的海思H.264硬件编码器移植

为了缩短H.264编码时间、提高H.264编码效率,提出基于Android Linphone的Hi3716MV400 H.264硬件编码器移植.对硬件编码器的移植方法进行详细说明,包括搭建Linphone开发环境、添加Hi3716MV400 H.264硬件编码库、编写H.264硬件编码函数.经程序测试,移植了海思H.264硬件编码器的Linphone能够在Hi3716MV400机顶盒进行正常的视频通信,并且减少CPU资源占用,降低Linphone视频通话死机频率.     

基于DirectShow的H.264视频采集与播放的实现

H.264标准与现有的视频压缩标准相比有诸多优势,它以优异的压缩性能在数字电视广播、视频实时通信、网络视频流媒体以及多媒体短信各个方面发挥重要作用。ffdshow是windows平台用于DirectShow和VFW进行多媒体播放的非常出色的工具,ffdshow的H.264编码采用的是X264编码器,X264是一个实用的H.264编码器。DirectShow提供对多媒体数据流的高质量捕获和回放,代表着未来多媒体应用程序开发的方向。本文使用DirectShow技术调用ffdshow实现了H.264视频的采集与播放。这种视频编解码方法可用于远程医疗、视频监控和视频会议等多媒体应用。     

Low-Cost H.264/AVC Inter Frame Mode Decision Algorithm for Mobile Communication Systems

One of the important issues of green mobile networking is the low energy consumption for either mobile devices or transmissions. To adapt this, a low-cost Inter frame mode decision (MD) algorithm is proposed for H.264/AVC encoder to reduce the computational complexity of the original encoding procedure in this paper. The information extracted from macroblock (MB), such as energy, temporal domain mode similarity and so on, which can be used to pre-estimate the optimal mode of the MB is investigated and utilized to eliminate the redundant mode candidates. The performance evaluations including quantitative analysis and PC simulations show that the proposed algorithm is an energy-efficient source coding because it can reduce around 85% Inter frame encoding time with little quality loss. It can be widely implemented in green mobile networking systems with H.264/AVC standard to realize the real-time video signal coding.     

A 63-mW H.264/MPEG-4 audio/visual codec LSI with module-wise dynamic Voltage/frequency scaling

A single-chip H.264 and MPEG-4 audio-visual LSI for mobile applications including terrestrial digital broadcasting system (ISDB-T / DVB-H) with a module-wise, dynamic voltage/frequency scaling architecture is presented for the first time. This LSI can keep operating even during the voltage/frequency transition, so there is no performance overhead. It is realized through a dynamic deskewing system and an on-chip voltage regulator with slew rate control. By the combination with traditional low power techniques such as embedded DRAM and clock gating, it consumes only 63 mW in decoding QVGA H.264 video at 15 frames/sec and MPEG-4 AAC LC audio simultaneously.     

H.264/AVC中基于全零块检测的运动估计快速算法

全零块检测是面向低比特率的视频编码器常用优化方法之一.特别是与运动估计相结合,可以有效的减少编码器的计算复杂性.本文根据H.264/AVC中整数变换的特点,给出了相应的全零块检测门限,提出了一种基于全零块检测的运动搜索提前中止准则.针对H.264/AVC多编码模式的特点,进一步将全零块检测用于H.264/AVC中多种编码模式的选择,有效的提高了运动估计的效率.利用这种方法,在有效减少编码器的计算复杂性,提高H.264/AVC软件编码器编码效率的同时,可以保持比特率和图像质量基本不变.     

新标准H.264的核心技术与应用前景

围绕视频传输要求高效、可靠和网络友好的三个焦点问题,深入研究H.264标准编码层压缩性能的提升、网络适配层的无缝集成和编/解码器的容错性能;以基于包交换的IP视频信息包为例,重点分析H.264对因特网RTP/UDP/IP协议的映射过程;阐述H.264在视频移动通信、视频流服务、数字电视广播与存储领域的典型应用特点;指出H.264对视频源压缩、信道有效利用、缓解视频传输瓶颈的影响和发展前景.     

H.264/AVC视频编码器在DM642平台上的实现与优化

文章介绍了H．264视频压缩标准的原理和DM642数字信号处理器的结构，并在该平台上实现了H．264视频编码器。对H．264标准中的几个主要模块进行了理论分析，并结合该数字信号处理器的特点对程序进行了优化．有效降低了整个编码器的运行时间。实验结果表明文章实现的视频编码器在性能和效率方面都达到了良好的效果。     

H.264算法的DSP移植与优化

在TMS320DM643平台上实现H.264基档次编码器的移植与优化显得格外实用和必要。基于对DSP平台的结构特性和H.264的计算复杂度分析,主要从核心算法、数据传输和存储器/Cache使用几方面对H.264编码器进行了优化。实验结果表明,对于C IF格式的视频序列,优化后的H.264编码器能够达到每秒高于24帧的编码速度,满足了视频处理对于实时性的要求。     

基于块参考像素特征的快速帧内预测模式选择新算法

帧内预测是H.264采用的一种编码新技术。与以前的编码标准相比,H.264编码性能有了很大的提高,但同时编码复杂度和计算量也明显增加。该文研究了提高H.264编码速度的途径,着重分析了帧内预测模式快速选择的问题。经过分析发现,4×4亮度块的参考像素亮度值通常具有相似性,对应地,4×4亮度块的9种预测模式所得的预测结果也是相近的。根据4×4亮度块参考像素的这一特征,该文提出了一种基于4×4亮度块参考像素特征的快速帧内预测模式选择算法。实验结果说明了该文算法的有效性,与H.264编码器JM92相比,该算法的计算量减少了46%,而编码质量、PSNR和输出码率保持基本不变。     

基于H.264编码的多屏共享系统研究

H.264/AVC是一种由ITU-T视频编码专家组合ISO/IEC JTC1动态图像专家组联合提出的高度压缩视频编码器标准。然而H.264/AVC编码器较高的运算复杂度提高了多屏共享系统的延迟时间。H.264/AVC由多种开源的实现,其中X264因简单高效而得到广泛的应用。在此对多频共享系统的关键技术进行实现,分析X264编码器提供的运动估计算法并且提出一种优化的算法。实验表明,新的算法提高了编码的速度、减少了系统延迟时间,同时视频质量几乎没有产生损失。     

基于DSP平台的H.264编码器的优化与实现

针对H.264编码器的复杂度很高和基于DSP平台的H.264编码器的实时处理实现难度很大的问题,该文首先介绍了H.264标准基本档次的编码结构,对影响编码速度的原因进行了深入的分析。然后针对TMS320DM642芯片的特点,提出一些优化实现方案,最终在DSP平台上实时实现了H.264基本档次编码器。测试结果表明,经过优化,H.264编码器的处理速度有了很大的提高,对于CIF格式的视频序列能够满足视频编码的实时处理要求。     

基于TMS320DM3730的H．264编码器移植与优化方法研究

提出了一种在TI公司高性能数字信号处理器TMS320DM3730上进行H．264编码器（即x264编码器）移植与优化的方法,详细描述了在CCS4．2开发平台上进行x264编码器移植工作的基本原理和需要注意的问题。为了提高编码速度,针对DM3730处理器的结构特点,对x264编码器进行了优化,主要方法包括编译器优化、内存优化、C语言代码优化及汇编代码优化。对x264编码器进行的CIF格式编码测试结果表明,在均值信噪比略微降低的前提下,编码速度得到了显著提高,因此获得了更优的编码效率。     

Encoder adaptable difference detection for low power video compression in surveillance system

As a state-of-the-art video compression technique, H.264/AVC has been deployed in many surveillance cameras to improve the compression efficiency. However, it induces very high coding complexity, and thus high power consumption. In this paper, a difference detection algorithm is proposed to reduce the computational complexity and power consumption in surveillance video compression by automatically distributing the video data to different modules of the video encoder according to their content similarity features. Without any requirement in changing the encoder hardware, the proposed algorithm provides high adaptability to be integrated into the existing H.264 video encoders. An average of over 82% of overall encoding complexity can be reduced regardless of whether or not the H.264 encoder itself has employed fast algorithms. No loss is observed in both subjective and objective video quality.     

基于S3C2440的H．264软编解码器实现

H．264编解码器的软件实现是嵌入式应用领域的热门研究课题。在此介绍以S3C2440为硬件平台,在Linux开发环境下实现基于H．264的x264编码、ffmpeg解码以及ffplay解码播放的移植过程和方法。实验结果表明,在qcif分辨率下,可以获得近实时的解码和播放。最后针对视频流进行实时编解码和播放的要求,提出对编解码优化的方案。     

H.264视频编码器在DM6437上的优化实现

为了实现基于DSP的H.264视频编码器的实时性能,提出了一系列优化实现方法。首先结合TMS320DM6437硬件特点,描述了X264代码向TMS320DM6437平台的移植过程和优化方法,重点介绍了整数DCT变换和量化的线性汇编编写及汇编级优化。实验结果表明,本编码器实现了cif格式视频的实时编码,Dl格式视频的编码速率也达到了18 fps,基本满足视频监控系统中编码器的需求。     

基于TMS320DM6446的X264编码器的移植和优化

比较了H264的几种开源代码的优缺点,选择X264算法。由于X264算法需要经过向DSP上的移植和优化才能满足实时处理的要求,选用TMS320DM6446作为硬件平台,完成了X264编码器向TMS320DM6446的移植和优化,优化主要包括编码器选项、运动估计算法、EDMA以及内联函数等方面的优化。实验结果表明,在保证视频质量的前提下,编码效率明显提高,基本达到CIF格式序列的实时编码要求。     

Adaptive slice-level parallelism for H.264/AVC encoding using pre macroblock mode selection

In order to achieve high computational performance and low power consumption, many modern microprocessors are equipped with special multimedia instructions and multi-core processing capabilities. The number of cores on a single chip increases double every three years. Therefore, besides complexity reduction by smart algorithms such as fast macroblock mode selection, an effective algorithm for parallelizing H.264/AVC is also very crucial in implementing a real-time encoder on a multi-core system. This algorithm serves to uniformly distribute workloads for H.264/AVC encoding over several slower and simpler processor cores on a single chip. In this paper, we propose a new adaptive slice-size selection technique for efficient slice-level parallelism of H.264/AVC encoding on a multi-core processor using fast macroblock mode selection as a pre-processing step. For this we propose an estimation method for the computational complexity of each macroblock using pre macroblock mode selection. Simulation results, with a number of test video sequences, show that, without any noticeable degradation, the proposed fast macroblock mode selection reduces the total encoding time by about 57.30%. The proposed adaptive slice-level parallelism has good parallel performance compared to conventional fixed slice-size parallelism. The proposed method can be applied to many multi-core systems for real-time H.264 video encoding.     

Fast algorithms for designing nearly optimal lookup tables for complexity control of the H.264 encoder

The H.264/AVC standard significantly improves video compression performance over earlier standards at the cost of increased complexity. In this paper, we present two offline algorithms for generating a lookup table of parameter settings that can be used by a complexity control algorithm for controlling the speed of the H.264 encoder. Our algorithms to design the lookup table of parameter settings take fewer than 2% of the number of encodings required by an exhaustive search of all possible parameter settings and find parameter settings that offer high peak signal-to-noise ratio (PSNR) with low encoding time at a given bitrate. Our parameter settings are fairly robust over different videos and bitrates. We focus on low-resolution videos at bitrates less than 300 kb/s. We compare the performance of our algorithms to both exhaustive search and a multiobjective optimization algorithm. Our parameter settings improve the average encoding speed over the default parameter setting of the x264 encoder on both PC and cell phone platforms by up to 37.4 and 94.1%, respectively, with PSNR difference of up to 0.3 dB.     

基于H．263编码标准的H．264实时编码器的优化设计

从实时应用角度出发,参考H.263编码标准,对H.264视频编码器进行精简,并对耗时较大的算法进行改进.仿真结果表明,简化后的H.264编码器编码速度达到20f/s(帧/秒),达到实时编码要求,且编码性能优于H.263编码标准的编码器.