Remote I／O Unit for Optical Fiber Communication^①

Based on optical fiber technology,the main electric circuit of the remote I/O unit controller is studied.And the application of the system is illustrated.     

Remote I/O Unit for Optical Fiber Communication

Abstract:Based on optical fiber technology, the main electric circuit of the remote I/O unit controller is studied. And the application of the system is illustrated.     

高速I／O接口技术

现代通信技术朝着高速、精确的方向发展,尤其是高速串行通信,逐渐成为通信技术的主流,在各行各业扮演着极其重要的角色,文中简述了高速I／O的相关技术,如SERDES（串行器／解串器）技术、8B／10B编码、COMMA字符、预加重等,并列举了具有代表性的Xilinx公司的FPGA产品,展示了RocketIO技术的实际应用。     

一种集群计算并行I/O中启发式文件分类分配策略研究

提出了一种新的应用于集群计算环境的文件分配算法,即启发式文件分类分配算法(Heuristic FileSorted Assignment algorithm,HFSA),它在保证系统负载基本均衡的前提下,按相似的访问服务时间对每个待分配的数据文件进行磁盘分配.具体实现时,首先对待分配文件按它们的服务时间大小进行排序,然后从集群中选择一个结点的磁盘,将有序的若干文件连续地分配到该磁盘上,直接该磁盘达到最大负载时为止.通过对新策略与已有的贪婪文件分配法进行实验比较,结果表明:在访问响应时间方面,系统轻负载时,缩短了20.2%,系统重负载时,缩短了31.6%,并且数据访问的速率越高,由启发式文件分类分配策略所改善的性能就越明显.     

支持I/O总线高速运行的HyPerTransPort技术

传统的单端I/O总线方案似乎已经走到了它的尽头,不再能满足快速处理器和先进I/O器件的要求.     

分布式I／O资源虚拟化技术的研究

提出一种可有效整合和使用分布式I/O资源的新方案.该方案实现于操作系统和系统硬件之间,主要采用最新的硬件虚拟化技术,将分布于多主机的I/O资源进行虚拟化和整合,为上层客户操作系统构建一个全局虚拟I/O空间,实现客户操作系统对分布式I/O资源的全局管理和使用.该方案实现于系统软件层,性能较高、实现成本低,并且客户操作系统无需做任何修改.     

功率再利用法提高I/O效率

在定制IC的开发过程中,控制功耗以使手持式产品中电池工作寿命最长,是一个更需要优先考虑因素.I/O驱动器的功耗在这一功耗中占有很大的比重,特别是当芯片是I/O密集型的,而且还必须向外部存储器或外设传送高速率数据时.Adiabatic Logic公司的IP(知识产权)用一个"功率再利用"I/O单元解决了这一问题,因为这一I/O单元可以将驱动外部线路的总功耗降低75%."Adiabatic"这个词表示一个没有损失或增加能量的过程.     

Bus-invert coding for low-power I/O

Technology trends and especially portable applications drive the quest for low-power VLSI design. Solutions that involve algorithmic, structural or physical transformations are sought. The focus is on developing low-power circuits without affecting too much the performance (area, latency, period). For CMOS circuits most power is dissipated as dynamic power for charging and discharging node capacitances. This is why many promising results in low-power design are obtained by minimizing the number of transitions inside the CMOS circuit. While it is generally accepted that because of the large capacitances involved much of the power dissipated by an IC is at the I/O little has been specifically done for decreasing the I/O power dissipation. We propose the bus-invert method of coding the I/O which lowers the bus activity and thus decreases the I/O peak power dissipation by 50% and the I/O average power dissipation by up to 25%. The method is general but applies best for dealing with buses. This is fortunate because buses are indeed most likely to have very large capacitances associated with them and consequently dissipate a lot of power     

扩展I/O通道的存储连接技术

在简要分析传统的SCSI技术的基础上,对扩展I／O通道的新连接技术进行了研究。光纤通道技术提供了很高的I／O性能,但容易形成SAN“孤岛”。iSCSI将SCSI与以太网技术结合,将多个SAN“孤岛”连接在一起。InfiniBand用通用的适配器综合各类存储设备,在I／O性能和扩展性等方面都极具吸引力。该文重点研究了RDMA的结构、特征及在存储中的应用,它引入了零复制概念,使主机端的I／O瓶颈被打破,在网络存储中有着广泛的应用前景.     

基于DSPI／O口的扩展技术应用

在一个以DSP为主控芯片的频谱分析仪系统中，需要用到键盘、显示器作为系统的输入输出设备。这就要与DSP的I／O口打交道。介绍了TMS320VC5410的通用I／O口资源配置情况，以EPSON的液晶显示器和软件控制键盘输入为例，给出了相应的接口电路和软件驱动程序的设计。     

一种新型的I/O光纤阵列接口制作方法

提出了一种刻矩形槽穿插法研制光纤阵列接口,对设计参数进行了理论分析,并运用此法研制了多种规格光纤阵列接口器件,对其中1×12多模光纤阵列接口器件进行测试,结果表明该方法具有精度高,耦合均匀性好,制作方法简单,重复性好的优点,成功应用于光互连网络模块I/O接口模块。     

神经网络与光计算

介绍了近年来正在兴起的光神经计算的研究动态。着重讨论了神经网络与光技术、光神经计算、光联想学习和联想记忆系统,光神经器件及目前发展光神经计算的有关问题等。     

I/O subsystem architecture

The primary concerns of I/O subsystem architecture include the coordination of central processor and I/O subsystem activities, the mapping of external I/O processing requirements into the basic functionality of the I/O subsystem, and the management of concurrent processing activities within the I/O subsystem itself. Architectural developments such as data and command chaining, channel program interfaces, automatic key searching, rotational portion sensing, and block multiplexing are evaluated in terms of these underlying concerns. A number of new arguments are presented to demonstrate the strengths and weaknesses of current designs, and several projections are made concerning the future evolution of this area.     

I/O divided column redundancy scheme for high-speed DRAM withmultiple I/Os

A novel I/O divided column redundancy (IDCR) scheme that can improve the effectiveness of repair and minimise the overhead of the die area is presented. The IDCR scheme has greater flexibility than conventional schemes in multiple I/O DRAMs. Since an IDCR can share neighbouring redundant column lines (RCLs), the RCLs of neighbouring I/O blocks can be used to repair the defective column lines of a self-block. This work also shows that the IDCR scheme improves the data access speed of normal column lines or redundant column lines by reducing the data bus loading     

Synchronous Parallel Optical I/O on CMOS: A Case Study of the Uniformity Issue

Short-range parallel optical interconnect between integrated circuits can alleviate bandwidth, power, and packaging density issues that are associated with low-latency high-bandwidth input-output over electrical interconnect. In this paper, we evaluate the option of using true source-synchronous signaling over optical interconnect with a large number of channels, reducing the substantial per-channel clock synchronization circuitry to one instance. We also look into dc-unbalanced signaling to remove the need for data coding. Uniformity across channels is key to the feasibility of such an approach. An actual 64-channel parallel optical interconnect setup at 1.25 Gb/s/channel is examined, and models for the performance and uniformity of the different constituent parts of the interconnect are drawn up. Major attention is given to the statistical modeling of the coupling efficiency between a vertical cavity surface emitting laser array and a multifiber connector. Although derived in the context of a uniformity study, the stochastic models and the modeling approach are valuable in their own right. In our case study, the usage of a common logic threshold across all channels, which is required for dc-unbalanced signaling, appears infeasible after all models are combined. Efficient true source-synchronous signaling turns out to be within reach in carefully designed systems.     

面向虚拟化技术的可信计算平台研究

虚拟化技术的广泛运用为新型计算环境带来了新的安全威胁和挑战,如何通过增强虚拟机的安全性保障云服务的安全,是目前亟需解决的问题。文章一方面研究虚拟化技术如何对可信计算平台提供支撑,另一方面研究可信计算平台如何为虚拟化技术提供安全保障服务。通过构建基于可信计算的虚拟化安全架构,对面向虚拟化的可信计算平台关键技术进行分析和研究,能够较好地解决虚拟化带来的新安全问题。     

A Scalable Digitalized Buffer for Gigabit I/O

A serial input–output (I/O) composed of inverters and transmission gates only is proposed to achieve high supply voltage scalability and low area overhead. The inverter with an inductive biasing circuit can extend bandwidth, and reduce the simultaneous switching noise simultaneously. With a TSMC 0.18-$mu{hbox {m}}$ CMOS process, the I/O occupies an area of 0.014 ${hbox {mm}}^{2}$ and operates from 4 Gbps@1.9 V to 1.5 Gbps@1.1 V.