Programmable monolithic<Emphasis Type="Italic"> Gm</Emphasis>-<Emphasis Type="Italic">C</Emphasis> band-pass filter: design and experimental results

We propose in this paper a programmable band-pass filter based on an array of fully differential transconductance circuits that controls the filter parameters. The signal path does not contain any switch, and fine-tuning of the filter parameters is implemented using programmable capacitors. A digital building block is implemented in the proposed band-pass filter to tune its central frequency as well as its bandwidth. The filter circuit is based on a biquad topology, which is designed and implemented with CMOS 0.18 μm technology. Experimental results show a programming ability of the center frequency between 5.9 and 58 MHz, and the quality factor can be tuned from 0.36 to 10. These features are obtained for a total power consumption of less than 10.5 mW from a single 1.8 V power supply.     

A CMOS Digitally Programmable Universal Current-Mode Filter

A new digitally programmable universal current-mode biquad filter is proposed. The filter is based on digitally controlled current followers (DCCFs). It utilizes gains of the DCCFs to provide precise frequency and/or gain characteristics that can be digitally tuned over a wide range. All parameters of the proposed filter can be adjusted independently. Experimental results obtained from a 0.35-$mu$m standard CMOS chip are provided.      

Programmable CMOS switched-capacitor biquad using quasi-passivealgorithmic DAC's

This paper describes an electrically programmable switched-capacitor (SC) biquad using quasi-passive algorithmic digital-to-analog converters (DAC's). Since only two equal-valued capacitors are needed for programming each capacitance value, the proposed technique offers compact, cost-effective programmability when compared to traditional programming techniques employing binary-weighted capacitor-arrays (C-arrays). A demonstration prototype chip realized in a 1.2 μm CMOS double-metal double-poly technology, and which implements an 8 b programmable SC biquad giving a wide range of lowpass, bandpass and highpass filtering functions, occupies an active area of only 0.38 mm²     

0.13 μm CMOS宽带大动态范围六阶跨导电容低通滤波器

提出了一种适用于宽带大动态范围应用的六阶跨导电容低通滤波器。该滤波器为Chebyshev类型,采用开环级联结构来实现。通过一组开关电容阵列来补偿由工艺温度等因素引入的截止频率的偏差。实际测试结果表明,该滤波器的-3dB截止频率可调范围为30～100MHz,在500mVp-p输入信号幅度下,IM3为-48dB。电源电压为3V时,消耗电流25mA,芯片面积为0.5mm2。该滤波器采用TSMC0.13μm CMOS工艺实现。     

A 1.1 GHz Fifth Order Active-LC Butterworth Type Equalizing Filter

This paper describes architectural and design considerations for low power, GHz range wideband low-pass active filters. A series LC resonator based biquad is proposed and its power efficiency is shown to be over 7 times better than an equivalent Gm-C biquad. Reduced number of active elements and readily available bandpass and low-pass signals make this topology particularly suitable for efficient realization of equalizing functions. Also demonstrated is a common-mode feedback scheme that allows for a stable, high accuracy common-mode control with loop bandwidth which can exceed twice the filter's bandwidth. A fifth order active-LC Butterworth filter prototype is fabricated in a standard 0.18 CMOS technology. It provides a bandwidth of 1.1 GHz and features equalization gain programmable over a 0-23 dB range. It is experimentally verified to achieve 47 dB SNR and 48 dB IM3 with 250 mVpp swing while consuming 72 mW of power.     

An eighth-order CMOS low-pass filter with 30-120 MHz tuning rangeand programmable boost

A CMOS low-pass filter with programmable boost is presented. The architecture is a G_m/C type with the G_m value controlled through a resistor servo approach. The transfer function has been optimized in order to reduce the sensitivity to component parameter variations. The 1:4 tuning range is achieved by exploiting a dual-loop control over a degenerated differential pair. At the nominal output voltage swing of 200 mV_pp differential, a THD better than 40 dB is guaranteed. The high-frequency boost is programmable between 6 and 14 dB. This filter, realized as a cascade of biquad and first-order cells, is implemented in a 0.25-μm 2.5-V CMOS technology. It dissipates 120 mW with f_c=120 MHz and has a die area of 0.23 mm²     

Analysis of Errors in a Comparator-Based Switched-Capacitor Biquad Filter

Comparator-based switched-capacitor (CBSC) techniques have become popular in reducing power consumption and increasing the speed of data converters. This brief investigates the use of CBSC techniques for implementing a biquad filter. A CBSC implementation of a low-pass biquad is proposed, and the sources of error are analyzed. It is shown that implementing the lossy integrator as the last stage produces a lower offset voltage. The sensitivity of the biquad omega₀ and Q to the CBSC overshoot error is shown to be similar to that of the finite operational amplifier gain error in a switched-capacitor filter. Simulation results confirm the presented theory.     

New universal filter using only current followers as active elements

A new universal current-mode (CM) biquad filter is presented which can realise all the five standard filter functions namely lowpass, bandpass, highpass, notch and allpass employing only unity-gain current followers (CF) as active elements. The workability of the proposed universal biquad, realised with CMOS unity-gain current followers, is established by SPICE simulations. The new circuit provides explicit CM outputs from high output impedance terminals and possesses a number of advantageous features all of which are not available simultaneously in any of the previously reported CF-based universal biquad filters.     

Design and Analysis of Tunable Voltage Differencing Inverting Buffered Amplifier (VDIBA) with Enhanced Performance and Its Application in Filters

This paper proposes a high performance tunable Voltage Differencing Inverting Buffered Amplifier (VDIBA) where transconductance of VDIBA is enhanced by using programmable positive feedback technique and bandwidth is enhanced by using resistive compensation technique. The enhanced performance of proposed VDIBA is demonstrated by presenting detailed frequency analysis. Furthermore, it is verified that transconductance of proposed VDIBA can be enhanced up to 10.6 mS at tuning current (Ic) of 100 µA. Moreover, resistive compensation technique enhance bandwidth of propose circuit up to 263 MHz. To illustrate the effectiveness of proposed circuit, voltage mode universal biquad filter is designed as an application example. The pole frequency of proposed filter is tunable in range of 10.5–83.4 MHz. The proposed VDIBA and its filter applications are designed and simulated using TSMC 0.18 µm CMOS technology in Cadence virtuoso schematic composer at ± 0.6 V supply voltage.     

On the Realization of Current－Mode Continuous－Time Operational Transconductance Capacitance Filter

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A 4th-order active-G/sub m/-RC reconfigurable (UMTS/WLAN) filter

A fourth-order low-pass continuous-time filter for a UMTS/WLAN receiver of a reconfigurable terminal is presented. The filter uses the cascade of two Active-G/sub m/-RC biquad cells. A single opamp is used for each biquad and its unity-gain-bandwidth is comparable to the filter cut-off frequency. Thus, the opamp power consumption is strongly reduced w.r.t. other closed-loop filter configurations. The cut-off frequency deviation due to the technological spread, aging and temperature variation is adjusted by an on-chip tuning circuit. The device in a 0.13 /spl mu/m CMOS technology occupies a 0.9 mm/sup 2/ area and it consumes 3.4 mW and 11 4.2 mW for the UMTS and WLAN, respectively. The full chip has been designed using an automatic design tool, which is validated by the agreement between the experimental results and the expected performance.     

Analytical Synthesis of the Digitally Programmable Voltage-Mode OTA-C Universal Biquad

None of the recently reported voltage-mode versatile filters are digitally programmable for applications like the easy addition of current-mode filtering signals to do the synthesis. None of the recently reported analytical synthesis methods are used for the realization of a multifunction filter. Both the above two induced motivations of researches have been merged, developed, and solved in this brief on the voltage-mode operational transconductance amplifier (OTA)-C universal biquad filter, which still achieves many advantages like the employment of all single-ended-input OTAs, all grounded capacitors, and the least number of active transistor and passive component counts, in addition to having a controllable gain, a cascadable input terminal, and the absence of the need to impose component matchings.     

Single CCII-based voltage-mode universal filter

A new voltage-mode universal biquad filter is presented which can realize all the five standard filter functions namely lowpass, bandpass, highpass, notch, and allpass employing only one CCII as active element. The new circuit is composed of only one CCII, two capacitors, and three resistors, and realizes five generic filter signals without any inverting-type voltage input signals. This is unlike biquad reported by filter structures which employs more active components and needed an inverting-type voltage input signal to realize allpass signal.     

A field programmable analog array for CMOS continuous-time OTA-Cfilter applications

A programmable high-frequency operational transconductance amplifier (OTA) is proposed and analyzed. A general configurable analog block (CAB) is presented, which consists of the proposed programmable OTA, programmable capacitor and MOSFET switches. Using the CABs, the universal tunable and field programmable analog array (FPAA) can be constructed, which can realize many signal-processing functions, including filters. A tuning circuit is also discussed. The proposed OTA has been simulated and fabricated in CMOS technology. The results show that the OTA has the transconductance tunable/programmable in a wide range of 700 times and the -3-dB bandwidth larger than 20 MHz. A universal 5×8 CAB array has been fabricated. The chip has also been configured to realize OTA-C 60-kHz and 500-kHz bandpass filters based on ladder simulation and biquad cascade     

Digital frequency and Q tuning technique for low-voltage activefilters

A digital frequency and Q tuning technique is proposed for low-voltage (1 V) active RC biquad filters that uses programmable capacitor arrays (PCAs). The proposed technique does not require any peak detectors, which are difficult to implement at low voltages. Instead, it uses a small number of analogue comparators, a digital comparator and binary counters to adjust the PCAs     

一种可编程高线性CMOSOTA的设计

采用SMIC 0.18 μm工艺,±0.9 V电源电压,提出了一种可编程高线性全对称伪差分 CMOS OTA 电路.提出的伪差 分输入级电路基于基本伪差分(PD)结构并采用 HD3 前馈技术消除三阶谐波失真,输出级采用可编程电流放大器实现.使用 Cadence 软件的 Spectre 仿真器进行电路仿真可得,Gm值三个...     

New voltage-model/current-mode universal biquad filter using unity-gain cells

A new universal biquad filter is presented which can realize all the five standard filter functions namely lowpass, bandpass, highpass, notch and allpass in voltage-mode (VM) as well as in current-mode (CM) employing only unity-gain cells (i.e. voltage followers and current followers) as active elements. Explicit VM/CM outputs are available from low output impedance terminals and high output impedance terminals, respectively. The workability of the proposed universal biquad, realized with CMOS unity-gain cells, is established by SPICE simulations.     

A 1.3-V 5-mW fully integrated tunable bandpass filter at 2.1 GHz in 0.35-/spl mu/m CMOS

A 2.1-GHz 1.3-V 5-mW fully integrated Q-enhancement LC bandpass biquad programmable in f/sub o/, Q, and peak gain is implemented in 0.35-/spl mu/m standard CMOS technology. The filter uses a resonator built with spiral inductors and inversion-mode pMOS capacitors that provide frequency tuning. The Q tuning is through an adjustable negative-conductance generator, whereas the peak gain is tuned through an input G/sub m/ stage. Noise and nonlinearity analyses presented demonstrate the design tradeoffs involved. Measured frequency tuning range around 2.1 GHz is 13%. Spiral inductors with Q/sub o/ of 2 at 2.1 GHz limit the spurious-free dynamic range (SFDR) at 31-34 dB within the frequency tuning range. Measurements show that the peak gain can be tuned within a range of around two octaves. The filter sinks 4 mA from a 1.3-V supply providing a Q of 40 at 2.19 GHz with a 1-dB compression point dynamic range of 35 dB. The circuit operates with supply voltages ranging from 1.2 to 3 V. The silicon area is 0.1 mm/sup 2/.     

A 100-kHz to 20-MHz Reconfigurable Power-Linearity Optimized $G_m$–$C$ Biquad in 0.13-$mu$ m CMOS

Fully reconfigurable transceivers are required to answer the low-power high flexibility demand of future mobile applications. This paper presents a fully reconfigurable G_m-C biquadratic low-pass filter which offers a large range of both frequency and performance flexibility. First, a design approach is proposed focusing on linearity properties by extending Volterra analysis from circuit to architectural level in order to optimize the filters performance. Secondly, a novel switching technique is discussed that allows a bandwidth tuning over more than two orders of magnitude starting from 100 kHz up to 20 MHz and which uses only gate transistor capacitance. Fundamental to this technique is that the power consumption can be traded with the desired performance. Furthermore, the quality factor, noise level and linearity are all programmable over a very wide range. The biquad is processed in a 0.13-mum CMOS technology and operates at different supply voltages down to less than 0.8 V. For a 1.2-V supply, the filter consumes between 103 muA (100 kHz) and 11.85 mA (20 MHz) for a low noise setting around 25 to 35 muVrms integrated over the filter bandwidth achieving an third-order intermodulation intercept point of 10 dBVp.     

Improving the testability of switched-capacitor filters

A design-for-test methodology for SC filters is presented, based on an architecture using some additional circuitry and providing extra capabilities for both off-and on-line tests. The approach uses a comparison (voting) mechanism to indicate whether or not two copies of a filter element (a biquad, for instance) have a similar response during their actual operation. The design and implementation of a few filter examples are included to assess the potential usefulness of this new approach.