13．56MHz RFID标签防冲突算法研究

射频识别技术应用前景广泛,技术标准以ISO／IEC为主。与传统通信系统一样,RFID系统也存在信道争用问题——标签冲突问题,标签防冲突性能是决定RFID系统性能的关键参数之一。论文比较研究了ISO／IEC标准体系里关于高频13．56MHz频段的几个协议的标签防冲突算法,分析了各自特点,并对技术改进方向提出了一些看法。     

An ultra-low-power CMOS temperature sensor for RFID applications

An ultra-low-power CMOS temperature sensor with analog-to-digital readout circuitry for RFID applications was implemented in a 0.18-μm CMOS process.To achieve ultra-low power consumption,an error model is proposed and the corresponding novel temperature sensor front-end with a new double-measure method is presented.Analog-to-digital conversion is accomplished by a sigma-delta converter.The complete system consumes only 26μA@1.8 V for continuous operation and achieves an accuracy of±0.65℃ from-20 to 120℃ after calibration at one temperature.     

一种用于射频识别的超低功耗温度传感器

An ultra-low-power CMOS temperature sensor with analog-to-digital readout circuitry for RFID applications was implemented in a 0.18-μm CMOS process. To achieve ultra-low power consumption, an error model is proposed and the corresponding novel temperature sensor front-end with a new double-measure method is presented. Analog-to-digital conversion is accomplished by a sigma-delta converter. The complete system consumes only 26 μA @ 1.8 V for continuous operation and achieves an accuracy of ±0.65 °C from –20 to 120 °C after calibration at one temperature.     

一种900MHz RFID读卡器中的高性能CMOS频率综合器

实现了一个应用于RFID系统的低功耗、低噪声的锁相环频率综合器.该频率综合器采用UMC 0.18μm CMOS工艺实现,输入时钟为13MHz,经测试验证输出频率为718～915MHz,相位噪声为-124dBc/1MHz,-101.13dBc/100kHz,频率分辨率为200kHz,功耗为54mW.     

13.56MHz RFID读写器天线的设计与仿真

为提高13.56 MHz RFID读写器天线的发射效率,并使其天线在实验室易于研发和试制,对13.56 MHz RFID天线系统的工作原理进行了简要介绍,在此基础上,把13.56 MHz RFID读写器天线线圈等效为PCB平面螺旋电感,利用HFSS软件建立模型并仿真得出电感值L、品质因子Q值等参数。其仿真结果得到的电感值与理论计算值相差0.03μH,在可接受的范围内。考虑到实际天线产生的寄生电容,提出了在天线末端加开路补偿线圈的方法,避免因寄生电容产生地电流而使天线线圈的磁场强度降低,仿真结果证实了该方法的可行性。     

支持多协议的13.56MHz RFID读卡器芯片解调电路设计与实现

针对支持多协议的13.56 MHz RFID读卡器芯片解调电路的设计,给出一些关键电路的设计考虑.从读卡器结构入手,先介绍了支持多种协议的读卡器芯片解调电路的设计难点,然后对解调电路设计中的关键部分,提出了设计方法.最后,对流片结果进行了验证.     

CMOS ring VCO for UHF RFID readers

A complementary metal oxide semiconductor (CMOS) voltage controlled ring oscillator for ultra high frequency (UHF) radio frequency identification (RFID) readers has been realized and characterized. Fabricated in charter 0.35 μm CMOS process, the total chip size is 0.47×0.67 mm2. While excluding the pads, the core area is only 0.15×0.2 mm2. At a supply voltage of 3.3 V, the measured power consumption is 66 mW including the output buffer for 50 Ω testing load. This proposed voltage-controlled ring oscillator exhibits a low phase noise of - 116 dBc/Hz at 10 MHz offset from the center frequency of 922.5 MHz and a lower tuning gain through the use of coarse/fine frequency control.     

A 900 MHz,21 dBm CMOS linear power amplifier with 35% PAE for RFID readers

A two-stage differential linear power amplifier(PA) fabricated by 0.18μm CMOS technology is presented. An output matching and harmonic termination network is exploited to enhance the output power,efficiency and harmonic performance.Measurements show that the designed PA reaches a saturated power of 21.1 dBm and the peak power added efficiency(PAE) is 35.4%,the power gain is 23.3 dB from a power supply of 1.8 V and the harmonics are well controlled.The total area with ESD protected PAD is 1.2×0.55 mm~2.Sy...     

一种饱和功率为21dBm，峰值效率为35%的应用于900MHz RFID阅读器的CMOS线性功率放大器

本文在CMOS 0.18μm Mixed Signal工艺上实现了工作于900MHz的两级差分线性功率放大器,该功放工作于class AB状态。本文探讨了低压下输出匹配和谐波抑制网络,以提高功放的输出功率及效率,降低输出谐波。测试结果表明,在1.8V的电源电压下,功放在900MHz频率的输出饱和功率达到21.1dBm,输出1dB压缩点的功率为18.4dBm,峰值功率增加效率为35.4%,功率增益为23.3dB,各谐波分量也得到很好的控制。两级功放加上PAD的芯片总面积为1.2×0.55mm2。通过单芯片测试以及基于原型机的测试结果表明,该功放可以满足UHF RFID阅读器的应用。     

高频RFID读写器射频模拟前端的实现

射频识别(RFID)系统主要由RFID读写器和RFID电子标签两部分组成.给出了高频(13.56MHz)RFID系统中读写器射频模拟前端的电路设计,符合ISO/IEC14443 type A/type B,ISO/IEC15693和ISO/IEC18000-3中任一个标准的读写器芯片设计均可采用,设计工艺采用了中芯国际0.35μm 2P3M混合CMOS技术,并给出了Cadence环境下的仿真结果.     

零中频UHF RFID接收机中的低噪声放大器设计

介绍了一个基于0.18μm标准CMOS工艺,可用于零中频UHF RFID(射频识别)接收机系统的900MHz低噪声放大器.根据射频识别系统的特点与要求对低噪放的结构、匹配、功耗和噪声等问题进行了权衡与分析,仿真结果表明:在1.2V供电时放大器可以提供20.8dB的前向增益,采用源端电感实现匹配并保证噪声性能,噪声系数约为1.1dB,放大器采用电流复用以降低功耗,每级电路从电源电压上抽取10mA左右的工作电流,并使反向隔离度达到-87dB.放大器的IP3为-8.4dBm,1dB压缩点为-18dBm.     

RFID sensors based on ubiquitous passive 13.56‐MHz RFID tags and complex impedance detection

Passive radio frequency identification (RFID) sensors are attractive in diverse applications where sensor performance is needed at a low cost and when battery‐free operation is critical. We developed a general approach for adapting ubiquitous and cost‐effective passive 13.56‐MHz RFID tags for diverse sensing applications. In developed RFID sensors, the complex impedance of the RFID resonant antenna is measured and correlated to physical, chemical, or biological properties of interest. In contrast to known wireless sensors, developed RFID sensors combine several measured parameters from the resonant sensor antenna with multivariate data analysis and deliver unique capability for multianalyte sensing and rejection of environmental interferences with a single sensor. Theoretical calculations and experiments in an anechoic chamber demonstrate that the developed RFID sensors are immune to common electromagnetic interferences and the sensor/reader system operates within regulated emission levels. Performance of developed RFID sensors is illustrated in measurements of toxic industrial chemicals (TICs) in air with the detection limit (DL) of 80 parts per billion and in a non‐invasive monitoring of milk spoilage. Sensors selectivity is demonstrated in the detection of different vapors with individual sensors. Copyright © 2008 John Wiley & Sons, Ltd.     

UHF RFID阅读器中的堆叠式CMOS LNA设计

提出了一种基于0.25μm标准CMOS工艺,可用于UHF RFID（超高频射频识别）阅读器前端的低噪声放大器。根据低噪声放大器的匹配、噪声和增益分析,结合射频识别系统的理论计算,提出堆叠器件的电路结构达到电流复用,以降低功耗并保证增益。测试结果表明,在2.5 V供电时,放大器可以提供约26.3 dB的前向增益,噪声系数约为1.9 dB,放大电路从电源电压上抽取5.8 mA左右的工作电流,反向隔离度达到-40 dB,放大器的IIP3约为-15 dBm。     

适于视频应用的高数据传输率集成CMOS收发机

这篇文章给出了一个5GHz CMOS射频收发机的设计方案。此设计采用0.18微米射频CMOS加工工艺,集合了最新IEEE802.11n的特性例如多输入多输出技术的专利协议以及其他无线技术,可提供应用在家庭环境中的实时高清电视数据的无线高速传输。设计频率涵盖了从4.9GHz到5.9GHz的ISM频带,每个射频信道的频宽为20MHz。收发机采用了直接上变频发射器和低中频接收器的结构。在没有片上校准的情况下,设计采用双正交直接上变频混频器,得到了超过35dB的镜像抑制。测试结果得到6dB接收机噪声系数以及在-3dBm输出功率时得到发射机EVM结果优于33dB。     

一种可应用于无源RFID的新型CMOS温度传感器设计

针对无源RFID低功耗的应用需求,基于SMIC 0.18μm CMOS工艺设计了一种低功耗CMOS温度传感器。该传感器首先基于双晶体管电路将温度信号转换为与之成正比的电压信号,并进一步转换为电流信号,然后通过振荡器电路转换为频率信号,最终经计数器后转换为与温度对应的二进制数字信号输出。仿真结果表明,在-20～100℃范围内传感器具有良好的线性度和温度精度,且传感器总功耗仅为1.05μW,可满足无源RFID领域应用需求。     

A high-linear wide-tunable CMOS transconductor for video frequency applications

In this paper a new CMOS transconductor structure based on a g_m-boosted degenerated differential pair is presented for applications in the video frequency range. The proposed circuit combines two techniques, a switchable array of source degenerating MOS resistors and a programmable output current mirror, in order to widen the G_m tuning range while maintaining linearity. Degeneration MOS resistors are made common-mode voltage independent thanks to a simple control circuit. Post-layout simulation results from a 0.35 μm design supplied at 3.3 V show a wide tuning range (10–100 MHz), good linearity (−58.4 dB for an output signal voltage of 1.1 V_p–p) and low excess phase (<0.5° over the whole tuning range).     

一种应用于RFID标签的新型功率放大器设计

A novel matching method between the power amplifier (PA) and antenna of an active or semi-active RFID tag is presented. A PCB dipole antenna is used as the resonance inductor of a differential power amplifier. The total PA chip area is reduced greatly to only 240 × 70 μm² in a 0.18 μm CMOS process due to saving two on-chip integrated inductors. Operating in class AB with a 1.8 V supply voltage and 2.45 GHz input signal, the PA shows a measured output power of 8 dBm at the 1 dB compression point.     

A novel power amplifier structure for RFID tag applications

A novel matching method between the power amplifier(PA) and antenna of an active or semi-active RFID tag is presented.A PCB dipole antenna is used as the resonance inductor of a differential power amplifier. The total PA chip area is reduced greatly to only 240×70μm~2 in a 0.18μm CMOS process due to saving two on-chip integrated inductors.Operating in class AB with a 1.8 V supply voltage and 2.45 GHz input signal,the PA shows a measured output power of 8 dBm at the 1 dB compression point.     

一款便携式移动应用的低成本超高频无源射频识别读写器收发机芯片设计

A low cost integrated transceiver for mobile UHF passive RFID reader applications is implemented in a 0.18μm CMOS process. The transceiver contains an OOK modulator and a power amplifier in the transmitter chain, an IQ direct-down converter, variable-gain amplifiers, channel-select filters and a 10-bit ADC in the receiver chain. The measured output PldB power of the transmitter is 17.6 dBm and the measured receiver sensitivity is -70 dBm. The on-chip integer N synthesizer achieves a frequency resolution of 200 kHz with a phase noise of -104 dBc/Hz at 100 kHz frequency offset and -120.83 dBc/Hz at 1 MHz frequency offset. The transmitter, the receiver and the frequency synthesizer consume 201.34, 25.3 and 54 mW, respectively. The chip has a die area of 4 × 2.5 mm^2 including pads.     

A low cost integrated transceiver for mobile UHF passive RFID reader applications

2.5 mm2 including pads.