MOS-Based Spin Devices for Reconfigurable Logic

Semiconductor-based spin transistors are expected to give a new spin degree of freedom in future electronics. While many different spin transistors have been proposed and studied, the spin MOSFET is one of the most promising devices, because it can have spin-dependent output characteristics, transistor functions, and good compatibility with existing silicon technology. The device concept, structures of various types of spin MOSFETs, operation principles, calculated output characteristics, and applications was reviewed. It is shown that the output characteristics of the spin MOSFETs depend on the relative magnetization configuration of the two ferromagnetic layers in the device, that is, high current-drive capability in parallel magnetization and low current-drive capability in antiparallel magnetization. Furthermore, nonvolatile memory and reconfigurable logic gates was presented using spin MOSFETs, where the logic functions can be changed by switching their magnetization configurations. Circuit design and numerical simulations of reconfigurable gates for NAND/NOR, AND/OR, and all symmetric Boolean functions was shown     

Spin Waves Interference under Excitation by Focusing Transducers: Logic and Signal Processing

Semiconductors - Micro-focused Brillouin–Mandelstam light scattering technique and micromagnetic simulations were used to study surface (SSW) and backward volume (BVSW) spin waves (SW)...     

Ballistic Spin Hall Transistor Using a Heterostructure Channel and Its Application to Logic Devices

In a ballistic spin transport channel, spin Hall and Rashba effects are utilized to provide a gate-controlled spin Hall transistor. A ferromagnetic electrode and a spin Hall probe are employed for spin injection and detection, respectively, in a two-dimensional Rashba system. We utilize the spin current of which polarization direction is controlled by the gate electric field which determines the strength of the Rashba effective field. By observing the spin Hall voltage, spin injection and coherent spin precession are electrically monitored. From the original Datta–Das technique, we measure the channel conductance oscillation as the gate voltage is varied. When the magnetization orientation of the injector is reversed by 180°, the phase of the Datta–Das oscillation shifts by 180° as expected. Depending on the magnetization direction, the spin Hall transistor behaves as an n- or p-type transistor. Thus, we can implement the complementary transistors which are analogous to the conventional complementary metal oxide semiconductor transistors. Using the experimental data extracted from the spin Hall transistor, the logic operation is also presented.     

Fresh guidance on EMC

Many are still confused by the EMC directive; however, the European Commission's new guidelines should help in this field. Here, the author describes the latest official attempt to explain Directive 89/336, the most contentious of the new approach directives     

自旋晶体管的最新研究进展

自旋晶体管是指利用电子自旋自由度构建的在结构上类似于传统半导体晶体管的三端自旋器件。对基于自旋劈裂的磁双极型自旋晶体管、基于热电子输运的自旋晶体管和基于Rashba效应的自旋晶体管的最新研究动态进行了评述,并对其发展前景做了展望。     

Spin Doctoring

Researchers at the University of California, Los Angeles, introduce a concept for replacing copper connections on chips. The concept relies on atomic spin, a quantum-mechanical property related to magnetism, and on waves generated when that spin is disturbed. Atomic spin arises from the magnetic fields generated by an atom's spinning electrons. Both atomic and electron spin can be thought of metaphorically as rotation, but they are in fact abstract properties and are represented as vectors that can point either up or down - that is, either parallel or perpendicular to magnetic field lines. Eshaghian-Wilner and her colleagues have presented possible designs for VLSI architectures that would use spin waves to transmit data between processors. The simplest one consists of a number of pairs of conductor bars in a circle on a ferromagnetic film. Each pair of strips can either transmit or receive data, and several data streams; can be transmitted simultaneously by creating spin waves of different frequencies     

Realization of Complete Boolean Logic and Combinational Logic Functionalities on a Memristor-Based Universal Logic Circuit

Memristors are a promising solution for building an advanced computing system due to their excellent characteristics,including small energy consumption,high integration density,fast write/read speed,great endurance and so on.In this work,we firstly design three basis logic XNOR1,XNOR2 and XOR gates by virtue of memristor ratioed logic(MRL),and further construct 1-bit numerical comparators,2-bit numerical comparators and full adder 1 based on the above XNOR1,XNOR2 and XOR gates.Furthermore,we propose and design a universal logic circuit that can realize four different kinds of logic functions(AND,OR,XOR,XNOR)at the same time.Subsequently,a full adder 2 is built using XOR function of this universal logic circuit.Compared with the traditional CMOS circuits,the universal logic circuit designed in this work exhibits several merits such as fewer components,less power,and lower delay.This work demonstrates that memristors can be used as a potential solution for building a novel com-puting architecture.     

Fresh phish

The author talks on how a recently discovered flaw in the Internet's Domain Name System makes it easy for scammers to lure you to fake Web sites. It turns out to be easy for a malicious computer hacker to trick your browser into steering you anywhere he wants and then to pilfer sensitive information, like your user name, password, and credit card number.     

基于多值逻辑的模糊逻辑函数分析与综合

本文首先提出了模糊逻辑和多值逻辑的相似性，并从开关信号理论出发建立了多值逻辑阈运算和模糊函数取值区间有限等级的对应关系，进而提出了利用多值逻辑阈运算实现模糊逻辑函数分析与综合的算法，并用该算法对几个模糊逻辑函数实例进行了分析与综合，实例操作表明，该算法具有操作简单，规范，方便快捷的特点，是分析和综合模糊逻辑函数的有效方法。     

MRAM:内存的新潮流(上)

Freescale运用自旋电子技术制作了新的非易失性RAM,本文对此进行了详细介绍.     

Spin transistor based on cadmium fluoride nanostructures

A study of CdB _x F_{2 ? x} /p-CdF₂/CdB _x F_{2 ? x} planar sandwich structures fabricated on n-CdF₂ crystal surface was carried out in order to obtain the spin-transistor effect at room temperature. Features related to the band gap of CdF₂ (7.8 eV) along with those related to the spectrum for two-dimensional (2D) hole subbands in p-CdF₂ quantum well (QW) were observed in the current-voltage characteristics for ultrashallow p ⁺-n junctions. The results obtained demonstrate the important role for 2D hole subbands in the mechanism of the “proximity effect” that appears due to Andreev’s reflection in sandwich structures consisting of a narrow QW confined between superconducting barriers. Resonance behavior for the longitudinal voltage in a weak magnetic field normal to the plane of the p-CdF₂ QW gives evidence for high degree of spin polarization for 2D holes. Analysis of the dependences for the 2D-hole-gas conductance on the magnitude and direction of the magnetic field normal to the plane of the p-CdF₂ QW reveals anti-crossings for Zeeman sublevels in the singlet ground state and triplet excited state of boron dipole centers, responsible for the spin polarization of 2D holes in edge channels in the p-CdF₂ QW. The high degree of spin polarization for 2D holes in edge channels in the p-CdF₂ QW identifies the mechanism underlying spin-transistor I-V characteristics observed upon the variation of the gate voltage, which controls the magnitude of Bychkov-Rashba’s spin-orbit coupling.     

MRAM:内存的新潮流(下)

Freescale所提供的MRAM替代性方案 在Freescale的器件中，自由的和固定的磁体层并不是单纯的铁磁板。相反，它们是合成的反铁磁体（synthetic antiferromagnet，SAF）三明治结构，由两个反向对准的铁磁材料层以及两层材料之间所夹的一层非磁性材料耦合隔层而组成。图2示出了一个SAF位单元。SAF三明治结构产生磁致电阻效应的能力并不会因为它的混合式结构而受到影响。对准和反对准只取决于MTJ结构两侧相对的两层材料。将两层板材组成SAF，就可以让每层板变成“磁矩平衡”-净外磁场为零。     

磁自旋耦合作用对OLEDs性能的影响

介绍了近年来有关磁自旋耦合作用对有机电致发光器件性能影响的研究进展,包括有机磁阻效应、电致发光效应、光电导效应、量子效率效应等.其中,磁场作用下的有机磁阻可达到10%,理论上最大值为-50%;自旋极化注入的引入使得OLEDs的内量子效率达到32%,并且磁场作用下的电致发光强度也增强了8%左右;磁场作用下,器件的光电导和外量子效率分别增大了6%.以上效应随磁场增加逐渐趋于饱和.对于这些效应产生的理论机制,一般认为是由于三线态-三线态的猝灭、塞曼效应及超精细作用等产生的.三线态-三线态的猝灭形成了激发单线态激子S*,形成滞后的电致发光;而塞曼效应及超精细作用则认为是磁场抑制了单线态向三线态的转化致使发光增强.现在这方面的理论仍在完善过程中.     

Logic Operation of HTS SFQ Logic Family

A high-$T_{c}$ superconducting (HTS) single-flux-quantum (SFQ) logic family including an and gate, an or gate, and an inverter was designed. The circuit parameters were optimized for a Josephson junction's critical current density, which may change due to a temperature change or insufficient run-to-run reproducibility of the fabrication process. New circuit design layout rules were implemented to improve $I_{c}$ uniformity. As a result, all circuits were successfully tested and show at least $pm$40% critical current density operational margins. An effect of the parasitic capacitance formed by a junction electrode and a ground plane on the operating margins of the and gate was investigated by numerical simulation. Test circuits were fabricated using $hbox{YBa}_{2} hbox{Cu}_{3}hbox{O}_{7 - delta}$ ramp-edge junction technology and were operated at temperatures higher than 30 K. Bias current margins were also measured, and they found to be close to the simulated ones.      

基于非调制自旋链的量子通信

研究在热平衡状态下,外加均匀静态磁场度和自旋粒子间的耦合度对系统的保真度和纠缠度的影响,提出如何利用它们之间的关系来提高自旋系统中量子态的传输质量。研究结果表明采用非调制自旋链作为长程相互作用自旋系统中量子态的传输信道,量子态的保真度随着自旋粒子间耦合系数的增加而增加,外加静态磁场强度在0~1的范围内时,量子态传输的失真较小。因此在热平衡状态下,选取适当的耦合度和外加均匀磁场强度,无需对自旋系统进行任何操作即可实现量子态的高质量传输。     

纳米尺寸自旋阀中电流驱动的自旋波发射

提出了在纳米赝自旋阀中的电流感应自旋传输矩的磁动力学描述,成功地解释了在磁纳米多层结构中的电流驱动微波发射和电流感应磁化翻转现象。自旋流极化由在电导匹配时的自旋流和化学势连续性边界条件决定。自旋矩的纵向和横向分量在自旋阀的电流驱动微波发射和电流感应磁化翻转现象中扮演了不同的角色:纵向自旋矩分量决定了电流感应磁化翻转(CIMS)效应,而横向自旋矩是自旋波发射(SWE)效应所不可缺少的。根据这一理论,由LLG方程自然得到自旋波发射的双模,分别为横向自旋矩引发的X和Y方向的振动,并引起磁多层电阻以频率2w或w(进动频率)随时间变化。磁场和自旋流共同决定了自旋波发射的频率和功率,这一理论预言了某种特殊的磁多层结构,如磁层相互垂直的结构,将具有大得多的微波发射效率,这一结论已经被实验所证实。     

自旋电子学研究的最新进展

自旋极化电子的高效注入、自旋霍尔效应和自旋流的产生与探测都是目前自旋电子学中热门研究专题,世界一些著名学术刊物屡见报道。对这些重要内容的理论和实验的最新研究成果进行了介绍。通过自旋极化电子高效注入方法和材料的研究,人们期望研制出新一代自旋电子器件,进而实现应用电子自旋传输、记录和存储信息的目标。近期实验给出,自旋极化电子从铁磁金属注入半导体和金属都获得较高的极化率。各种注入方法中,自旋流直接注入法目前备受关注,因为自旋霍尔效应为自旋流的产生与探测提供了新的途径,即自旋霍尔效应可以产生自旋流,但因无霍尔电压故不容易测量;而逆自旋霍尔效应又将自旋流转化为电流,使得难以测量的自旋流又可以直接用电学方法测量。     

Spin coating over topography

A model for predicting film thickness profiles around topographical features during spin coating is presented. This model is applicable to features of arbitrary geometry in the two lateral dimensions. This generally permits study of the planarization of real device structures, including both isolated and neighboring features, with any orientation with respect to the wafer center. Predictions from this model agree qualitatively with measured thin-film profiles from interferograms taken during spinning. Phenomena such as pile-up and wakes result from interactions between surface tension and other driving forces in the flow     

SDH逻辑设备分割

引入逻辑设备的概念,简述了SDH逻辑设备分割原则,论述了SDH逻辑设备分割对SDH物理设备的要求,以及使用SDH逻辑设备带来的好处,最后举例说明SDH逻辑设备分割。     

基于MCU芯片的逻辑综合研究

本文主要阐述了在深亚微米下面的逻辑综合的过程。对综合过程的主要的逻辑约束进行详细分析,并根据MCU芯片的结构特点,进行时钟的定义。同时,本文详细分析了时钟定义、电源、复位等问题的处理方法,最后达到时序收敛。再对满足时序的综合结果进行可测性设计,测试覆盖率达到99.5%。