State of the art in the analog CMOS circuit design

This paper is not intended to cover CMOS analog circuit design exhaustively. Yet, it describes how much CMOS technology has been involved in analog circuit design despite the general opinion that CMOS is only suited for digital design. After some developments in the CMOS technology have been discussed, the analog building block scene is covered. The analog building blocks can roughly be divided into two subgroups: the switched-capacitor and the non-switched-capacitor building blocks. Following this subdivision different approaches are briefly looked at. Several tables conclude this review and indicate that new analog developments in CMOS circuit design are still to be expected. Next, the CAD tool development for analog CMOS is discussed, showing that there is still a lot to be done in the field of automated analog design. In conclusion, some ideas concerning analog CAD or, concerning CAD in a more general sense are described.     

Tools for the computer-aided design of multigigahertzsuperconducting digital circuits

The realization of large integrated circuits depends upon the application of computer-aided design (CAD) tools. This paper summarizes the results of a survey of CAD tools targeting superconducting digital electronics. Five categories of tools: circuit simulators, circuit optimizers, layout tools, inductance estimators, and logic simulators are discussed in detail. Within each category, a comparison of several currently available CAD tools is presented, and a tool which has been adapted for use or developed at the University of Rochester is discussed in greater detail. In addition, tools for timing analysis as well as integrated design environments that permit the effective data interchange among various tools and support libraries of design models are discussed. Future tools for timing optimization, automated logic synthesis, and automated layout synthesis are shown to be necessary for the design of superconducting circuits at the very large scale of integration (VLSI) level of integration. Trends regarding changes in the requirements for effective CAD tools are discussed, and expected improvements to existing tools and features of new tools currently under development are presented     

ALGA: Automated layout generator for analog CMOS circuits

A computer-aided design (CAD) system called ALGA for an analog circuit layout is presented. The main contribution of this paper is to construct a weight graph that represents the topological connectivity of a given analog circuit. By using the weight graph, some efficient techniques can be designed to avoid devices mismatch and place all devices according to the device size constraints. Moreover, an algorithm is presented to perform the device placement step and propose an effective approach to reduce noise coupling in the routing step. A design method has been implemented in several Complementary Metal Oxide Semiconductor (CMOS) analog circuits. It is seen that the proposed system can generate good analog circuit design.     

Gate Array Versus Standard Cell Realization of an Analog/Digital μC Interface Circuit

An interface circuit containing analog and digital functions was realized in gate array and standard cell design techniques. Realization on gate arrays became possible by using circuit tricks which can also be applied to the standard cell version. Based on this example various aspects of the two design styles are compared. For such designs it is most important to have CAD tools which give sufficient support to the designer, and which do not restrict him into a fixed set of macro cells.     

Computer-aided design of analog and mixed-signal integratedcircuits

This survey presents an overview of recent advances in the state of the art for computer-aided design (CAD) tools for analog and mixed-signal integrated circuits (ICs). Analog blocks typically constitute only a small fraction of the components on mixed-signal ICs and emerging systems-on-a-chip (SoC) designs. But due to the increasing levels of integration available in silicon technology and the growing requirement for digital systems to communicate with the continuous-valued external world, there is a growing need for CAD tools that increase the design productivity and improve the quality of analog integrated circuits. This paper describes the motivation and evolution of these tools and outlines progress on the various design problems involved: simulation and modeling, symbolic analysis, synthesis and optimization, layout generation, yield analysis and design centering, and test. This paper summarizes the problems for which viable solutions are emerging and those which are still unsolved     

Wave-pipelining: a tutorial and research survey

Wave-pipelining is a method of high-performance circuit design which implements pipelining in logic without the use of intermediate latches or registers. The combination of high-performance integrated circuit (IC) technologies, pipelined architectures, and sophisticated computer-aided design (CAD) tools has converted wave-pipelining from a theoretical oddity into a realistic, although challenging, VLSI design method. This paper presents a tutorial of the principles of wave-pipelining and a survey of wave-pipelined VLSI chips and CAD tools for the synthesis and analysis of wave-pipelined circuits     

Multisectional modeling of high-speed electrooptic modulators integrated in a microwave circuit CAD environment

We present a new multisectional model for high-speed electrooptic modulators, fully integrated within the framework of a microwave circuit computer-aided design (CAD) suite (MWOFFICE). Starting from geometrical and layout parameters, the model allows both simple (traveling-wave) and complex (phase reversal, periodically loaded) structures to be assembled, analyzed, and optimized from the standpoint of the electrical and electrooptic response (including chirp effects) both in small-signal (analog) and in large-signal (digital) operation, exploiting standard simulator tools. At no additional effort, parasitic and passive elements (such as optical or electrical delay paths) can be directly included in the modulator schematic, and the effect of transitions and package parasitics can be readily accounted for at a circuit level. Moreover, model integration within a circuit CAD suite enables one to seamlessly perform driver and modulator design and optimization within the same monolithic or hybrid circuit environment. Comparisons with experimental and literature data and design examples are presented to validate the approach and stress its potential in the design of high-speed electrooptic modulators.     

A survey on binary decision diagram approaches to symbolic analysis of analog integrated circuits

Applying symbolic techniques for analog circuit analysis is a traditional research subject, which has lasted for over half a century. The past decade has witnessed a significant advancement of the symbolic techniques developed specifically for large analog integrated circuits. The key methodology introduced is a data structure called binary decision diagram (BDD) which was established originally for logic design and verification. The application of the BDD technique for analog circuit analysis has the following features: (1) It is a compact data structure so that data redundancy in symbolic analysis can be eliminated. (2) It provides a mechanism for implicit enumeration method so that exhaustive enumeration commonly performed in symbolic analysis can be avoided. (3) Numerical evaluation on a BDD can be made extremely efficient, making it an excellent means for repetitive analysis. More advanced features are yet to be explored. This survey brings together the significant research results published in the past decade and provides a tutorial overview on the basic principles of applying BDD to analog circuit analysis. Some new directions that are potentially valuable for developing future analog design automation tools are discussed and a design example is given to illustrate the application of symbolic techniques.     

Coupling effects on wire delay. Challenges in deep submicron VLSIdesign

Coupling is a complex phenomenon, especially where the high-gain coupling effect is concerned. To introduce coupling effects on wire delay, including the high-gain coupling effect, this article presents a generalization of a study that evolved from a real VLSI design. Possible solutions to coupling effects such as CAD tools, circuit design methodology, and circuit design techniques are also discussed. The conclusions and results presented in this article are based on current complementary metal oxide semiconductor (CMOS) technologies     

ARIADNE: A constraint-based approach to computer-aided synthesis and modeling of Analog integrated circuits

The ARIADNE approach to computer-aided synthesis and modeling of analog circuits is presented. It is a mathematical approach based on the use of equations. Equations are regarded as constraints on a circuit's design space and analog circuit design is modeled as a constraint satisfaction problem. To generate and efficiently satisfy constraints, advanced computational techniques such as constraint propagation, interval propagation, symbolic simulation, and qualitative simulation are applied. These techniques cover design problems such as topology construction, modeling, nominal analysis, tolerance analysis, sizing and optimization of analog circuits. The advantage of this approach is the clear separation of design knowledge from design procedures. Design knowledge is modeled in declarative equation-based models (DEBMs). Design procedures are implemented into general applicable CAD tools. The ARIADNE approach closely matches the reasoning style applied by experienced designers. The integration of synthesis and modeling into one frame and the clear separation of design knowledge from design procedures eases the process of extending the synthesis system with new circuit topologies, turning it into an open design system. This system can be used by both inexperienced and experienced designers in either interactive or automated mode.     

Expediting analog design retargeting by design knowledge re-use and circuit synthesis: a practical example on a Delta-Sigma modulator

In the past decade or two, due to constant and rapid technology changes, analog design re-use or design retargeting to newer technologies has been brought to the table in order to expedite the design process and improve time-to-market. If properly conducted, analog design retargeting could significantly cut down design cycle compared to designs starting from the scratch. In this article, we present an empirical and general method for efficient analog design retargeting by design knowledge re-use and circuit synthesis (CS). The method first identifies circuit blocks that compose the source system and extracts the performance parameter specifications of each circuit block. Then, for each circuit block, it scales the values of design variables (DV) from the source design to derive an initial design in the target technology. Depending on the performance of this initial target design, a design space is defined for synthesis. Subsequently, each circuit block is automatically synthesised using state-of-art analog synthesis tools based on a combination of global and local optimisation techniques to achieve comparable performance specifications to those extracted from the source system. Finally, the overall system is composed of those synthesised circuit blocks in the target technology. We illustrate the method using a practical example of a complex Delta-Sigma modulator (DSM) circuit.     

模拟乘法器的建模及其应用

采用CAD技术和典型双极工艺完成模拟乘法器集成电路研制后建立了器件子电路模型,并添加到Pspice模型库中.在设计电路时,用户可以很方便地从模型库中调用子电路模型,提高了设计效率.以立方电路设计为例,介绍了模拟乘法器子电路的建模过程和调用方法.     

Analysis and design of amplifiers and comparators in CMOS 0.35 μm technology

Design techniques and CAD tools for digital systems are advancing rapidly at decreasing cost, while CMOS analog circuit design is related mostly with the individual experience and background of the designer. Therefore, the design of an analog circuit depends on several factors such as a reliable design methodology, good modeling and technology characterization. Most of this work focuses on the analysis of several analog circuits, including their functionality, using different design methodologies. Initially the determination of two key design parameters (slope factor n and early voltage VA) and the g_m/I_D characteristics were derived from simulations. Then, the analysis and design of three diferent analog circuits are presented. A comparison is made between two design methodology applied to an analog amplifier design. The first one is a conventional approach where transistors are in saturation. The second one is based on the g_m/I_D characteristic, that allows a unified synthesis methodology in all regions of operation of the transistor. The analog modules for comparison and continuous filtering, that find vast applications today, are then analyzed and designed with the parameters and methodology proposed.     

Analysis and design of amplifiers and comparators in CMOS 0.35 μm technology

Design techniques and CAD tools for digital systems are advancing rapidly at decreasing cost, while CMOS analog circuit design is related mostly with the individual experience and background of the designer. Therefore, the design of an analog circuit depends on several factors such as a reliable design methodology, good modeling and technology characterization. Most of this work focuses on the analysis of several analog circuits, including their functionality, using different design methodologies. Initially the determination of two key design parameters (slope factor n and early voltage VA) and the g_m/I_D characteristics were derived from simulations. Then, the analysis and design of three diferent analog circuits are presented. A comparison is made between two design methodology applied to an analog amplifier design. The first one is a conventional approach where transistors are in saturation. The second one is based on the g_m/I_D characteristic, that allows a unified synthesis methodology in all regions of operation of the transistor. The analog modules for comparison and continuous filtering, that find vast applications today, are then analyzed and designed with the parameters and methodology proposed.     

石墨烯场效应管的Verilog-A建模

在传统硅基器件日益趋近物理极限的背景下,石墨烯场效应管作为一种新型纳米器件受到了广泛关注。以漂移-扩散传输理论为基础,得到了石墨烯场效应管的漏电流解析表达式,并以此建立了适合电路设计的石墨烯场效应管Verilog-A模型。利用该模型对栅长为10μm、沟道宽度为5μm的石墨烯场效应管进行HSPICE仿真,仿真结果与实验所测数据相符。在此基础上,给出了基于石墨烯场效应管的共源放大电路、共漏放大电路和共栅放大电路三种基本电路组态的仿真结果,表明石墨烯场效应管应用于模拟及RF电路具有广阔的前景。     

CAD techniques for microwave circuits

In little more than 10 years computer-aided design (CAD) of microwave circuits has moved from dumb terminals on mainframe computers to PCs, and now to powerful RISC workstations. Commercial CAD software now integrates the various stages of microwave circuit design: schematic capture, simulation and layout. This paper reviews the different CAD packages that are available for microwave circuit design. The basic principles employed in the modelling of microstrip circuits are introduced and the reasons for the extensive use of frequency-domain simulations are explored. The developments in nonlinear, electromagnetic and system-level simulation methods are described     

一种大间距短波线列红外探测器用读出电路的设计

介绍了一款大间距双波段短波线列红外探测器用读出电路的设计详情,电路采用CTIA输入方式,模拟通道采用11级TDI进行信号的时间延迟累加平均。文章主要介绍了电路输入级、列级信号处理电路的设计及仿真分析,给出了全电路的整体仿真结果,并在文章最后介绍了电路实际测试结果。     

State of the art and present trends in nonlinear microwave CADtechniques

The authors present a survey of modern nonlinear CAD (computer-aided design) techniques as applied to the specific field of microwave circuits. A number of fundamental aspects of the nonlinear CAD problem, including simulation, optimization, intermodulation, frequency conversion, stability, and noise, are addressed and developed. For each one it is shown that either well-established CAD solutions are available, or at least a solution approach suitable for implementation in a general-purpose CAD environment can be outlined. Also, the discussion shows that the various subjects are not just separate items, but rather can be chained in a strictly logical sequence. Finally, an elementary treatment of vector processing is given, to show that supercomputers can handle the involved large-size numerical problems efficiently