Mechanism of carrier lifetime increase in ion beam synthesised SOI structures

Carrier lifetimes were measured in epitaxial silicon layers which were deposited on silicon wafers implanted with different nitrogen doses at 330 keV. At doses greater than 1016 cm-2 the lifetime was more than one order of magnitude higher on the implanted part of the wafers (~300?s). The mechanism responsible for this effect is connected with the gettering efficiency for heavy metals of a precipitation-rich dislocation network in the implanted silicon.     

Effect of the tin content on the composition and optical and electrical properties of ITO films deposited onto silicon and glass by ultrasonic spray pyrolysis

With the aim of optimizing the properties of tin-doped indium oxide (ITO) films as applied to silicon solar cells, ??100-nm-thick ITO films were deposited onto (nn ⁺)-Cz-Si and glass substrates by ultrasonic spray pyrolysis in argon at a temperature of 380°C. The relative Sn and In content in the film-forming solution was varied in the range of [Sn]/[In] = 0?C12 at %. Optimal parameters are exhibited by the films produced at [Sn]/[In] = 2?C3 at % in the solution ([Sn]/([In] + [Sn]) = 5.2?C5.3 at % in the film). For such films deposited onto glass substrates, the effective absorptance weighted over the solar spectrum in the wavelength range from 300 to 1100 nm is 1.6?C2.1%. The sheet resistance R _s of the films deposited onto silicon and glass is, correspondingly, 45?C55 and 165?C175 ???^?1. After eight months of storage in air, the resistance R _s of the optimal films remained unchanged; for the other films, the resistance R _s increased: for the films on silicon and glass, the resistance R _s became up to 2 and 14 times higher, respectively.     

Carrier lifetimes in silicon epitaxial layers deposited on oxygen-implanted substrates

Carrier lifetimes in silicon epitaxial layers deposited on high-dose oxygen-implanted wafers have been obtained from measurements of diode storage times. A figure of 1.25 ?S was obtained for diodes in the implanted area, compared with 1.75 ?S for diodes outside the implanted area on the same wafer. This marginal degradation of lifetime indicates that the dielectrically isolated structure should be able to support bipolar and dynamic logic devices.     

Fabrication of a m.o.s.f.e.t. with `spoxide? as the gate dielectric having low interface state density

Spin-on oxide (Spoxide), which forms part of the class of deposited oxides, has been found to produce a good electrical interface with silicon after HCl annealing, and surface-state densities of the order of 4 × 1010 eV?1 cm?2 are easily achievable. An n-channel depletion-type m.o.s.f.e.t. has been fabricated with Spoxide as the gate dielectric.     

Low-temperature process for high-mobility polysilicon TFTs

Thin-film transistors (TFTs) have been realised by a low-temperature (T? 580°C), short process, on polycrystalline silicon thin films deposited by PECVD on glass. Field-effect mobility up to 35cm2V-1s-1 has been measured on such devices.     

Improvement of the Crystallinity of Silicon Films Deposited by Hot-Wire Chemical Vapor Deposition with Negative Substrate Bias

We have investigated the effect of negative substrate bias on microcrystalline silicon films deposited on glass and stainless steel by hot-wire chemical vapor deposition (HWCVD) to gain insight into the effect of negative substrate bias on crystallization. Structural characterization of the silicon films was performed by Raman spectroscopy, x-ray diffraction, and scanning electron microscopy. It was found that the crystallinity of the films is obviously improved by applying the substrate bias, especially for films on stainless steel. At hot-wire temperature of 1800°C and negative substrate bias of ?800 V, grain size as large as 200 nm was obtained on stainless-steel substrate with crystalline fraction 9% higher than that of films deposited on glass and 15% higher than that of films deposited without substrate bias. It is deduced that the improvement of the crystallinity is mainly related to the accelerated electrons emitted from the hot wires. The differences in this improvement between different substrates are caused by the different electrical potential of the substrates. A solar cell fabricated by HWCVD with ?800 V substrate bias is demonstrated, showing an obviously higher conversion efficiency than that without substrate bias.     

Effects of deposition temperature on the oxidation resistance andelectrical characteristics of silicon nitride

A study was made of the effects of deposition temperature on the oxidation resistance and electrical characteristics of silicon nitride. It was found that silicon nitride below a certain limit thickness has no oxidation resistance. This threshold falls as the deposition temperature is lowered. 3-nm-thick silicon nitride deposited at 600°C has sufficient oxidation resistance For wet oxidation at 850°C, while 5 nm film deposited at 750°C has no oxidation resistance. The electrical characteristics also improve as the deposition temperature is lowered. 6-nm-thick silicon nitride deposited at 600°C shows a TDDB lifetime that is about two orders longer than that of 6-nm-thick silicon nitride deposited at 700°C. It was also found that the silicon nitride transition layer which is deposited at the initial stage of deposition influences the oxidation resistance and electrical characteristics of thin silicon nitride. It was concluded that lowering the deposition temperature reduces the influence of the transition layer and improves the oxidation resistance and electrical characteristics of thin silicon nitride     

Enhancement of R6G fluorescence by N-type porous silicon deposited with gold nanoparticles

By the electrochemical anodization method, we achieve the single-layer macroporous silicon on the N-type silicon, and prepare gold nanoparticles with sodium citrate reduction method. Through injecting the gold nanoparticles into the porous silicon by immersion, the fluorescence quenching mechanism of porous silicon influenced by gold nanoparticles is analyzed. Then the macroporous silicon deposited with gold nanoparticles is utilized to enhance the fluorescence of rhodamine 6G (R6G). It is found that when the macroporous silicon is deposited with gold nanoparticles for 6 h, the maximum fluorescence enhancement of R6G (about ten times) can be realized. The N-type porous silicon deposited with gold nanoparticles can be an excellent substrate for fluorescence detection.     

Silicon-on-insulator m.o.s.f.e.t.s fabricated on laser-annealed polysilicon on SiO2

N-channel-enhancement and light-depletion-mode m.o.s.f.e.t.s have been fabricated on laser-annealed 0.5 ?m polysilicon films, deposited on 1 ?m of SiO2 grown on single-crystal silicon substrates. Threshold voltages of 0.35?0.45 V and ?0.5 ? ?0.7 V and surface mobilities of 170 cm2/Vs and 215 cm2/Vs were obtained on the enhancement and depletion devices, respectively. These results compare favourably with values realised in silicon-on-sapphire (s.o.s.) and bulk N-m.o.s. devices. In addition, the measured source-drain leakage currents match the best reported values for s.o.s. devices.     

Study on the Thermoelectric Properties of CVD SiC Deposited with Inert Gases

We deposited silicon carbide (SiC) by the chemical vapor deposition (CVD) method using the inert gases Ar and He. It was confirmed that SiC deposited with inert gases had a porous microstructure and high carbon content. We also studied the thermoelectric properties. SiC deposited with He gas had lower electrical and thermal conductivity compared with SiC deposited with Ar gas. Both samples using Ar and He exhibited a negative Seebeck coefficient, indicating n-type semiconductor behavior. The calculated figure of merit (Z) of SiC deposited with inert gases was improved compared with SiC deposited with H₂ or N₂ gas. The value for SiC deposited with He was higher than that for SiC deposited with Ar. The thermoelectric properties of porous silicon carbide deposited with inert gases were also compared with those of silicon carbide deposited with hydrogen or nitrogen gas.     

Amorphous silicon buried-channel thin-film transistors

We demonstrate a buried-channel thin-film field effect transistor (TFT) based on deposited silicon nitride and hydrogenated amorphous silicon with the conducting channel recessed approximately 50 Å from the interface. We fabricate transistors and capacitors by DC reactive magnetron sputtering of a silicon target in a plasma of (Ar+H ₂+N₂) or (Ar+H₂) for the nitride and silicon layers, respectively. To create a step in the conduction band, and thus a buried-channel, we vary the hydrogen partial pressure which varies the hydrogen content and the bandgap of amorphous silicon. Capacitance-voltage and current-voltage measurements on these devices present strong evidence for the existence of the buried-channel. We achieve a record field effect mobility in saturation of 1.68 cm² /V-s with amorphous silicon deposited at 230°C, and an acceptable mobility of 0.44 cm²/V-s with amorphous silicon deposited at 125°C     

直流偏压对脉冲激光烧蚀沉积非晶碳膜的影响

在不同的负直流衬底偏压下，用脉冲激光沉积法在单晶Si和K9玻璃衬底上沉积上水晶碳膜，用扫描电镜观察膜的表面形貌；用椭偏法测量沉积在K9玻璃上的厚茺和折射率；显微硬度相对于硅衬底测量；对沉积在硅衬底上的膜进行了Raman光谱分析，光谱表现为3个峰。在激光能量相同时，线宽随偏压不同而不同，膜的硬度随偏压不同而不同。     

激光沉积硅膜的形成和微结构

前言 现代半导代技术中~[1]沉积薄膜的方法起着重要作用。激光可以为薄膜的沉积极提供一种独特的热源和光源，可以引起热或光化学作用。激光方法能够减少或消除其他方法的问题~[2]，能够沉积出高质量的薄膜，这种技术的主要优点是在沉积过程中可选择空间，薄膜生产可以限制在基板一个很小的点上。当然大面积沉积也是可能的。大的冷区同小的热区相比的情况有效地防止气相反应和基板还原。     

17.6% efficient multilayer thin-film silicon solar cells deposited on heavily doped silicon substrates

We report new results for multilayer thin-film silicon solar cells deposited onto electronically inert, heavily doped crystalline silicon substrates. The n-p-n-p-n active layers of a total thickness of 17 μm combined with a 15-μm thick p⁺-type buffer layer were deposited by chemical vapour deposition epitaxially onto a 10¹⁹ cm⁻³ doped Czochralski-grown silicon substrate. The cells fabricated using these layers exhibit an energy conversion efficiency of up to 17.6%, as measured by Sandia National Laboratories, which is the highest efficiency ever achieved for a thin-film silicon cell deposited onto such an electronically inert crystallographic template. An open-circuit voltage of 664.2 mV is also reported, the highest ever for a cell on such substrates.     

低应力PECVD氮化硅薄膜工艺探讨

介绍了一种掺氦的等离子增强化学气相淀积（ＰＥＣＶＤ）氮化硅薄膜工艺技术,可调控氮化硅薄膜的应力,从而在较低的射频功率下生长低应力的氮化硅薄膜。文中对其机理作了初步的探讨。所生长的氮化硅薄膜的折射率和腐蚀速率没有明显变化,对器件,尤其是对砷化镓异质结器件几乎没有应力损伤。     

Properties of MoSi2 and WSi2, magnetron cosputtered from elemental targets

A rotating table sputter system was used to coat substrates with refractory metal-silicon mixtures as the substrates alternately passed under refractory metal and silicon elemental targets. By varying target power, silicon rich, silicon defficient, or stoichiometric films of the disilicides could be deposited. Film resistivity was investigated as a function of anneal time and temperature, film thickness and grain size. Sheet resistance of of less than 1 ohm per square was found for WSi₂ films of 300nm thickness and for MoSi₂ films of 500nm thickness when annealed at 1000 °C for 30 min, This corresponds to 30 and 50 micro-ohm cm resistivity respectively. Film thickness was determined from surface profilometry of etched steps for films deposited over silicon nitride and by Rutherford Backscattering Spectrometry for films deposited over single-crystal or polysilicon films.     

Optical detector to monitor plasma etching

A simple photodetector has been developed to monitor plasma etching of polysilicon, pyrolytic silicon nitride and reactive plasma deposited silicon nitride.     

Reduction of AlGaAs Heterostructure High-Index-Contrast Ridge Waveguide Scattering Loss by Sidewall Smoothing Through Oxygen-Enhanced Wet Thermal Oxidation

We demonstrate the efficacy of oxidation smoothing of sidewall roughness in high-index-contrast AlGaAs heterostructure ridge waveguides via oxygen-enhanced nonselective wet thermal oxidation for reducing scattering loss. Single-mode waveguides of core widths between 1.5 and 2.2 ?m are fabricated using both the inward growth of a ~ 600-nm sidewall-smoothing native oxide outer cladding and, for comparison, encapsulation of an unoxidized etched ridge with a ~ 600-nm deposited silicon oxide cladding layer. On average, measured loss coefficients are reduced by a factor of 2 with the oxidation smoothing process.     

磁过滤阴极真空弧沉积薄膜研究

采用磁过滤阴极真空弧沉积技术对从弧源引起离子束中的大颗粒进行过滤后,在硅和聚合物表面进行离子注入和低能离子束沉积,可获得特性优异的沉积金属膜、超硬膜（类金刚石,CN膜）、陶瓷膜（TiN,TiC）等。电子显微镜观察表明,大颗粒已被过滤,表面结构致密,由于先进行离子注入,在基体表现预先形成了过滤层,从而改善了沉积膜的粘合特性,膜与基体的粘合特性有了明显提高。测量结果表明,沉积膜的硬度、抗磨损和抗腐蚀特性均有了明显提高。非晶金刚石薄膜表面硬度可达到56GPa。     

阳极氧化条件对多孔硅冷阴极场发射特性的影响

研究了多孔硅的制备条件对多孔硅冷阴极场发射特性的影响,实验表明多孔硅的制备条件如电解电流密度、电解时间等多孔硅冷阴极的场发射特性有较大的影响。