共查询到20条相似文献,搜索用时 15 毫秒
1.
PIN avalanche photodiodes model for circuit simulation 总被引:11,自引:0,他引:11
Weiyou Chen Shiyong Liu 《Quantum Electronics, IEEE Journal of》1996,32(12):2105-2111
A circuit model of PIN avalanche photodiodes (APD's) based on the carrier rate equations for circuit simulation is presented. This model is for dc, ac, and transient analysis. As an example, an In0.53 Ga0.47As-InP PIN APD is simulated 相似文献
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Yong Hoon Kang Songcheol Hong 《Electron Device Letters, IEEE》2005,26(8):563-565
A simple Flash memory cell model for circuit simulation is presented. The proposed model gives an excellent fitting of dc and transient data and does not require additional simulation time comparing with that of a MOSFET transistor. Effective control-gate voltage method and ideal current-mirror technique are introduced to calculate floating-gate voltage. These allow macro modeling of a Flash memory cell in a circuit simulator. 相似文献
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Transient hot-electron effect and its impact on circuit reliability are investigated. The rate of device decay is monitored as a function of the gate pulse transient period. Simulation results reveal that excess charges during a fast turn off time may cause an increase in the maximum substrate current. This, along with our experimental data, identifies that transient excess carrier may cause the enhancement of device degradation under certain stress conditions. The enhancement factor of the degradation is a function of the gate pulse transient time. Correlation between the analysis based upon AC/DC measurement and calculations based upon transient simulation are shown in the paper. Better agreement with experimental data is obtained by using the transient analysis and on chip test/stress structures. The correlation between AC and DC stress data is also shown based on the impact ionization model. A hot-electron design guideline is proposed based on the circuit reliability analysis. This guideline can help improve the circuit reliability without adversely effecting the circuit performance. 相似文献
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《Solid-State Circuits, IEEE Journal of》1987,22(4):567-574
An improved equivalent circuit model of a gallium-arsenide (GaAs) MESFET that is optimized for the design and analysis of precision analog integrated circuits is described. These circuits entail different modeling requirements from digital or microwave circuits, for which existing equivalent circuit models are optimized. Improved techniques are presented to model the drain-to-source conductance, device capacitance, and the functional dependence of drain-to-source current. 相似文献
6.
Pendharkar S.P. Winterhalter C.R. Shenai K. 《Electron Devices, IEEE Transactions on》1995,42(10):1847-1854
This paper proposes a physically based behavioral circuit simulation model for high-power GaAs Schottky diodes which is valid over all regions of operation. No conditional statements are needed to define the regions of operation. A new and more accurate method of obtaining depletion capacitance model parameters from the measured capacitance values is proposed. A simple current- and temperature-dependent resistance model is used to model the nonlinear diode resistance as well as contact and packaging resistances. The validity of the model is demonstrated under various DC and transient switching conditions. Simulation results are compared with the experimental data obtained from a 200 V GaAs Schottky diode. The diode model is tested at various temperatures in different test circuits and the simulation results are shown to be in excellent agreement with the measured data under static and dynamic switching conditions. The model can be easily implemented in other circuit simulators.<> 相似文献
7.
Wei Jin Weidong Liu Fung S.K.H. Chan P.C.H. Chenming Hu 《Electron Devices, IEEE Transactions on》2001,48(4):730-736
The buried-oxide in SOI MOSFET inhibits heat dissipation in the Si film and leads to increase in transistor temperature. This paper reports a simple and accurate characterization method for the self-heating effect (SHE) in SOI MOSFETs. The AC output conductance at a chosen bias point is measured at several frequencies to determine the thermal resistance (Rth) and thermal capacitance (Cth) associated with the SOI device. This methodology is important to remove the misleadingly large self-heating effect from the DC I-V data in device modeling. Not correcting for SHE may lead to significant error in circuit simulation. After SHE is accounted for, the frequency-dependent SHE may be disabled in circuit simulation without sacrificing the accuracy, thus providing faster circuit simulation for high-frequency circuits 相似文献
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A new quasi-three-dimensional large-signal circuit model of the metal-oxide-semiconductor capacitance (MOSC) under non-equilibrium depletion or inversion bias is presented. This model is based on the threedimensional version of Sah's distributed equivalent circuit model. A simple technique of scaling the circuit elements to account for circular symmetry is shown. The circuit elements perpendicular to the MOS interface are integrated to yield a quasi-three-dimensional circuit model. The numerical analysis technique of Green and Schewchun is then used to obtain photocurrent transient responses under arbitrary signal level. Theoretical photocurrent transient calculations are in excellent agreement with experimental curves, both for the fast initial transient as well as the slow long time decay. 相似文献
9.
A two-dimensional integrated numerical device/circuit model for GaAs/MESFET DCFL gate simulation is presented. It is different from previous publications in that (a) transient carrier transport equations of the FETs are calculated with consideration for the interaction between interconnected FETs in a circuit, (b) the numerical calculations are carried out for the coupled equations to provide accuracy and (c) with the new algorithm used, the numerical calculation can be carried out with high efficiency. A “dynamic method” and a “single gate method” have been developed to simulate the steady state transfer and ring oscillator transient characteristics, respectively, which have proved to be much more efficient than the previously used methods. Based on the model, a gate level two-dimensional numerical simulator, LADES2G, has been developed and successfully applied to GaAs DCFL circuit design. 相似文献
10.
混沌电路系统的模型仿真与电路实现 总被引:1,自引:1,他引:0
通过对混沌电路系统的分析方法的介绍,指出模型仿真和电路实现的重要性;以二个典型混沌系统为例,阐述了基于Matlab/Simulink环境下的仿真方法,同时介绍基于Multisim 8平台的电路仿真和实现过程;最后指出混沌电路的发展前景和研究方向. 相似文献
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S. Pankalla R. Ganesan D. Spiehl H.M. Sauer E. Dörsam M. Glesner 《Organic Electronics》2013,14(2):676-681
We present a method for designing organic circuits using Monte-Carlo based circuit simulation. The organic devices suffer from mismatch and variations that are due to systematic and random fluctuations in the process and material characteristics. In this work, we have used the variable range hopping model to extract the model parameters using a mass characterisation technique. The parameter fluctuations of organic transistors are taken into account and process corners determined based on static (noise margin) and transient (delay) characteristics. Thus a methodology is developed to find the parameter range of individual devices, within which the circuits are having good performance, for instance inverters working with desired noise margin. We also found out the critical parameters of the transistor, that predominantly affects the static and transient performance of an inverter. These critical parameters can be provided as input to the process engineers to fine tune the process. This information can also be used in developing robust circuit design techniques, which can overcome the variation effects of these critical parameters. Thus, a mass characterisation of transistors combined with the proposed method, allows robust circuit design in the presence of huge process variations. 相似文献
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Novel improved power metal oxide semiconductor field effect transistor (MOSFET) drive circuits are introduced. An anti-deadlock block is used in the P-channel power MOSFET drive circuit to avoid deadlocks and improve the transient response. An additional charging path is added to the N-channel power MOSFET drive circuit to enhance its drive capability and improve the transient response. The entire circuit is designed in a 0.6 μm BCD process and simulated with Cadence Spectre. Compared with traditional power MOSFET drive circuits, the simulation results show that improved P-channel power MOSFET drive circuit makes the rise time reduced from 60 to 14 ns, the fall time reduced from 240 to 30 ns, and its power dissipation reduced from 2 to 1 mW, while the improved N-channel power MOSFET drive circuit makes the rise time reduced from 360 to 27 ns and its power dissipation reduced from 1.1 to 0.8 mW. 相似文献
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This paper presents an efficient method for the analysis of multiconductor transmission lines with frequency-dependent parameters. The proposed technique generates positive-real representations for the frequency dependency of transmission line parameters as well as closed-form expressions based on exponential Pade approximants. The new model is suitable for inclusion in general purpose circuit simulators and overcomes the difficulty of mixed frequency/time simulation encountered during transient analysis. In addition, the proposed model can be easily incorporated with the recently developed passive model-reduction techniques. Numerical examples are presented to demonstrate the validity and efficiency of the proposed method 相似文献
15.
RLC二阶电路暂态过程的Multisim仿真 总被引:2,自引:1,他引:1
基于探索RLC二阶电路仿真实验技术的目的,采用Multisim仿真软件对RLC二阶电路暂态过程进行了仿真实验测试.给出了电路在过阻尼、临界阻尼、欠阻尼等情况下零输入响应及零状态响应的Multisim仿真方案,并介绍了不同工作条件下仿真时Multisim中信号源的选取及设置条件。结论是仿真实验可直观形象地描述RLC二阶电... 相似文献
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针对某型雷达模拟电路中存在的浪涌信号,提出了一种简单、实用的冲激响应理论分析方法。对雷达产生浪涌信号的一个典型电路进行仿真,得出模拟电路产生浪涌的一个重要原因是晶体管的瞬间导通电流过大。提出了一些防止浪涌信号对模拟电路冲击的措施。 相似文献
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For the first time a state variable transient analysis using wavelets is developed and implemented in a circuit simulator. The formulation is particularly well suited to modeling RF and microwave circuits and is validated by considering a nonlinear transmission line. However, results indicate that still more research is needed to make this method efficient for the simulation of large circuits 相似文献
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Andrés M. Roldán Càndid Reig M.-D. Cubells-Beltrán Susana Cardoso 《Microelectronics Journal》2011,42(2):365-370
An advanced model for quasi-linear spin-valve (SV) structures is presented for circuit simulation purposes. The model takes into account electrical and thermal effects in a coupled way in order to allow a coherent representation of the sensor physics for design purposes of electronics applications based on these sensor devices. The model was implemented in Verilog-A and used in a commercial circuit simulator. For testing the model, different SV structures have been specifically fabricated and measured. The characterization included DC measurements as well as steady-state and transient thermal analysis. From the experimental data, the parameters of the model have been extracted. The model reproduces correctly the experimental measurements obtained for devices with diverse sizes in different electrical and thermal operation regimes. 相似文献
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为提高高速高密度电路的设计效率,本文对快速电路仿真中常用的延迟插入法进行研究,分析并推导出延迟插入法的仿真计算公式。通过和通用电路模拟程序软件HSPICE的仿真结果进行比较,验证了延迟插入法的有效性;通过在云计算系统中对大规模电路进行仿真计算,验证了延迟插入法的高效性。本文的研究数据表明延迟插入法和云计算系统的结合可以提供一种可靠,高效的快速电路仿真技术,应用这种技术可以提高电路设计效率。 相似文献